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From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
To: "José Roberto de Souza" <jose.souza@intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 3/4] drm/i915: Cache sink_count for eDP
Date: Mon, 08 Oct 2018 17:19:00 -0700	[thread overview]
Message-ID: <6a45a894c62f774cd18dc9d0573197f94be645f5.camel@intel.com> (raw)
In-Reply-To: <20181005233542.2939-3-jose.souza@intel.com>

On Fri, 2018-10-05 at 16:35 -0700, José Roberto de Souza wrote:
> For eDP panels all the DPCD and EDID data is cached when initializing
> the eDP connector so in futher detection it do not call
> intel_dp_detect_dpcd() for eDP.
> The problem is on the first short pulse interruption it calls
> intel_dp_get_dpcd() for eDP and DP and it will read and set the sink
> count, causing a mismatch between old sink count and the new one
> triggering a full detection without needed.
> 
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c
> b/drivers/gpu/drm/i915/intel_dp.c
> index 19f0c3f59cbe..4a1c31ec9065 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -3926,6 +3926,7 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
>  {
>  	struct drm_i915_private *dev_priv =
>  		to_i915(dp_to_dig_port(intel_dp)->base.base.dev);
> +	u8 val;
>  
>  	/* this function is meant to be called only once */
>  	WARN_ON(intel_dp->dpcd[DP_DPCD_REV] != 0);
> @@ -3997,6 +3998,10 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
>  
>  	intel_dp_set_common_rates(intel_dp);
>  
> +	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_SINK_COUNT, &val) <=
> 0)
> +		return false;
> +	intel_dp->sink_count = DP_GET_SINK_COUNT(val);
Is this even relevant for eDPs? Seems unnecessary to read or compare
sink count for eDP. I'd suggest skipping DP_SINK_COUNT checks for eDP.


-DK

> +
>  	return true;
>  }
>  

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  reply	other threads:[~2018-10-09  0:19 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-05 23:35 [PATCH 1/4] drm/i915/psr: Always wait for idle state when disabling PSR José Roberto de Souza
2018-10-05 23:35 ` [PATCH 2/4] drm/i915: Disable PSR when a PSR aux error happen José Roberto de Souza
2018-10-09  0:14   ` Dhinakaran Pandiyan
2018-10-09  0:30     ` Souza, Jose
2018-10-09  0:49       ` Dhinakaran Pandiyan
2018-10-09  0:57         ` Souza, Jose
2018-10-05 23:35 ` [PATCH 3/4] drm/i915: Cache sink_count for eDP José Roberto de Souza
2018-10-09  0:19   ` Dhinakaran Pandiyan [this message]
2018-10-09  0:35     ` Souza, Jose
2018-10-09  0:54       ` Dhinakaran Pandiyan
2018-10-09 13:27         ` Ville Syrjälä
2018-10-10  1:09           ` Souza, Jose
2018-10-05 23:35 ` [PATCH 4/4] drm/i915: Check PSR errors instead of retrain while PSR is enabled José Roberto de Souza
2018-10-06  0:50 ` ✗ Fi.CI.SPARSE: warning for series starting with [1/4] drm/i915/psr: Always wait for idle state when disabling PSR Patchwork
2018-10-06  1:10 ` ✓ Fi.CI.BAT: success " Patchwork
2018-10-06  8:52 ` ✓ Fi.CI.IGT: " Patchwork
2018-10-08 22:43 ` [PATCH 1/4] " Dhinakaran Pandiyan
2018-10-10  1:12   ` Souza, Jose

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