On 08/09/16 17:44, Laurent Pinchart wrote: > The driver needs the number of bytes per pixel, not the bpp and depth > info meant for fbdev compatibility. Use the right API. > > In the tilcdc_crtc_mode_set() function compute the hardware register > value directly from the pixel format instead of computing the number of > bits per pixels first. > > Signed-off-by: Laurent Pinchart > Reviewed-by: Tomi Valkeinen > --- > Changes since v3: > > - Removed DRM_FORMAT_ARGB8888 support > - Fixed coding style > - Renamed min_pitch to pitch > --- > drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 15 +++++---------- > drivers/gpu/drm/tilcdc/tilcdc_plane.c | 7 ++++--- > 2 files changed, 9 insertions(+), 13 deletions(-) > > Cc: Jyri Sarha > > diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c > index 25d6b220ee8a..a64718630cdb 100644 > --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c > +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c > @@ -67,15 +67,13 @@ static void set_scanout(struct drm_crtc *crtc, struct drm_framebuffer *fb) > struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); > struct drm_device *dev = crtc->dev; > struct drm_gem_cma_object *gem; > - unsigned int depth, bpp; > dma_addr_t start, end; > > - drm_fb_get_bpp_depth(fb->pixel_format, &depth, &bpp); > gem = drm_fb_cma_get_gem_obj(fb, 0); > > start = gem->paddr + fb->offsets[0] + > crtc->y * fb->pitches[0] + > - crtc->x * bpp / 8; > + crtc->x * drm_format_plane_cpp(fb->pixel_format, 0); > > end = start + (crtc->mode.vdisplay * fb->pitches[0]); > > @@ -404,16 +402,13 @@ static void tilcdc_crtc_mode_set_nofb(struct drm_crtc *crtc) > if (info->tft_alt_mode) > reg |= LCDC_TFT_ALT_ENABLE; > if (priv->rev == 2) { > - unsigned int depth, bpp; > - > - drm_fb_get_bpp_depth(fb->pixel_format, &depth, &bpp); > - switch (bpp) { > - case 16: > + switch (fb->pixel_format) { > + case DRM_FORMAT_RGB565: > break; > - case 32: > + case DRM_FORMAT_XRGB8888: > reg |= LCDC_V2_TFT_24BPP_UNPACK; > /* fallthrough */ > - case 24: > + case DRM_FORMAT_RGB888: > reg |= LCDC_V2_TFT_24BPP_MODE; > break; Jyri, with your latest tilcdc changes, we need also BGR565, XBGR8888 and BGR888 here, don't we? Tomi