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diff for duplicates of <6ac334813cdc7729d1a3529b183880c2be7acddf.camel@neuling.org>

diff --git a/a/1.txt b/N1/1.txt
index a8cec23..7fd93b4 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -4,7 +4,7 @@ On Fri, 2018-07-20 at 16:29 +1000, Michael Ellerman wrote:
 > > > Michael Neuling <mikey@neuling.org> writes:
 > > > > On Wed, 2018-07-18 at 13:42 +0530, Gautham R Shenoy wrote:
 > > > > > On Wed, Jul 18, 2018 at 09:24:19AM +1000, Michael Neuling wrote:
-> > > > > > 
+> > > > > >=20
 > > > > > > >  	DEFINE(PPC_DBELL_SERVER, PPC_DBELL_SERVER);
 > > > > > > > diff --git a/arch/powerpc/kernel/idle_book3s.S
 > > > > > > > b/arch/powerpc/kernel/idle_book3s.S
@@ -18,89 +18,102 @@ On Fri, 2018-07-20 at 16:29 +1000, Michael Ellerman wrote:
 > > > > > > > +
 > > > > > > > +	mfspr	r3, SPRN_SPRG3
 > > > > > > > +	std	r3, STOP_SPRG3(r13)
-> > > > > > 
+> > > > > >=20
 > > > > > > We don't need to save it.  Just restore it from paca->sprg_vdso
 > > > > > > which
 > > > > > > should
 > > > > > > never change.
-> > > > > 
+> > > > >=20
 > > > > > Ok. I will respin a patch to restore SPRG3 from paca->sprg_vdso.
-> > > > > 
-> > > > > > 
+> > > > >=20
+> > > > > >=20
 > > > > > > How can we do better at catching these missing SPRGs?
-> > > > > 
-> > > > > We can go through the list of SPRs from the POWER9 User Manual and
-> > > > > document explicitly why we don't have to save/restore certain SPRs
-> > > > > during the execution of the stop instruction. Does this sound ok ?
-> > > > > 
+> > > > >=20
+> > > > > We can go through the list of SPRs from the POWER9 User Manual an=
+d
+> > > > > document explicitly why we don't have to save/restore certain SPR=
+s
+> > > > > during the execution of the stop instruction. Does this sound ok =
+?
+> > > > >=20
 > > > > > (Ref: Table 4-8, Section 4.7.3.4 from the POWER9 User Manual
 > > > > > accessible from
-> > > > > https://openpowerfoundation.org/?resource_lib=power9-processor-users-m
+> > > > > https://openpowerfoundation.org/?resource_lib=3Dpower9-processor-=
+users-m
 > > > > > anua
 > > > > > l)
-> > > > 
-> > > > I was thinking of a boot time test case built into linux. linux has some
+> > > >=20
+> > > > I was thinking of a boot time test case built into linux. linux has=
+ some
 > > > > boot
 > > > > time test cases which you can enable via CONFIG options.
-> > > > 
-> > > > Firstly you could see if an SPR exists using the same trick xmon does in
+> > > >=20
+> > > > Firstly you could see if an SPR exists using the same trick xmon do=
+es in
 > > > > dump_one_spr(). Then once you have a list of usable SPRs, you could
 > > > > write
 > > > > all
-> > > > the known ones (I assume you'd have to leave out some, like the PSSCR),
+> > > > the known ones (I assume you'd have to leave out some, like the PSS=
+CR),
 > > > > then
 > > > > set
-> > > 
+> > >=20
 > > > Write what value?
-> > > 
+> > >=20
 > > > Ideally you want to write a random bit pattern to reduce the chance
 > > > that only some bits are being restored.
-> > 
+> >=20
 > > The xmon dump_one_spr() trick tries to work around that by writing one
 > > random
 > > value and then a different one to see if it really is a nop.
-> > 
-> > > But you can't do that because writing a value to an SPRs has an effect.
-> > 
+> >=20
+> > > But you can't do that because writing a value to an SPRs has an effec=
+t.
+> >=20
 > > Sure that's a concern but xmon seems to get away with it.
-> 
+>=20
 > I don't think it writes, but maybe I'm reading the code wrong.
 
-You're right, sorry. It's the write the GPR that becomes a NOP when the SPR is
-not there. I misremembered how it worked. 
+You're right, sorry. It's the write the GPR that becomes a NOP when the SPR=
+ is
+not there. I misremembered how it worked.=20
 
-Maybe that won't work stop since we'd need to be able change the SPR value to
-ensure we don't hit the reset value after a stop state. 
+Maybe that won't work stop since we'd need to be able change the SPR value =
+to
+ensure we don't hit the reset value after a stop state.=20
 
-We'd be able to detect SPRs that that change from it's reset value but not those
+We'd be able to detect SPRs that that change from it's reset value but not =
+those
 that are already at their reset value.
 
 > Writing a random value to the MSR could be fun :)
 
 Fortunately the MSR is not an SPR :-P
 
-> > 
-> > Yeah, I'm not convinced it'll work either but it would be a nice piece of
+> >=20
+> > Yeah, I'm not convinced it'll work either but it would be a nice piece =
+of
 > > test
 > > infrastructure to have if it does work.
-> 
+>=20
 > Yeah I guess I'd rather we worked on 1) and 2) below first :)
 
 ok
 
-> > We'd still need to marry up the SPR numbers we get from the test to what's
+> > We'd still need to marry up the SPR numbers we get from the test to wha=
+t's
 > > actually being restored in Linux.
-> > 
+> >=20
 > > > But there's a much simpler solution, we should 1) have a selftest for
 > > > getcpu() and 2) we should be running the glibc (I think?) test suite
 > > > that found this in the first place. It's frankly embarrassing that we
 > > > didn't find this.
-> > 
+> >=20
 > > Yeah, we should do that also, but how do we catch the next SPR we are
 > > missing.
 > > I'd like some systematic way of doing that rather than wack-a-mole.
-> 
-> Whack-a-mole 😂😂😂😂
+>=20
+> Whack-a-mole =F0=9F=98=82=F0=9F=98=82=F0=9F=98=82=F0=9F=98=82
 
 I preferred waking them :-)
 
@@ -109,8 +122,10 @@ I preferred waking them :-)
 > could even become code that defines how SPRs are handled, rather than it
 > all being done ad-hoc.
 
-Yeah.  It's complicated by linux calling opal_slw_set_reg() to change what's
-saved. This was part of the reason I'd hoped doing a linux test case would help
+Yeah.  It's complicated by linux calling opal_slw_set_reg() to change what'=
+s
+saved. This was part of the reason I'd hoped doing a linux test case would =
+help
 as we could do it after those calls.
 
 Mikey
\ No newline at end of file
diff --git a/a/content_digest b/N1/content_digest
index b489def..5cfa885 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -56,7 +56,7 @@
   "> > > Michael Neuling <mikey\@neuling.org> writes:\n",
   "> > > > On Wed, 2018-07-18 at 13:42 +0530, Gautham R Shenoy wrote:\n",
   "> > > > > On Wed, Jul 18, 2018 at 09:24:19AM +1000, Michael Neuling wrote:\n",
-  "> > > > > > \n",
+  "> > > > > >=20\n",
   "> > > > > > >  \tDEFINE(PPC_DBELL_SERVER, PPC_DBELL_SERVER);\n",
   "> > > > > > > diff --git a/arch/powerpc/kernel/idle_book3s.S\n",
   "> > > > > > > b/arch/powerpc/kernel/idle_book3s.S\n",
@@ -70,89 +70,102 @@
   "> > > > > > > +\n",
   "> > > > > > > +\tmfspr\tr3, SPRN_SPRG3\n",
   "> > > > > > > +\tstd\tr3, STOP_SPRG3(r13)\n",
-  "> > > > > > \n",
+  "> > > > > >=20\n",
   "> > > > > > We don't need to save it.  Just restore it from paca->sprg_vdso\n",
   "> > > > > > which\n",
   "> > > > > > should\n",
   "> > > > > > never change.\n",
-  "> > > > > \n",
+  "> > > > >=20\n",
   "> > > > > Ok. I will respin a patch to restore SPRG3 from paca->sprg_vdso.\n",
-  "> > > > > \n",
-  "> > > > > > \n",
+  "> > > > >=20\n",
+  "> > > > > >=20\n",
   "> > > > > > How can we do better at catching these missing SPRGs?\n",
-  "> > > > > \n",
-  "> > > > > We can go through the list of SPRs from the POWER9 User Manual and\n",
-  "> > > > > document explicitly why we don't have to save/restore certain SPRs\n",
-  "> > > > > during the execution of the stop instruction. Does this sound ok ?\n",
-  "> > > > > \n",
+  "> > > > >=20\n",
+  "> > > > > We can go through the list of SPRs from the POWER9 User Manual an=\n",
+  "d\n",
+  "> > > > > document explicitly why we don't have to save/restore certain SPR=\n",
+  "s\n",
+  "> > > > > during the execution of the stop instruction. Does this sound ok =\n",
+  "?\n",
+  "> > > > >=20\n",
   "> > > > > (Ref: Table 4-8, Section 4.7.3.4 from the POWER9 User Manual\n",
   "> > > > > accessible from\n",
-  "> > > > > https://openpowerfoundation.org/?resource_lib=power9-processor-users-m\n",
+  "> > > > > https://openpowerfoundation.org/?resource_lib=3Dpower9-processor-=\n",
+  "users-m\n",
   "> > > > > anua\n",
   "> > > > > l)\n",
-  "> > > > \n",
-  "> > > > I was thinking of a boot time test case built into linux. linux has some\n",
+  "> > > >=20\n",
+  "> > > > I was thinking of a boot time test case built into linux. linux has=\n",
+  " some\n",
   "> > > > boot\n",
   "> > > > time test cases which you can enable via CONFIG options.\n",
-  "> > > > \n",
-  "> > > > Firstly you could see if an SPR exists using the same trick xmon does in\n",
+  "> > > >=20\n",
+  "> > > > Firstly you could see if an SPR exists using the same trick xmon do=\n",
+  "es in\n",
   "> > > > dump_one_spr(). Then once you have a list of usable SPRs, you could\n",
   "> > > > write\n",
   "> > > > all\n",
-  "> > > > the known ones (I assume you'd have to leave out some, like the PSSCR),\n",
+  "> > > > the known ones (I assume you'd have to leave out some, like the PSS=\n",
+  "CR),\n",
   "> > > > then\n",
   "> > > > set\n",
-  "> > > \n",
+  "> > >=20\n",
   "> > > Write what value?\n",
-  "> > > \n",
+  "> > >=20\n",
   "> > > Ideally you want to write a random bit pattern to reduce the chance\n",
   "> > > that only some bits are being restored.\n",
-  "> > \n",
+  "> >=20\n",
   "> > The xmon dump_one_spr() trick tries to work around that by writing one\n",
   "> > random\n",
   "> > value and then a different one to see if it really is a nop.\n",
-  "> > \n",
-  "> > > But you can't do that because writing a value to an SPRs has an effect.\n",
-  "> > \n",
+  "> >=20\n",
+  "> > > But you can't do that because writing a value to an SPRs has an effec=\n",
+  "t.\n",
+  "> >=20\n",
   "> > Sure that's a concern but xmon seems to get away with it.\n",
-  "> \n",
+  ">=20\n",
   "> I don't think it writes, but maybe I'm reading the code wrong.\n",
   "\n",
-  "You're right, sorry. It's the write the GPR that becomes a NOP when the SPR is\n",
-  "not there. I misremembered how it worked. \n",
+  "You're right, sorry. It's the write the GPR that becomes a NOP when the SPR=\n",
+  " is\n",
+  "not there. I misremembered how it worked.=20\n",
   "\n",
-  "Maybe that won't work stop since we'd need to be able change the SPR value to\n",
-  "ensure we don't hit the reset value after a stop state. \n",
+  "Maybe that won't work stop since we'd need to be able change the SPR value =\n",
+  "to\n",
+  "ensure we don't hit the reset value after a stop state.=20\n",
   "\n",
-  "We'd be able to detect SPRs that that change from it's reset value but not those\n",
+  "We'd be able to detect SPRs that that change from it's reset value but not =\n",
+  "those\n",
   "that are already at their reset value.\n",
   "\n",
   "> Writing a random value to the MSR could be fun :)\n",
   "\n",
   "Fortunately the MSR is not an SPR :-P\n",
   "\n",
-  "> > \n",
-  "> > Yeah, I'm not convinced it'll work either but it would be a nice piece of\n",
+  "> >=20\n",
+  "> > Yeah, I'm not convinced it'll work either but it would be a nice piece =\n",
+  "of\n",
   "> > test\n",
   "> > infrastructure to have if it does work.\n",
-  "> \n",
+  ">=20\n",
   "> Yeah I guess I'd rather we worked on 1) and 2) below first :)\n",
   "\n",
   "ok\n",
   "\n",
-  "> > We'd still need to marry up the SPR numbers we get from the test to what's\n",
+  "> > We'd still need to marry up the SPR numbers we get from the test to wha=\n",
+  "t's\n",
   "> > actually being restored in Linux.\n",
-  "> > \n",
+  "> >=20\n",
   "> > > But there's a much simpler solution, we should 1) have a selftest for\n",
   "> > > getcpu() and 2) we should be running the glibc (I think?) test suite\n",
   "> > > that found this in the first place. It's frankly embarrassing that we\n",
   "> > > didn't find this.\n",
-  "> > \n",
+  "> >=20\n",
   "> > Yeah, we should do that also, but how do we catch the next SPR we are\n",
   "> > missing.\n",
   "> > I'd like some systematic way of doing that rather than wack-a-mole.\n",
-  "> \n",
-  "> Whack-a-mole \360\237\230\202\360\237\230\202\360\237\230\202\360\237\230\202\n",
+  ">=20\n",
+  "> Whack-a-mole =F0=9F=98=82=F0=9F=98=82=F0=9F=98=82=F0=9F=98=82\n",
   "\n",
   "I preferred waking them :-)\n",
   "\n",
@@ -161,11 +174,13 @@
   "> could even become code that defines how SPRs are handled, rather than it\n",
   "> all being done ad-hoc.\n",
   "\n",
-  "Yeah.  It's complicated by linux calling opal_slw_set_reg() to change what's\n",
-  "saved. This was part of the reason I'd hoped doing a linux test case would help\n",
+  "Yeah.  It's complicated by linux calling opal_slw_set_reg() to change what'=\n",
+  "s\n",
+  "saved. This was part of the reason I'd hoped doing a linux test case would =\n",
+  "help\n",
   "as we could do it after those calls.\n",
   "\n",
   "Mikey"
 ]
 
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+4c3d618f8100fc898e91dd8e33cf8d09e08e2c74cbab547e3c9655ca42f43792

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