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Intel Mac OS X 10.15; rv:91.0) Gecko/20100101 Thunderbird/91.13.0 Subject: Re: [RFC PATCH 3/4] hw/intc/gic: use MxTxAttrs to divine accessing CPU Content-Language: en-US To: Richard Henderson , =?UTF-8?Q?Alex_Benn=c3=a9e?= , qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Peter Maydell References: <20220914160955.812151-1-alex.bennee@linaro.org> <20220914160955.812151-4-alex.bennee@linaro.org> In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::634; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-pl1-x634.google.com X-Spam_score_int: -32 X-Spam_score: -3.3 X-Spam_bar: --- X-Spam_report: (-3.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, NICE_REPLY_A=-1.816, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Reply-to: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= via On 15/9/22 10:16, Richard Henderson wrote: > On 9/14/22 17:09, Alex Bennée wrote: >> Now that MxTxAttrs encodes a CPU we should use that to figure it out. >> This solves edge cases like accessing via gdbstub or qtest. >> >> Signed-off-by: Alex Bennée >> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/124 >> --- >>   hw/intc/arm_gic.c | 39 ++++++++++++++++++++++----------------- >>   1 file changed, 22 insertions(+), 17 deletions(-) >> >> diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c >> index 492b2421ab..7feedac735 100644 >> --- a/hw/intc/arm_gic.c >> +++ b/hw/intc/arm_gic.c >> @@ -56,17 +56,22 @@ static const uint8_t gic_id_gicv2[] = { >>       0x04, 0x00, 0x00, 0x00, 0x90, 0xb4, 0x2b, 0x00, 0x0d, 0xf0, >> 0x05, 0xb1 >>   }; >> -static inline int gic_get_current_cpu(GICState *s) >> +static inline int gic_get_current_cpu(GICState *s, MemTxAttrs attrs) >>   { >> -    if (!qtest_enabled() && s->num_cpu > 1) { >> -        return current_cpu->cpu_index; >> -    } >> -    return 0; >> +    /* >> +     * Something other than a CPU accessing the GIC would be a bug as >> +     * would a CPU index higher than the GICState expects to be >> +     * handling >> +     */ >> +    g_assert(attrs.requester_cpu == 1); > > Better without "== 1" -- this field ought to be boolean. Boolean so far, but this could get more types (such DMA...). Maybe we could already add an enum definitions, i.e.: typedef enum MemTxRequesterType { MEMTXATTRS_CPU, MEMTXATTRS_MSI, } MemTxRequesterType; and name the field MemTxAttrs::requester_type.