From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AE5F3C4338F for ; Thu, 29 Jul 2021 00:39:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8C20E6103B for ; Thu, 29 Jul 2021 00:39:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233055AbhG2AjF (ORCPT ); Wed, 28 Jul 2021 20:39:05 -0400 Received: from new3-smtp.messagingengine.com ([66.111.4.229]:52007 "EHLO new3-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232869AbhG2AjF (ORCPT ); Wed, 28 Jul 2021 20:39:05 -0400 Received: from compute2.internal (compute2.nyi.internal [10.202.2.42]) by mailnew.nyi.internal (Postfix) with ESMTP id 8E791580B8B; Wed, 28 Jul 2021 20:39:02 -0400 (EDT) Received: from imap43 ([10.202.2.93]) by compute2.internal (MEProxy); Wed, 28 Jul 2021 20:39:02 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=aj.id.au; h= mime-version:message-id:in-reply-to:references:date:from:to:cc :subject:content-type; s=fm3; bh=9IbRewnClnxS9l6M0pLMy55dQydOlsR xDHwEOF66KXI=; b=Y8OPiiCMQOcWR0PaHgRUdivy2vn7o5sC0L9P8l6kXbF/7Da GOQsKQAAWau//gDQx5K4oOJi/HlK764Cvi+/YBzEa3+QsM57yHQcWjLlbsBTU7MF 22INHIUPBbLxej0hrxshMfT3UYfWEt8UotwUfpLN27Bcuehhum8VGOV1roN7OD6B hG8Ka1CoHkO5xCaOYGFumXqHeRClfVsfTQtWeXcu3It7hMV9XjsiV3llnO9Tey0U vSeWSmQcmswmYHKDTtjhofV+IfkrutvUoXbfctuJnjYz0IC8r9XAdLSVGkIbtkkE wEnU64VJ5gtKG/8havaEI4K87bul4AxqbjWZGBA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to:x-me-proxy :x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s=fm3; bh=9IbRew nClnxS9l6M0pLMy55dQydOlsRxDHwEOF66KXI=; b=CDtarNNZzKiyLynvEX6I/l MDwmt8NphT9dUmhuH9d7DRJvEp7UfWKmjDIlnkVa3p5JwuqUvxsnEk89aFaAfrLX 6lPOqskMXRHU1ma6YtENcv9GBxrEKR3wGac0FRxWhK+hkDtsg4+9VJDwjijtfbrI XgJyZxk+FqA5ln8LzFr06swKs3tQ/1rOsOis8dDrJm1JWpDFiFfj4nRYwVas6sbw Eq+sdA4iopbbDt5RPeyEQCVxqXg5mlNi+aRk5NOMrdx8BsDP85Ytpnst7T0daIxc BCo3RlMuK/90X0q+WpyO+rK3OAhS9TqjYOiEC1P/0sRW3AmqvVOE0E6XVH5kPuEw == X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvtddrhedtgddvjecutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenuc fjughrpefofgggkfgjfhffhffvufgtsehttdertderredtnecuhfhrohhmpedftehnughr vgifucflvghffhgvrhihfdcuoegrnhgurhgvfiesrghjrdhiugdrrghuqeenucggtffrrg htthgvrhhnpeehhfefkefgkeduveehffehieehudejfeejveejfedugfefuedtuedvhefh veeuffenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhrohhmpe grnhgurhgvfiesrghjrdhiugdrrghu X-ME-Proxy: Received: by mailuser.nyi.internal (Postfix, from userid 501) id F3BD7AC0DD0; Wed, 28 Jul 2021 20:39:00 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.5.0-alpha0-545-g7a4eea542e-fm-20210727.001-g7a4eea54 Mime-Version: 1.0 Message-Id: <6cc64039-f82a-4c1e-ad2c-16fad7aa3178@www.fastmail.com> In-Reply-To: References: <20210723075858.376378-1-andrew@aj.id.au> Date: Thu, 29 Jul 2021 10:08:38 +0930 From: "Andrew Jeffery" To: "Andy Shevchenko" Cc: "linux-leds@vger.kernel.org" , "linux-gpio@vger.kernel.org" , =?UTF-8?Q?C=C3=A9dric_Le_Goater?= , "Rob Herring" , "Joel Stanley" , "Pavel Machek" , "Linus Walleij" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-aspeed@lists.ozlabs.org" , "linux-kernel@vger.kernel.org" Subject: Re: [RFC PATCH 0/6] leds: Fix pca955x GPIO pin mappings Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-leds@vger.kernel.org On Wed, 28 Jul 2021, at 18:43, Andy Shevchenko wrote: > On Wed, Jul 28, 2021 at 8:43 AM Andrew Jeffery wrote: > > On Fri, 23 Jul 2021, at 17:45, Andy Shevchenko wrote: > > > > > I was briefly looking into patches 1-4 and suddenly > > > realized that the fix can be similar as in PCA9685 (PWM), I.e. we > > > always have chips for the entire pin space and one may map them > > > accordingly, requested in one realm (LED) in the other (GPIO) > > > automatically is BUSY. Or I missed the point? > > > > No, you haven't missed the point. I will look at the PCA9685 driver. > > > > That said, my goal was to implement the behaviour intended by the > > existing binding (i.e. fix a bug). > > Okay, so it implies that this used to work at some point. I don't think this is true. It only "works" if the lines specified as GPIO in the devicetree are contiguous from line 0. That way the pin and GPIO number spaces align. I suspect that's all that's been tested up until this point. We now have a board with a PCA9552 where the first 8 pins are LED and the last 8 pins are GPIO, and if you specify this in the devicetree according to the binding you hit the failure to map between the two number spaces. > What has > changed from that point? Why can't we simply fix the culprit commit? As such nothing has changed, I think it's always been broken, just we haven't had hardware configurations that demonstrated the failure. > > > However, userspace would never have > > got the results it expected with the existing driver implementation, so > > I guess you could argue that no such (useful) userspace exists. Given > > that, we could adopt the strategy of always defining a gpiochip > > covering the whole pin space, and parts of the devicetree binding just > > become redundant. > > I'm lost now. GPIO has its own userspace ABI, how does it work right > now in application to this chip? As above, it "works" if the GPIOs specified in the devicetree are contiguous from line 0. It's broken if they're not. Andrew From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED3B3C4338F for ; Thu, 29 Jul 2021 00:41:38 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B5F106052B for ; Thu, 29 Jul 2021 00:41:38 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org B5F106052B Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: mail.kernel.org; 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Wed, 28 Jul 2021 20:39:00 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.5.0-alpha0-545-g7a4eea542e-fm-20210727.001-g7a4eea54 Mime-Version: 1.0 Message-Id: <6cc64039-f82a-4c1e-ad2c-16fad7aa3178@www.fastmail.com> In-Reply-To: References: <20210723075858.376378-1-andrew@aj.id.au> Date: Thu, 29 Jul 2021 10:08:38 +0930 From: "Andrew Jeffery" To: "Andy Shevchenko" Cc: "linux-leds@vger.kernel.org" , "linux-gpio@vger.kernel.org" , =?UTF-8?Q?C=C3=A9dric_Le_Goater?= , "Rob Herring" , "Joel Stanley" , "Pavel Machek" , "Linus Walleij" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-aspeed@lists.ozlabs.org" , "linux-kernel@vger.kernel.org" Subject: Re: [RFC PATCH 0/6] leds: Fix pca955x GPIO pin mappings X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210728_173906_075072_A6B7BF1E X-CRM114-Status: GOOD ( 23.87 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, 28 Jul 2021, at 18:43, Andy Shevchenko wrote: > On Wed, Jul 28, 2021 at 8:43 AM Andrew Jeffery wrote: > > On Fri, 23 Jul 2021, at 17:45, Andy Shevchenko wrote: > > > > > I was briefly looking into patches 1-4 and suddenly > > > realized that the fix can be similar as in PCA9685 (PWM), I.e. we > > > always have chips for the entire pin space and one may map them > > > accordingly, requested in one realm (LED) in the other (GPIO) > > > automatically is BUSY. Or I missed the point? > > > > No, you haven't missed the point. I will look at the PCA9685 driver. > > > > That said, my goal was to implement the behaviour intended by the > > existing binding (i.e. fix a bug). > > Okay, so it implies that this used to work at some point. I don't think this is true. It only "works" if the lines specified as GPIO in the devicetree are contiguous from line 0. That way the pin and GPIO number spaces align. I suspect that's all that's been tested up until this point. We now have a board with a PCA9552 where the first 8 pins are LED and the last 8 pins are GPIO, and if you specify this in the devicetree according to the binding you hit the failure to map between the two number spaces. > What has > changed from that point? Why can't we simply fix the culprit commit? As such nothing has changed, I think it's always been broken, just we haven't had hardware configurations that demonstrated the failure. > > > However, userspace would never have > > got the results it expected with the existing driver implementation, so > > I guess you could argue that no such (useful) userspace exists. Given > > that, we could adopt the strategy of always defining a gpiochip > > covering the whole pin space, and parts of the devicetree binding just > > become redundant. > > I'm lost now. GPIO has its own userspace ABI, how does it work right > now in application to this chip? As above, it "works" if the GPIOs specified in the devicetree are contiguous from line 0. It's broken if they're not. Andrew _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel