From: Andrii Anisov <andrii_anisov@epam.com>
To: Dario Faggioli <dario.faggioli@citrix.com>,
Meng Xu <xumengpanda@gmail.com>
Cc: xen-devel <xen-devel@lists.xenproject.org>
Subject: Re: RT-Xen on ARM
Date: Fri, 29 Sep 2017 13:24:19 +0300 [thread overview]
Message-ID: <6e8a75bc-e2b9-56d6-5d5d-d545f89c042e@epam.com> (raw)
In-Reply-To: <1506614478.5001.12.camel@citrix.com>
Hello Dario,
On 28.09.17 19:01, Dario Faggioli wrote:
> On Thu, 2017-09-28 at 12:18 +0300, Andrii Anisov wrote:
>>>> - Could you please provide an example input xml for CARTS
>>>> described a
>>>> system with 2 RT domains with 2 VCPUs each, running on a 2PCPUs,
>>>> with gEDF
>>>> scheduling at VMM level (for XEN based setup).
>>> Hmm, if you use the gEDF scheduling algorithm, this may not be
>>> possible. Let me explain why.
>>> In the MPR2 model, it computes the interface with the minimum
>>> number
>>> of cores. To get 2 VCPUs for a VM, the total utilization (i.e.,
>>> budget
>>> / period) of these two VCPUs must be larger than 1.0. Since you ask
>>> for 2 domains, the total utilization of these 4 VCPUs will be
>>> larger
>>> than 2.0, which are definitely not schedulable on two cores.
>> Well, if we are speaking about test-cases similar to described in
>> [1],
>>
> Missing the link?
Yep, I've missed the link.
[1] https://www.cis.upenn.edu/~linhphan/papers/emsoft14-rt-xen.pdf
--
*Andrii Anisov*
*Lead Systems Engineer*
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*andrii_anisov@epam.com <mailto:andrii_anisov@epam.com>
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next prev parent reply other threads:[~2017-09-29 10:24 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-03 11:03 RT-Xen on ARM Andrii Anisov
2017-07-03 13:03 ` Wei Liu
2017-07-03 13:26 ` Andrii Anisov
2017-07-03 13:35 ` Meng Xu
2017-07-03 14:58 ` Andrii Anisov
2017-07-03 18:42 ` Meng Xu
2017-07-04 12:28 ` Andrii Anisov
2017-07-04 15:12 ` Meng Xu
2017-07-05 8:29 ` Dario Faggioli
2017-07-07 18:29 ` Meng Xu
2017-07-12 6:13 ` Dario Faggioli
2017-07-05 8:42 ` Dario Faggioli
2017-07-05 8:51 ` Dario Faggioli
2017-07-07 18:43 ` Meng Xu
2017-07-07 18:46 ` Meng Xu
2017-07-10 9:22 ` Andrii Anisov
2017-08-01 11:02 ` Andrii Anisov
2017-08-18 20:43 ` Meng Xu
2017-08-21 8:07 ` Andrii Anisov
2017-08-21 8:16 ` Andrii Anisov
2017-08-22 2:02 ` Meng Xu
2017-09-27 12:37 ` Andrii Anisov
2017-09-27 13:57 ` Meng Xu
2017-09-27 14:37 ` Andrii Anisov
2017-09-27 19:57 ` Meng Xu
2017-09-28 9:18 ` Andrii Anisov
2017-09-28 16:01 ` Dario Faggioli
2017-09-28 17:56 ` Dario Faggioli
2017-09-29 10:24 ` Andrii Anisov [this message]
2017-10-09 15:38 ` Meng Xu
2017-08-22 1:58 ` Meng Xu
2017-08-21 8:38 ` Andrii Anisov
2017-08-22 2:19 ` Meng Xu
2017-07-05 7:33 ` Dario Faggioli
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