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[189.204.159.168]) by smtp.gmail.com with ESMTPSA id q67sm677851oic.55.2021.03.24.15.03.36 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 24 Mar 2021 15:03:37 -0700 (PDT) Subject: Re: [RFC v11 22/55] target/arm: move sve_zcr_len_for_el to common_cpu To: Claudio Fontana , Peter Maydell , =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= , =?UTF-8?Q?Alex_Benn=c3=a9e?= References: <20210323151749.21299-1-cfontana@suse.de> <20210323154639.23477-15-cfontana@suse.de> From: Richard Henderson Message-ID: <6eb61895-7d00-e8c6-fca4-2a70e7e2b066@linaro.org> Date: Wed, 24 Mar 2021 16:03:34 -0600 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.1 MIME-Version: 1.0 In-Reply-To: <20210323154639.23477-15-cfontana@suse.de> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::334; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x334.google.com X-Spam_score_int: 12 X-Spam_score: 1.2 X-Spam_bar: + X-Spam_report: (1.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_SBL_CSS=3.335, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Roman Bolshakov , qemu-devel@nongnu.org, Eduardo Habkost Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 3/23/21 9:46 AM, Claudio Fontana wrote: > it is required by arch-dump.c and cpu.c, so apparently > we need this for KVM too > > Signed-off-by: Claudio Fontana Reviewed-by: Richard Henderson > +/* > + * these are AARCH64-only, but due to the chain of dependencies, > + * between HELPER prototypes, hflags, cpreg definitions and functions in > + * tcg/ etc, it becomes incredibly messy to add what should be here: > + * > + * #ifdef TARGET_AARCH64 > + */ > + > +static uint32_t sve_zcr_get_valid_len(ARMCPU *cpu, uint32_t start_len) > +{ > + uint32_t end_len; > + > + end_len = start_len &= 0xf; > + if (!test_bit(start_len, cpu->sve_vq_map)) { > + end_len = find_last_bit(cpu->sve_vq_map, start_len); > + assert(end_len < start_len); > + } > + return end_len; > +} I guess you could #ifdef TARGET_AARCH64 ... #else g_assert_not_reached(); #endif Dunno if it's worth it or not, since they're small. r~