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From: Richard Henderson <>
To: Peter Maydell <>,,
Subject: Re: [PATCH] target/arm: Use correct SP in M-profile exception return
Date: Mon, 24 May 2021 06:40:11 -0700	[thread overview]
Message-ID: <> (raw)
In-Reply-To: <>

On 5/20/21 6:09 AM, Peter Maydell wrote:
> When an M-profile CPU is restoring registers from the stack on
> exception return, the stack pointer to use is determined based on
> bits in the magic exception return type value.  We were not getting
> this logic entirely correct.
> Whether we use one of the Secure stack pointers or one of the
> Non-Secure stack pointers depends on the EXCRET.S bit.  However,
> whether we use the MSP or the PSP then depends on the SPSEL bit in
> either the CONTROL_S or CONTROL_NS register.  We were incorrectly
> selecting MSP vs PSP based on the EXCRET.SPSEL bit.
> (In the pseudocode this is in the PopStack() function, which calls
> LookUpSp_with_security_mode() which in turn looks at the relevant
> The buggy behaviour wasn't noticeable in most cases, because we write
> EXCRET.SPSEL to the CONTROL.SPSEL bit for the S/NS register selected
> by EXCRET.ES, so we only do the wrong thing when EXCRET.S and
> EXCRET.ES are different.  This will happen when secure code takes a
> secure exception, which then tail-chains to a non-secure exception
> which finally returns to the original secure code.
> Signed-off-by: Peter Maydell<>
> ---
> This was noticed by the Arm TF-M folks, who have a pending change
> to their code which will run into the situation we mishandle.
> ---

Reviewed-by: Richard Henderson <>


      reply	other threads:[~2021-05-24 13:41 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-20 13:09 Peter Maydell
2021-05-24 13:40 ` Richard Henderson [this message]

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