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* [PATCH] drm/i915: Make wa list per-gt
@ 2021-09-17 17:08 ` Matt Roper
  0 siblings, 0 replies; 13+ messages in thread
From: Matt Roper @ 2021-09-17 17:08 UTC (permalink / raw)
  To: intel-gfx
  Cc: dri-devel, matthew.d.roper, Venkata Sandeep Dhanalakota,
	Tvrtko Ursulin, Daniele Ceraolo Spurio

From: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>

Support for multiple GT's within a single i915 device will be arriving
soon.  Since each GT may have its own fusing and require different
workarounds, we need to make the GT workaround functions and multicast
steering setup per-gt.

Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_gt.c            |   3 +
 drivers/gpu/drm/i915/gt/intel_gt_types.h      |   2 +
 drivers/gpu/drm/i915/gt/intel_workarounds.c   | 143 +++++++++---------
 drivers/gpu/drm/i915/gt/intel_workarounds.h   |   2 +-
 .../gpu/drm/i915/gt/selftest_workarounds.c    |   2 +-
 drivers/gpu/drm/i915/i915_drv.c               |   2 -
 drivers/gpu/drm/i915/i915_drv.h               |   2 -
 drivers/gpu/drm/i915/i915_gem.c               |   2 -
 8 files changed, 81 insertions(+), 77 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index 55e87aff51d2..449ff6e83543 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -660,6 +660,8 @@ int intel_gt_init(struct intel_gt *gt)
 	if (err)
 		return err;
 
+	intel_gt_init_workarounds(gt);
+
 	/*
 	 * This is just a security blanket to placate dragons.
 	 * On some systems, we very sporadically observe that the first TLBs
@@ -767,6 +769,7 @@ void intel_gt_driver_release(struct intel_gt *gt)
 	if (vm) /* FIXME being called twice on error paths :( */
 		i915_vm_put(vm);
 
+	intel_wa_list_free(&gt->wa_list);
 	intel_gt_pm_fini(gt);
 	intel_gt_fini_scratch(gt);
 	intel_gt_fini_buffer_pool(gt);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h b/drivers/gpu/drm/i915/gt/intel_gt_types.h
index 6fdcde64c180..ce127cae9e49 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
@@ -72,6 +72,8 @@ struct intel_gt {
 
 	struct intel_uc uc;
 
+	struct i915_wa_list wa_list;
+
 	struct intel_gt_timelines {
 		spinlock_t lock; /* protects active_list */
 		struct list_head active_list;
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index c314d4917b6b..1f0a54b383d9 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -804,7 +804,7 @@ int intel_engine_emit_ctx_wa(struct i915_request *rq)
 }
 
 static void
-gen4_gt_workarounds_init(struct drm_i915_private *i915,
+gen4_gt_workarounds_init(struct intel_gt *gt,
 			 struct i915_wa_list *wal)
 {
 	/* WaDisable_RenderCache_OperationalFlush:gen4,ilk */
@@ -812,29 +812,29 @@ gen4_gt_workarounds_init(struct drm_i915_private *i915,
 }
 
 static void
-g4x_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+g4x_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
-	gen4_gt_workarounds_init(i915, wal);
+	gen4_gt_workarounds_init(gt, wal);
 
 	/* WaDisableRenderCachePipelinedFlush:g4x,ilk */
 	wa_masked_en(wal, CACHE_MODE_0, CM0_PIPELINED_RENDER_FLUSH_DISABLE);
 }
 
 static void
-ilk_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+ilk_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
-	g4x_gt_workarounds_init(i915, wal);
+	g4x_gt_workarounds_init(gt, wal);
 
 	wa_masked_en(wal, _3D_CHICKEN2, _3D_CHICKEN2_WM_READ_PIPELINED);
 }
 
 static void
-snb_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+snb_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
 }
 
 static void
-ivb_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+ivb_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
 	/* Apply the WaDisableRHWOOptimizationForRenderHang:ivb workaround. */
 	wa_masked_dis(wal,
@@ -850,7 +850,7 @@ ivb_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
 }
 
 static void
-vlv_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+vlv_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
 	/* WaForceL3Serialization:vlv */
 	wa_write_clr(wal, GEN7_L3SQCREG4, L3SQ_URB_READ_CAM_MATCH_DISABLE);
@@ -863,7 +863,7 @@ vlv_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
 }
 
 static void
-hsw_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+hsw_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
 	/* L3 caching of data atomics doesn't work -- disable it. */
 	wa_write(wal, HSW_SCRATCH1, HSW_SCRATCH1_L3_DATA_ATOMICS_DISABLE);
@@ -878,15 +878,15 @@ hsw_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
 }
 
 static void
-gen9_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+gen9_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
 	/* WaDisableKillLogic:bxt,skl,kbl */
-	if (!IS_COFFEELAKE(i915) && !IS_COMETLAKE(i915))
+	if (!IS_COFFEELAKE(gt->i915) && !IS_COMETLAKE(gt->i915))
 		wa_write_or(wal,
 			    GAM_ECOCHK,
 			    ECOCHK_DIS_TLB);
 
-	if (HAS_LLC(i915)) {
+	if (HAS_LLC(gt->i915)) {
 		/* WaCompressedResourceSamplerPbeMediaNewHashMode:skl,kbl
 		 *
 		 * Must match Display Engine. See
@@ -904,9 +904,9 @@ gen9_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal
 }
 
 static void
-skl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+skl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
-	gen9_gt_workarounds_init(i915, wal);
+	gen9_gt_workarounds_init(gt, wal);
 
 	/* WaDisableGafsUnitClkGating:skl */
 	wa_write_or(wal,
@@ -914,19 +914,19 @@ skl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
 		    GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE);
 
 	/* WaInPlaceDecompressionHang:skl */
-	if (IS_SKL_GT_STEP(i915, STEP_A0, STEP_H0))
+	if (IS_SKL_GT_STEP(gt->i915, STEP_A0, STEP_H0))
 		wa_write_or(wal,
 			    GEN9_GAMT_ECO_REG_RW_IA,
 			    GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS);
 }
 
 static void
-kbl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+kbl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
-	gen9_gt_workarounds_init(i915, wal);
+	gen9_gt_workarounds_init(gt, wal);
 
 	/* WaDisableDynamicCreditSharing:kbl */
-	if (IS_KBL_GT_STEP(i915, 0, STEP_C0))
+	if (IS_KBL_GT_STEP(gt->i915, 0, STEP_C0))
 		wa_write_or(wal,
 			    GAMT_CHKN_BIT_REG,
 			    GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING);
@@ -943,15 +943,15 @@ kbl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
 }
 
 static void
-glk_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+glk_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
-	gen9_gt_workarounds_init(i915, wal);
+	gen9_gt_workarounds_init(gt, wal);
 }
 
 static void
-cfl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+cfl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
-	gen9_gt_workarounds_init(i915, wal);
+	gen9_gt_workarounds_init(gt, wal);
 
 	/* WaDisableGafsUnitClkGating:cfl */
 	wa_write_or(wal,
@@ -976,21 +976,21 @@ static void __set_mcr_steering(struct i915_wa_list *wal,
 	wa_write_clr_set(wal, steering_reg, mcr_mask, mcr);
 }
 
-static void __add_mcr_wa(struct drm_i915_private *i915, struct i915_wa_list *wal,
+static void __add_mcr_wa(struct intel_gt *gt, struct i915_wa_list *wal,
 			 unsigned int slice, unsigned int subslice)
 {
-	drm_dbg(&i915->drm, "MCR slice=0x%x, subslice=0x%x\n", slice, subslice);
+	drm_dbg(&gt->i915->drm, "MCR slice=0x%x, subslice=0x%x\n", slice, subslice);
 
 	__set_mcr_steering(wal, GEN8_MCR_SELECTOR, slice, subslice);
 }
 
 static void
-icl_wa_init_mcr(struct drm_i915_private *i915, struct i915_wa_list *wal)
+icl_wa_init_mcr(struct intel_gt *gt, struct i915_wa_list *wal)
 {
-	const struct sseu_dev_info *sseu = &i915->gt.info.sseu;
+	const struct sseu_dev_info *sseu = &gt->info.sseu;
 	unsigned int slice, subslice;
 
-	GEM_BUG_ON(GRAPHICS_VER(i915) < 11);
+	GEM_BUG_ON(GRAPHICS_VER(gt->i915) < 11);
 	GEM_BUG_ON(hweight8(sseu->slice_mask) > 1);
 	slice = 0;
 
@@ -1010,16 +1010,15 @@ icl_wa_init_mcr(struct drm_i915_private *i915, struct i915_wa_list *wal)
 	 * then we can just rely on the default steering and won't need to
 	 * worry about explicitly re-steering L3BANK reads later.
 	 */
-	if (i915->gt.info.l3bank_mask & BIT(subslice))
-		i915->gt.steering_table[L3BANK] = NULL;
+	if (gt->info.l3bank_mask & BIT(subslice))
+		gt->steering_table[L3BANK] = NULL;
 
-	__add_mcr_wa(i915, wal, slice, subslice);
+	__add_mcr_wa(gt, wal, slice, subslice);
 }
 
 static void
 xehp_init_mcr(struct intel_gt *gt, struct i915_wa_list *wal)
 {
-	struct drm_i915_private *i915 = gt->i915;
 	const struct sseu_dev_info *sseu = &gt->info.sseu;
 	unsigned long slice, subslice = 0, slice_mask = 0;
 	u64 dss_mask = 0;
@@ -1083,7 +1082,7 @@ xehp_init_mcr(struct intel_gt *gt, struct i915_wa_list *wal)
 	WARN_ON(subslice > GEN_DSS_PER_GSLICE);
 	WARN_ON(dss_mask >> (slice * GEN_DSS_PER_GSLICE) == 0);
 
-	__add_mcr_wa(i915, wal, slice, subslice);
+	__add_mcr_wa(gt, wal, slice, subslice);
 
 	/*
 	 * SQIDI ranges are special because they use different steering
@@ -1099,9 +1098,11 @@ xehp_init_mcr(struct intel_gt *gt, struct i915_wa_list *wal)
 }
 
 static void
-icl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+icl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
-	icl_wa_init_mcr(i915, wal);
+	struct drm_i915_private *i915 = gt->i915;
+
+	icl_wa_init_mcr(gt, wal);
 
 	/* WaModifyGamTlbPartitioning:icl */
 	wa_write_clr_set(wal,
@@ -1152,10 +1153,9 @@ icl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
  * the engine-specific workaround list.
  */
 static void
-wa_14011060649(struct drm_i915_private *i915, struct i915_wa_list *wal)
+wa_14011060649(struct intel_gt *gt, struct i915_wa_list *wal)
 {
 	struct intel_engine_cs *engine;
-	struct intel_gt *gt = &i915->gt;
 	int id;
 
 	for_each_engine(engine, gt, id) {
@@ -1169,22 +1169,23 @@ wa_14011060649(struct drm_i915_private *i915, struct i915_wa_list *wal)
 }
 
 static void
-gen12_gt_workarounds_init(struct drm_i915_private *i915,
-			  struct i915_wa_list *wal)
+gen12_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
-	icl_wa_init_mcr(i915, wal);
+	icl_wa_init_mcr(gt, wal);
 
 	/* Wa_14011060649:tgl,rkl,dg1,adl-s,adl-p */
-	wa_14011060649(i915, wal);
+	wa_14011060649(gt, wal);
 
 	/* Wa_14011059788:tgl,rkl,adl-s,dg1,adl-p */
 	wa_write_or(wal, GEN10_DFR_RATIO_EN_AND_CHICKEN, DFR_DISABLE);
 }
 
 static void
-tgl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+tgl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
-	gen12_gt_workarounds_init(i915, wal);
+	struct drm_i915_private *i915 = gt->i915;
+
+	gen12_gt_workarounds_init(gt, wal);
 
 	/* Wa_1409420604:tgl */
 	if (IS_TGL_UY_GT_STEP(i915, STEP_A0, STEP_B0))
@@ -1205,9 +1206,11 @@ tgl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
 }
 
 static void
-dg1_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+dg1_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
-	gen12_gt_workarounds_init(i915, wal);
+	struct drm_i915_private *i915 = gt->i915;
+
+	gen12_gt_workarounds_init(gt, wal);
 
 	/* Wa_1607087056:dg1 */
 	if (IS_DG1_GT_STEP(i915, STEP_A0, STEP_B0))
@@ -1229,60 +1232,62 @@ dg1_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
 }
 
 static void
-xehpsdv_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+xehpsdv_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
-	xehp_init_mcr(&i915->gt, wal);
+	xehp_init_mcr(gt, wal);
 }
 
 static void
-gt_init_workarounds(struct drm_i915_private *i915, struct i915_wa_list *wal)
+gt_init_workarounds(struct intel_gt *gt, struct i915_wa_list *wal)
 {
+	struct drm_i915_private *i915 = gt->i915;
+
 	if (IS_XEHPSDV(i915))
-		xehpsdv_gt_workarounds_init(i915, wal);
+		xehpsdv_gt_workarounds_init(gt, wal);
 	else if (IS_DG1(i915))
-		dg1_gt_workarounds_init(i915, wal);
+		dg1_gt_workarounds_init(gt, wal);
 	else if (IS_TIGERLAKE(i915))
-		tgl_gt_workarounds_init(i915, wal);
+		tgl_gt_workarounds_init(gt, wal);
 	else if (GRAPHICS_VER(i915) == 12)
-		gen12_gt_workarounds_init(i915, wal);
+		gen12_gt_workarounds_init(gt, wal);
 	else if (GRAPHICS_VER(i915) == 11)
-		icl_gt_workarounds_init(i915, wal);
+		icl_gt_workarounds_init(gt, wal);
 	else if (IS_COFFEELAKE(i915) || IS_COMETLAKE(i915))
-		cfl_gt_workarounds_init(i915, wal);
+		cfl_gt_workarounds_init(gt, wal);
 	else if (IS_GEMINILAKE(i915))
-		glk_gt_workarounds_init(i915, wal);
+		glk_gt_workarounds_init(gt, wal);
 	else if (IS_KABYLAKE(i915))
-		kbl_gt_workarounds_init(i915, wal);
+		kbl_gt_workarounds_init(gt, wal);
 	else if (IS_BROXTON(i915))
-		gen9_gt_workarounds_init(i915, wal);
+		gen9_gt_workarounds_init(gt, wal);
 	else if (IS_SKYLAKE(i915))
-		skl_gt_workarounds_init(i915, wal);
+		skl_gt_workarounds_init(gt, wal);
 	else if (IS_HASWELL(i915))
-		hsw_gt_workarounds_init(i915, wal);
+		hsw_gt_workarounds_init(gt, wal);
 	else if (IS_VALLEYVIEW(i915))
-		vlv_gt_workarounds_init(i915, wal);
+		vlv_gt_workarounds_init(gt, wal);
 	else if (IS_IVYBRIDGE(i915))
-		ivb_gt_workarounds_init(i915, wal);
+		ivb_gt_workarounds_init(gt, wal);
 	else if (GRAPHICS_VER(i915) == 6)
-		snb_gt_workarounds_init(i915, wal);
+		snb_gt_workarounds_init(gt, wal);
 	else if (GRAPHICS_VER(i915) == 5)
-		ilk_gt_workarounds_init(i915, wal);
+		ilk_gt_workarounds_init(gt, wal);
 	else if (IS_G4X(i915))
-		g4x_gt_workarounds_init(i915, wal);
+		g4x_gt_workarounds_init(gt, wal);
 	else if (GRAPHICS_VER(i915) == 4)
-		gen4_gt_workarounds_init(i915, wal);
+		gen4_gt_workarounds_init(gt, wal);
 	else if (GRAPHICS_VER(i915) <= 8)
 		;
 	else
 		MISSING_CASE(GRAPHICS_VER(i915));
 }
 
-void intel_gt_init_workarounds(struct drm_i915_private *i915)
+void intel_gt_init_workarounds(struct intel_gt *gt)
 {
-	struct i915_wa_list *wal = &i915->gt_wa_list;
+	struct i915_wa_list *wal = &gt->wa_list;
 
 	wa_init_start(wal, "GT", "global");
-	gt_init_workarounds(i915, wal);
+	gt_init_workarounds(gt, wal);
 	wa_init_finish(wal);
 }
 
@@ -1353,7 +1358,7 @@ wa_list_apply(struct intel_gt *gt, const struct i915_wa_list *wal)
 
 void intel_gt_apply_workarounds(struct intel_gt *gt)
 {
-	wa_list_apply(gt, &gt->i915->gt_wa_list);
+	wa_list_apply(gt, &gt->wa_list);
 }
 
 static bool wa_list_verify(struct intel_gt *gt,
@@ -1385,7 +1390,7 @@ static bool wa_list_verify(struct intel_gt *gt,
 
 bool intel_gt_verify_workarounds(struct intel_gt *gt, const char *from)
 {
-	return wa_list_verify(gt, &gt->i915->gt_wa_list, from);
+	return wa_list_verify(gt, &gt->wa_list, from);
 }
 
 __maybe_unused
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.h b/drivers/gpu/drm/i915/gt/intel_workarounds.h
index 15abb68b6c00..9beaab77c7f0 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.h
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.h
@@ -24,7 +24,7 @@ static inline void intel_wa_list_free(struct i915_wa_list *wal)
 void intel_engine_init_ctx_wa(struct intel_engine_cs *engine);
 int intel_engine_emit_ctx_wa(struct i915_request *rq);
 
-void intel_gt_init_workarounds(struct drm_i915_private *i915);
+void intel_gt_init_workarounds(struct intel_gt *gt);
 void intel_gt_apply_workarounds(struct intel_gt *gt);
 bool intel_gt_verify_workarounds(struct intel_gt *gt, const char *from);
 
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index e623ac45f4aa..962e91ba3be4 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -66,7 +66,7 @@ reference_lists_init(struct intel_gt *gt, struct wa_lists *lists)
 	memset(lists, 0, sizeof(*lists));
 
 	wa_init_start(&lists->gt_wa_list, "GT_REF", "global");
-	gt_init_workarounds(gt->i915, &lists->gt_wa_list);
+	gt_init_workarounds(gt, &lists->gt_wa_list);
 	wa_init_finish(&lists->gt_wa_list);
 
 	for_each_engine(engine, gt, id) {
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 59fb4c710c8c..3cf61bead2f6 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -588,8 +588,6 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
 
 	pci_set_master(pdev);
 
-	intel_gt_init_workarounds(dev_priv);
-
 	/* On the 945G/GM, the chipset reports the MSI capability on the
 	 * integrated graphics even though the support isn't actually there
 	 * according to the published specs.  It doesn't appear to function
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 37c1ca266bcd..93c23eaf3fc7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -998,8 +998,6 @@ struct drm_i915_private {
 
 	struct list_head global_obj_list;
 
-	struct i915_wa_list gt_wa_list;
-
 	struct i915_frontbuffer_tracking fb_tracking;
 
 	struct intel_atomic_helper {
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 590efc8b0265..981e383d1a5d 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1139,8 +1139,6 @@ void i915_gem_driver_release(struct drm_i915_private *dev_priv)
 {
 	intel_gt_driver_release(&dev_priv->gt);
 
-	intel_wa_list_free(&dev_priv->gt_wa_list);
-
 	intel_uc_cleanup_firmwares(&dev_priv->gt.uc);
 
 	i915_gem_drain_freed_objects(dev_priv);
-- 
2.33.0


^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [Intel-gfx] [PATCH] drm/i915: Make wa list per-gt
@ 2021-09-17 17:08 ` Matt Roper
  0 siblings, 0 replies; 13+ messages in thread
From: Matt Roper @ 2021-09-17 17:08 UTC (permalink / raw)
  To: intel-gfx
  Cc: dri-devel, matthew.d.roper, Venkata Sandeep Dhanalakota,
	Tvrtko Ursulin, Daniele Ceraolo Spurio

From: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>

Support for multiple GT's within a single i915 device will be arriving
soon.  Since each GT may have its own fusing and require different
workarounds, we need to make the GT workaround functions and multicast
steering setup per-gt.

Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_gt.c            |   3 +
 drivers/gpu/drm/i915/gt/intel_gt_types.h      |   2 +
 drivers/gpu/drm/i915/gt/intel_workarounds.c   | 143 +++++++++---------
 drivers/gpu/drm/i915/gt/intel_workarounds.h   |   2 +-
 .../gpu/drm/i915/gt/selftest_workarounds.c    |   2 +-
 drivers/gpu/drm/i915/i915_drv.c               |   2 -
 drivers/gpu/drm/i915/i915_drv.h               |   2 -
 drivers/gpu/drm/i915/i915_gem.c               |   2 -
 8 files changed, 81 insertions(+), 77 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index 55e87aff51d2..449ff6e83543 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -660,6 +660,8 @@ int intel_gt_init(struct intel_gt *gt)
 	if (err)
 		return err;
 
+	intel_gt_init_workarounds(gt);
+
 	/*
 	 * This is just a security blanket to placate dragons.
 	 * On some systems, we very sporadically observe that the first TLBs
@@ -767,6 +769,7 @@ void intel_gt_driver_release(struct intel_gt *gt)
 	if (vm) /* FIXME being called twice on error paths :( */
 		i915_vm_put(vm);
 
+	intel_wa_list_free(&gt->wa_list);
 	intel_gt_pm_fini(gt);
 	intel_gt_fini_scratch(gt);
 	intel_gt_fini_buffer_pool(gt);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h b/drivers/gpu/drm/i915/gt/intel_gt_types.h
index 6fdcde64c180..ce127cae9e49 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
@@ -72,6 +72,8 @@ struct intel_gt {
 
 	struct intel_uc uc;
 
+	struct i915_wa_list wa_list;
+
 	struct intel_gt_timelines {
 		spinlock_t lock; /* protects active_list */
 		struct list_head active_list;
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index c314d4917b6b..1f0a54b383d9 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -804,7 +804,7 @@ int intel_engine_emit_ctx_wa(struct i915_request *rq)
 }
 
 static void
-gen4_gt_workarounds_init(struct drm_i915_private *i915,
+gen4_gt_workarounds_init(struct intel_gt *gt,
 			 struct i915_wa_list *wal)
 {
 	/* WaDisable_RenderCache_OperationalFlush:gen4,ilk */
@@ -812,29 +812,29 @@ gen4_gt_workarounds_init(struct drm_i915_private *i915,
 }
 
 static void
-g4x_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+g4x_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
-	gen4_gt_workarounds_init(i915, wal);
+	gen4_gt_workarounds_init(gt, wal);
 
 	/* WaDisableRenderCachePipelinedFlush:g4x,ilk */
 	wa_masked_en(wal, CACHE_MODE_0, CM0_PIPELINED_RENDER_FLUSH_DISABLE);
 }
 
 static void
-ilk_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+ilk_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
-	g4x_gt_workarounds_init(i915, wal);
+	g4x_gt_workarounds_init(gt, wal);
 
 	wa_masked_en(wal, _3D_CHICKEN2, _3D_CHICKEN2_WM_READ_PIPELINED);
 }
 
 static void
-snb_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+snb_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
 }
 
 static void
-ivb_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+ivb_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
 	/* Apply the WaDisableRHWOOptimizationForRenderHang:ivb workaround. */
 	wa_masked_dis(wal,
@@ -850,7 +850,7 @@ ivb_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
 }
 
 static void
-vlv_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+vlv_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
 	/* WaForceL3Serialization:vlv */
 	wa_write_clr(wal, GEN7_L3SQCREG4, L3SQ_URB_READ_CAM_MATCH_DISABLE);
@@ -863,7 +863,7 @@ vlv_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
 }
 
 static void
-hsw_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+hsw_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
 	/* L3 caching of data atomics doesn't work -- disable it. */
 	wa_write(wal, HSW_SCRATCH1, HSW_SCRATCH1_L3_DATA_ATOMICS_DISABLE);
@@ -878,15 +878,15 @@ hsw_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
 }
 
 static void
-gen9_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+gen9_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
 	/* WaDisableKillLogic:bxt,skl,kbl */
-	if (!IS_COFFEELAKE(i915) && !IS_COMETLAKE(i915))
+	if (!IS_COFFEELAKE(gt->i915) && !IS_COMETLAKE(gt->i915))
 		wa_write_or(wal,
 			    GAM_ECOCHK,
 			    ECOCHK_DIS_TLB);
 
-	if (HAS_LLC(i915)) {
+	if (HAS_LLC(gt->i915)) {
 		/* WaCompressedResourceSamplerPbeMediaNewHashMode:skl,kbl
 		 *
 		 * Must match Display Engine. See
@@ -904,9 +904,9 @@ gen9_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal
 }
 
 static void
-skl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+skl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
-	gen9_gt_workarounds_init(i915, wal);
+	gen9_gt_workarounds_init(gt, wal);
 
 	/* WaDisableGafsUnitClkGating:skl */
 	wa_write_or(wal,
@@ -914,19 +914,19 @@ skl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
 		    GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE);
 
 	/* WaInPlaceDecompressionHang:skl */
-	if (IS_SKL_GT_STEP(i915, STEP_A0, STEP_H0))
+	if (IS_SKL_GT_STEP(gt->i915, STEP_A0, STEP_H0))
 		wa_write_or(wal,
 			    GEN9_GAMT_ECO_REG_RW_IA,
 			    GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS);
 }
 
 static void
-kbl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+kbl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
-	gen9_gt_workarounds_init(i915, wal);
+	gen9_gt_workarounds_init(gt, wal);
 
 	/* WaDisableDynamicCreditSharing:kbl */
-	if (IS_KBL_GT_STEP(i915, 0, STEP_C0))
+	if (IS_KBL_GT_STEP(gt->i915, 0, STEP_C0))
 		wa_write_or(wal,
 			    GAMT_CHKN_BIT_REG,
 			    GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING);
@@ -943,15 +943,15 @@ kbl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
 }
 
 static void
-glk_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+glk_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
-	gen9_gt_workarounds_init(i915, wal);
+	gen9_gt_workarounds_init(gt, wal);
 }
 
 static void
-cfl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+cfl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
-	gen9_gt_workarounds_init(i915, wal);
+	gen9_gt_workarounds_init(gt, wal);
 
 	/* WaDisableGafsUnitClkGating:cfl */
 	wa_write_or(wal,
@@ -976,21 +976,21 @@ static void __set_mcr_steering(struct i915_wa_list *wal,
 	wa_write_clr_set(wal, steering_reg, mcr_mask, mcr);
 }
 
-static void __add_mcr_wa(struct drm_i915_private *i915, struct i915_wa_list *wal,
+static void __add_mcr_wa(struct intel_gt *gt, struct i915_wa_list *wal,
 			 unsigned int slice, unsigned int subslice)
 {
-	drm_dbg(&i915->drm, "MCR slice=0x%x, subslice=0x%x\n", slice, subslice);
+	drm_dbg(&gt->i915->drm, "MCR slice=0x%x, subslice=0x%x\n", slice, subslice);
 
 	__set_mcr_steering(wal, GEN8_MCR_SELECTOR, slice, subslice);
 }
 
 static void
-icl_wa_init_mcr(struct drm_i915_private *i915, struct i915_wa_list *wal)
+icl_wa_init_mcr(struct intel_gt *gt, struct i915_wa_list *wal)
 {
-	const struct sseu_dev_info *sseu = &i915->gt.info.sseu;
+	const struct sseu_dev_info *sseu = &gt->info.sseu;
 	unsigned int slice, subslice;
 
-	GEM_BUG_ON(GRAPHICS_VER(i915) < 11);
+	GEM_BUG_ON(GRAPHICS_VER(gt->i915) < 11);
 	GEM_BUG_ON(hweight8(sseu->slice_mask) > 1);
 	slice = 0;
 
@@ -1010,16 +1010,15 @@ icl_wa_init_mcr(struct drm_i915_private *i915, struct i915_wa_list *wal)
 	 * then we can just rely on the default steering and won't need to
 	 * worry about explicitly re-steering L3BANK reads later.
 	 */
-	if (i915->gt.info.l3bank_mask & BIT(subslice))
-		i915->gt.steering_table[L3BANK] = NULL;
+	if (gt->info.l3bank_mask & BIT(subslice))
+		gt->steering_table[L3BANK] = NULL;
 
-	__add_mcr_wa(i915, wal, slice, subslice);
+	__add_mcr_wa(gt, wal, slice, subslice);
 }
 
 static void
 xehp_init_mcr(struct intel_gt *gt, struct i915_wa_list *wal)
 {
-	struct drm_i915_private *i915 = gt->i915;
 	const struct sseu_dev_info *sseu = &gt->info.sseu;
 	unsigned long slice, subslice = 0, slice_mask = 0;
 	u64 dss_mask = 0;
@@ -1083,7 +1082,7 @@ xehp_init_mcr(struct intel_gt *gt, struct i915_wa_list *wal)
 	WARN_ON(subslice > GEN_DSS_PER_GSLICE);
 	WARN_ON(dss_mask >> (slice * GEN_DSS_PER_GSLICE) == 0);
 
-	__add_mcr_wa(i915, wal, slice, subslice);
+	__add_mcr_wa(gt, wal, slice, subslice);
 
 	/*
 	 * SQIDI ranges are special because they use different steering
@@ -1099,9 +1098,11 @@ xehp_init_mcr(struct intel_gt *gt, struct i915_wa_list *wal)
 }
 
 static void
-icl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+icl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
-	icl_wa_init_mcr(i915, wal);
+	struct drm_i915_private *i915 = gt->i915;
+
+	icl_wa_init_mcr(gt, wal);
 
 	/* WaModifyGamTlbPartitioning:icl */
 	wa_write_clr_set(wal,
@@ -1152,10 +1153,9 @@ icl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
  * the engine-specific workaround list.
  */
 static void
-wa_14011060649(struct drm_i915_private *i915, struct i915_wa_list *wal)
+wa_14011060649(struct intel_gt *gt, struct i915_wa_list *wal)
 {
 	struct intel_engine_cs *engine;
-	struct intel_gt *gt = &i915->gt;
 	int id;
 
 	for_each_engine(engine, gt, id) {
@@ -1169,22 +1169,23 @@ wa_14011060649(struct drm_i915_private *i915, struct i915_wa_list *wal)
 }
 
 static void
-gen12_gt_workarounds_init(struct drm_i915_private *i915,
-			  struct i915_wa_list *wal)
+gen12_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
-	icl_wa_init_mcr(i915, wal);
+	icl_wa_init_mcr(gt, wal);
 
 	/* Wa_14011060649:tgl,rkl,dg1,adl-s,adl-p */
-	wa_14011060649(i915, wal);
+	wa_14011060649(gt, wal);
 
 	/* Wa_14011059788:tgl,rkl,adl-s,dg1,adl-p */
 	wa_write_or(wal, GEN10_DFR_RATIO_EN_AND_CHICKEN, DFR_DISABLE);
 }
 
 static void
-tgl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+tgl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
-	gen12_gt_workarounds_init(i915, wal);
+	struct drm_i915_private *i915 = gt->i915;
+
+	gen12_gt_workarounds_init(gt, wal);
 
 	/* Wa_1409420604:tgl */
 	if (IS_TGL_UY_GT_STEP(i915, STEP_A0, STEP_B0))
@@ -1205,9 +1206,11 @@ tgl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
 }
 
 static void
-dg1_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+dg1_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
-	gen12_gt_workarounds_init(i915, wal);
+	struct drm_i915_private *i915 = gt->i915;
+
+	gen12_gt_workarounds_init(gt, wal);
 
 	/* Wa_1607087056:dg1 */
 	if (IS_DG1_GT_STEP(i915, STEP_A0, STEP_B0))
@@ -1229,60 +1232,62 @@ dg1_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
 }
 
 static void
-xehpsdv_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
+xehpsdv_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
-	xehp_init_mcr(&i915->gt, wal);
+	xehp_init_mcr(gt, wal);
 }
 
 static void
-gt_init_workarounds(struct drm_i915_private *i915, struct i915_wa_list *wal)
+gt_init_workarounds(struct intel_gt *gt, struct i915_wa_list *wal)
 {
+	struct drm_i915_private *i915 = gt->i915;
+
 	if (IS_XEHPSDV(i915))
-		xehpsdv_gt_workarounds_init(i915, wal);
+		xehpsdv_gt_workarounds_init(gt, wal);
 	else if (IS_DG1(i915))
-		dg1_gt_workarounds_init(i915, wal);
+		dg1_gt_workarounds_init(gt, wal);
 	else if (IS_TIGERLAKE(i915))
-		tgl_gt_workarounds_init(i915, wal);
+		tgl_gt_workarounds_init(gt, wal);
 	else if (GRAPHICS_VER(i915) == 12)
-		gen12_gt_workarounds_init(i915, wal);
+		gen12_gt_workarounds_init(gt, wal);
 	else if (GRAPHICS_VER(i915) == 11)
-		icl_gt_workarounds_init(i915, wal);
+		icl_gt_workarounds_init(gt, wal);
 	else if (IS_COFFEELAKE(i915) || IS_COMETLAKE(i915))
-		cfl_gt_workarounds_init(i915, wal);
+		cfl_gt_workarounds_init(gt, wal);
 	else if (IS_GEMINILAKE(i915))
-		glk_gt_workarounds_init(i915, wal);
+		glk_gt_workarounds_init(gt, wal);
 	else if (IS_KABYLAKE(i915))
-		kbl_gt_workarounds_init(i915, wal);
+		kbl_gt_workarounds_init(gt, wal);
 	else if (IS_BROXTON(i915))
-		gen9_gt_workarounds_init(i915, wal);
+		gen9_gt_workarounds_init(gt, wal);
 	else if (IS_SKYLAKE(i915))
-		skl_gt_workarounds_init(i915, wal);
+		skl_gt_workarounds_init(gt, wal);
 	else if (IS_HASWELL(i915))
-		hsw_gt_workarounds_init(i915, wal);
+		hsw_gt_workarounds_init(gt, wal);
 	else if (IS_VALLEYVIEW(i915))
-		vlv_gt_workarounds_init(i915, wal);
+		vlv_gt_workarounds_init(gt, wal);
 	else if (IS_IVYBRIDGE(i915))
-		ivb_gt_workarounds_init(i915, wal);
+		ivb_gt_workarounds_init(gt, wal);
 	else if (GRAPHICS_VER(i915) == 6)
-		snb_gt_workarounds_init(i915, wal);
+		snb_gt_workarounds_init(gt, wal);
 	else if (GRAPHICS_VER(i915) == 5)
-		ilk_gt_workarounds_init(i915, wal);
+		ilk_gt_workarounds_init(gt, wal);
 	else if (IS_G4X(i915))
-		g4x_gt_workarounds_init(i915, wal);
+		g4x_gt_workarounds_init(gt, wal);
 	else if (GRAPHICS_VER(i915) == 4)
-		gen4_gt_workarounds_init(i915, wal);
+		gen4_gt_workarounds_init(gt, wal);
 	else if (GRAPHICS_VER(i915) <= 8)
 		;
 	else
 		MISSING_CASE(GRAPHICS_VER(i915));
 }
 
-void intel_gt_init_workarounds(struct drm_i915_private *i915)
+void intel_gt_init_workarounds(struct intel_gt *gt)
 {
-	struct i915_wa_list *wal = &i915->gt_wa_list;
+	struct i915_wa_list *wal = &gt->wa_list;
 
 	wa_init_start(wal, "GT", "global");
-	gt_init_workarounds(i915, wal);
+	gt_init_workarounds(gt, wal);
 	wa_init_finish(wal);
 }
 
@@ -1353,7 +1358,7 @@ wa_list_apply(struct intel_gt *gt, const struct i915_wa_list *wal)
 
 void intel_gt_apply_workarounds(struct intel_gt *gt)
 {
-	wa_list_apply(gt, &gt->i915->gt_wa_list);
+	wa_list_apply(gt, &gt->wa_list);
 }
 
 static bool wa_list_verify(struct intel_gt *gt,
@@ -1385,7 +1390,7 @@ static bool wa_list_verify(struct intel_gt *gt,
 
 bool intel_gt_verify_workarounds(struct intel_gt *gt, const char *from)
 {
-	return wa_list_verify(gt, &gt->i915->gt_wa_list, from);
+	return wa_list_verify(gt, &gt->wa_list, from);
 }
 
 __maybe_unused
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.h b/drivers/gpu/drm/i915/gt/intel_workarounds.h
index 15abb68b6c00..9beaab77c7f0 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.h
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.h
@@ -24,7 +24,7 @@ static inline void intel_wa_list_free(struct i915_wa_list *wal)
 void intel_engine_init_ctx_wa(struct intel_engine_cs *engine);
 int intel_engine_emit_ctx_wa(struct i915_request *rq);
 
-void intel_gt_init_workarounds(struct drm_i915_private *i915);
+void intel_gt_init_workarounds(struct intel_gt *gt);
 void intel_gt_apply_workarounds(struct intel_gt *gt);
 bool intel_gt_verify_workarounds(struct intel_gt *gt, const char *from);
 
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index e623ac45f4aa..962e91ba3be4 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -66,7 +66,7 @@ reference_lists_init(struct intel_gt *gt, struct wa_lists *lists)
 	memset(lists, 0, sizeof(*lists));
 
 	wa_init_start(&lists->gt_wa_list, "GT_REF", "global");
-	gt_init_workarounds(gt->i915, &lists->gt_wa_list);
+	gt_init_workarounds(gt, &lists->gt_wa_list);
 	wa_init_finish(&lists->gt_wa_list);
 
 	for_each_engine(engine, gt, id) {
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 59fb4c710c8c..3cf61bead2f6 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -588,8 +588,6 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
 
 	pci_set_master(pdev);
 
-	intel_gt_init_workarounds(dev_priv);
-
 	/* On the 945G/GM, the chipset reports the MSI capability on the
 	 * integrated graphics even though the support isn't actually there
 	 * according to the published specs.  It doesn't appear to function
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 37c1ca266bcd..93c23eaf3fc7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -998,8 +998,6 @@ struct drm_i915_private {
 
 	struct list_head global_obj_list;
 
-	struct i915_wa_list gt_wa_list;
-
 	struct i915_frontbuffer_tracking fb_tracking;
 
 	struct intel_atomic_helper {
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 590efc8b0265..981e383d1a5d 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1139,8 +1139,6 @@ void i915_gem_driver_release(struct drm_i915_private *dev_priv)
 {
 	intel_gt_driver_release(&dev_priv->gt);
 
-	intel_wa_list_free(&dev_priv->gt_wa_list);
-
 	intel_uc_cleanup_firmwares(&dev_priv->gt.uc);
 
 	i915_gem_drain_freed_objects(dev_priv);
-- 
2.33.0


^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Make wa list per-gt
  2021-09-17 17:08 ` [Intel-gfx] " Matt Roper
  (?)
@ 2021-09-17 17:44 ` Patchwork
  2021-09-17 17:50   ` Matt Roper
  -1 siblings, 1 reply; 13+ messages in thread
From: Patchwork @ 2021-09-17 17:44 UTC (permalink / raw)
  To: Matt Roper; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 11157 bytes --]

== Series Details ==

Series: drm/i915: Make wa list per-gt
URL   : https://patchwork.freedesktop.org/series/94811/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10604 -> Patchwork_21086
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_21086 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21086, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_21086:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_flip@basic-plain-flip@c-dp1:
    - fi-cfl-8109u:       [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10604/fi-cfl-8109u/igt@kms_flip@basic-plain-flip@c-dp1.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-cfl-8109u/igt@kms_flip@basic-plain-flip@c-dp1.html

  
#### Warnings ####

  * igt@i915_module_load@reload:
    - fi-kbl-soraka:      [INCOMPLETE][3] ([i915#4130] / [i915#4136]) -> [INCOMPLETE][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10604/fi-kbl-soraka/igt@i915_module_load@reload.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-kbl-soraka/igt@i915_module_load@reload.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_module_load@reload:
    - {fi-ehl-2}:         [INCOMPLETE][5] ([i915#4136]) -> [INCOMPLETE][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10604/fi-ehl-2/igt@i915_module_load@reload.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-ehl-2/igt@i915_module_load@reload.html

  
Known issues
------------

  Here are the changes found in Patchwork_21086 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_basic@cs-gfx:
    - fi-rkl-guc:         NOTRUN -> [SKIP][7] ([fdo#109315]) +17 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-rkl-guc/igt@amdgpu/amd_basic@cs-gfx.html

  * igt@amdgpu/amd_cs_nop@sync-fork-gfx0:
    - fi-cfl-8700k:       NOTRUN -> [SKIP][8] ([fdo#109271]) +17 similar issues
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-cfl-8700k/igt@amdgpu/amd_cs_nop@sync-fork-gfx0.html

  * igt@core_hotunplug@unbind-rebind:
    - fi-cfl-guc:         [PASS][9] -> [INCOMPLETE][10] ([i915#4130])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10604/fi-cfl-guc/igt@core_hotunplug@unbind-rebind.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-cfl-guc/igt@core_hotunplug@unbind-rebind.html
    - fi-tgl-1115g4:      NOTRUN -> [INCOMPLETE][11] ([i915#4130])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-tgl-1115g4/igt@core_hotunplug@unbind-rebind.html
    - fi-kbl-7567u:       [PASS][12] -> [INCOMPLETE][13] ([i915#4130])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10604/fi-kbl-7567u/igt@core_hotunplug@unbind-rebind.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-kbl-7567u/igt@core_hotunplug@unbind-rebind.html

  * igt@gem_huc_copy@huc-copy:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][14] ([i915#2190])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-tgl-1115g4/igt@gem_huc_copy@huc-copy.html

  * igt@i915_module_load@reload:
    - fi-skl-6700k2:      NOTRUN -> [INCOMPLETE][15] ([i915#4130])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-skl-6700k2/igt@i915_module_load@reload.html
    - fi-skl-guc:         [PASS][16] -> [INCOMPLETE][17] ([i915#4130])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10604/fi-skl-guc/igt@i915_module_load@reload.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-skl-guc/igt@i915_module_load@reload.html
    - fi-kbl-guc:         [PASS][18] -> [INCOMPLETE][19] ([i915#4139])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10604/fi-kbl-guc/igt@i915_module_load@reload.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-kbl-guc/igt@i915_module_load@reload.html

  * igt@i915_pm_backlight@basic-brightness:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][20] ([i915#1155])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-tgl-1115g4/igt@i915_pm_backlight@basic-brightness.html

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][21] ([fdo#111827]) +8 similar issues
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-tgl-1115g4/igt@kms_chamelium@common-hpd-after-suspend.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][22] ([i915#4103]) +1 similar issue
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-tgl-1115g4/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_force_connector_basic@force-load-detect:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][23] ([fdo#109285])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-tgl-1115g4/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b:
    - fi-cfl-8109u:       [PASS][24] -> [DMESG-WARN][25] ([i915#295]) +14 similar issues
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10604/fi-cfl-8109u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-cfl-8109u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b.html

  * igt@kms_psr@primary_mmap_gtt:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][26] ([i915#1072]) +3 similar issues
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-tgl-1115g4/igt@kms_psr@primary_mmap_gtt.html

  * igt@prime_vgem@basic-userptr:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][27] ([i915#3301])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-tgl-1115g4/igt@prime_vgem@basic-userptr.html

  * igt@runner@aborted:
    - fi-kbl-8809g:       NOTRUN -> [FAIL][28] ([i915#2722] / [i915#3363])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-kbl-8809g/igt@runner@aborted.html
    - fi-tgl-1115g4:      NOTRUN -> [FAIL][29] ([i915#1602] / [i915#2722])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-tgl-1115g4/igt@runner@aborted.html
    - fi-skl-guc:         NOTRUN -> [FAIL][30] ([i915#2426] / [i915#3363])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-skl-guc/igt@runner@aborted.html
    - fi-skl-6700k2:      NOTRUN -> [FAIL][31] ([i915#2426] / [i915#3363])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-skl-6700k2/igt@runner@aborted.html

  
#### Possible fixes ####

  * igt@core_hotunplug@unbind-rebind:
    - fi-skl-6700k2:      [INCOMPLETE][32] ([i915#4130]) -> [PASS][33]
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10604/fi-skl-6700k2/igt@core_hotunplug@unbind-rebind.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-skl-6700k2/igt@core_hotunplug@unbind-rebind.html
    - fi-rkl-guc:         [INCOMPLETE][34] ([i915#4130]) -> [PASS][35]
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10604/fi-rkl-guc/igt@core_hotunplug@unbind-rebind.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-rkl-guc/igt@core_hotunplug@unbind-rebind.html

  * igt@i915_pm_rpm@module-reload:
    - fi-cfl-8700k:       [INCOMPLETE][36] -> [PASS][37]
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10604/fi-cfl-8700k/igt@i915_pm_rpm@module-reload.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-cfl-8700k/igt@i915_pm_rpm@module-reload.html

  
#### Warnings ####

  * igt@i915_module_load@reload:
    - fi-kbl-8809g:       [INCOMPLETE][38] -> [INCOMPLETE][39] ([i915#4136])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10604/fi-kbl-8809g/igt@i915_module_load@reload.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-kbl-8809g/igt@i915_module_load@reload.html
    - fi-icl-u2:          [INCOMPLETE][40] ([i915#4130] / [i915#4136]) -> [INCOMPLETE][41] ([i915#4130])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10604/fi-icl-u2/igt@i915_module_load@reload.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-icl-u2/igt@i915_module_load@reload.html
    - fi-cml-u2:          [INCOMPLETE][42] ([i915#4130] / [i915#4136]) -> [INCOMPLETE][43] ([i915#4136])
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10604/fi-cml-u2/igt@i915_module_load@reload.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-cml-u2/igt@i915_module_load@reload.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
  [i915#1602]: https://gitlab.freedesktop.org/drm/intel/issues/1602
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426
  [i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
  [i915#295]: https://gitlab.freedesktop.org/drm/intel/issues/295
  [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
  [i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4130]: https://gitlab.freedesktop.org/drm/intel/issues/4130
  [i915#4136]: https://gitlab.freedesktop.org/drm/intel/issues/4136
  [i915#4139]: https://gitlab.freedesktop.org/drm/intel/issues/4139


Participating hosts (38 -> 32)
------------------------------

  Additional (1): fi-tgl-1115g4 
  Missing    (7): fi-ilk-m540 bat-dg1-6 fi-tgl-u2 fi-hsw-4200u fi-ctg-p8600 bat-jsl-2 fi-bdw-samus 


Build changes
-------------

  * Linux: CI_DRM_10604 -> Patchwork_21086

  CI-20190529: 20190529
  CI_DRM_10604: febea2142ec3332a63b3a0afaee75163207e7060 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6211: 7b275b3eb17ddf6e7c5b7b9ba359b7f5345a5311 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_21086: 924016e893510cf65aeebc5ee571ff9618280f0c @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

924016e89351 drm/i915: Make wa list per-gt

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/index.html

[-- Attachment #2: Type: text/html, Size: 13691 bytes --]

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [Intel-gfx]  ✗ Fi.CI.BAT: failure for drm/i915: Make wa list per-gt
  2021-09-17 17:44 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
@ 2021-09-17 17:50   ` Matt Roper
  0 siblings, 0 replies; 13+ messages in thread
From: Matt Roper @ 2021-09-17 17:50 UTC (permalink / raw)
  To: intel-gfx; +Cc: Vudum, Lakshminarayana, damian.kijanczuk

On Fri, Sep 17, 2021 at 05:44:55PM +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915: Make wa list per-gt
> URL   : https://patchwork.freedesktop.org/series/94811/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_10604 -> Patchwork_21086
> ====================================================
> 
> Summary
> -------
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with Patchwork_21086 absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_21086, please notify your bug team to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/index.html
> 
> Possible new issues
> -------------------
> 
>   Here are the unknown changes that may have been introduced in Patchwork_21086:
> 
> ### IGT changes ###
> 
> #### Possible regressions ####
> 
>   * igt@kms_flip@basic-plain-flip@c-dp1:
>     - fi-cfl-8109u:       [PASS][1] -> [FAIL][2]
>    [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10604/fi-cfl-8109u/igt@kms_flip@basic-plain-flip@c-dp1.html
>    [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-cfl-8109u/igt@kms_flip@basic-plain-flip@c-dp1.html

(kms_flip:5362) CRITICAL: Test assertion failure function __run_test_on_crtc_set, file ../tests/kms_flip.c:1333:
(kms_flip:5362) CRITICAL: Failed assertion: crtc_count > 1 || crtc_idxs[0] < 2

Not related to this GT workaround refactoring.


Matt

> 
>   
> #### Warnings ####
> 
>   * igt@i915_module_load@reload:
>     - fi-kbl-soraka:      [INCOMPLETE][3] ([i915#4130] / [i915#4136]) -> [INCOMPLETE][4]
>    [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10604/fi-kbl-soraka/igt@i915_module_load@reload.html
>    [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-kbl-soraka/igt@i915_module_load@reload.html
> 
>   
> #### Suppressed ####
> 
>   The following results come from untrusted machines, tests, or statuses.
>   They do not affect the overall result.
> 
>   * igt@i915_module_load@reload:
>     - {fi-ehl-2}:         [INCOMPLETE][5] ([i915#4136]) -> [INCOMPLETE][6]
>    [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10604/fi-ehl-2/igt@i915_module_load@reload.html
>    [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-ehl-2/igt@i915_module_load@reload.html
> 
>   
> Known issues
> ------------
> 
>   Here are the changes found in Patchwork_21086 that come from known issues:
> 
> ### IGT changes ###
> 
> #### Issues hit ####
> 
>   * igt@amdgpu/amd_basic@cs-gfx:
>     - fi-rkl-guc:         NOTRUN -> [SKIP][7] ([fdo#109315]) +17 similar issues
>    [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-rkl-guc/igt@amdgpu/amd_basic@cs-gfx.html
> 
>   * igt@amdgpu/amd_cs_nop@sync-fork-gfx0:
>     - fi-cfl-8700k:       NOTRUN -> [SKIP][8] ([fdo#109271]) +17 similar issues
>    [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-cfl-8700k/igt@amdgpu/amd_cs_nop@sync-fork-gfx0.html
> 
>   * igt@core_hotunplug@unbind-rebind:
>     - fi-cfl-guc:         [PASS][9] -> [INCOMPLETE][10] ([i915#4130])
>    [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10604/fi-cfl-guc/igt@core_hotunplug@unbind-rebind.html
>    [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-cfl-guc/igt@core_hotunplug@unbind-rebind.html
>     - fi-tgl-1115g4:      NOTRUN -> [INCOMPLETE][11] ([i915#4130])
>    [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-tgl-1115g4/igt@core_hotunplug@unbind-rebind.html
>     - fi-kbl-7567u:       [PASS][12] -> [INCOMPLETE][13] ([i915#4130])
>    [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10604/fi-kbl-7567u/igt@core_hotunplug@unbind-rebind.html
>    [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-kbl-7567u/igt@core_hotunplug@unbind-rebind.html
> 
>   * igt@gem_huc_copy@huc-copy:
>     - fi-tgl-1115g4:      NOTRUN -> [SKIP][14] ([i915#2190])
>    [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-tgl-1115g4/igt@gem_huc_copy@huc-copy.html
> 
>   * igt@i915_module_load@reload:
>     - fi-skl-6700k2:      NOTRUN -> [INCOMPLETE][15] ([i915#4130])
>    [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-skl-6700k2/igt@i915_module_load@reload.html
>     - fi-skl-guc:         [PASS][16] -> [INCOMPLETE][17] ([i915#4130])
>    [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10604/fi-skl-guc/igt@i915_module_load@reload.html
>    [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-skl-guc/igt@i915_module_load@reload.html
>     - fi-kbl-guc:         [PASS][18] -> [INCOMPLETE][19] ([i915#4139])
>    [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10604/fi-kbl-guc/igt@i915_module_load@reload.html
>    [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-kbl-guc/igt@i915_module_load@reload.html
> 
>   * igt@i915_pm_backlight@basic-brightness:
>     - fi-tgl-1115g4:      NOTRUN -> [SKIP][20] ([i915#1155])
>    [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-tgl-1115g4/igt@i915_pm_backlight@basic-brightness.html
> 
>   * igt@kms_chamelium@common-hpd-after-suspend:
>     - fi-tgl-1115g4:      NOTRUN -> [SKIP][21] ([fdo#111827]) +8 similar issues
>    [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-tgl-1115g4/igt@kms_chamelium@common-hpd-after-suspend.html
> 
>   * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
>     - fi-tgl-1115g4:      NOTRUN -> [SKIP][22] ([i915#4103]) +1 similar issue
>    [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-tgl-1115g4/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
> 
>   * igt@kms_force_connector_basic@force-load-detect:
>     - fi-tgl-1115g4:      NOTRUN -> [SKIP][23] ([fdo#109285])
>    [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-tgl-1115g4/igt@kms_force_connector_basic@force-load-detect.html
> 
>   * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b:
>     - fi-cfl-8109u:       [PASS][24] -> [DMESG-WARN][25] ([i915#295]) +14 similar issues
>    [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10604/fi-cfl-8109u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b.html
>    [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-cfl-8109u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b.html
> 
>   * igt@kms_psr@primary_mmap_gtt:
>     - fi-tgl-1115g4:      NOTRUN -> [SKIP][26] ([i915#1072]) +3 similar issues
>    [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-tgl-1115g4/igt@kms_psr@primary_mmap_gtt.html
> 
>   * igt@prime_vgem@basic-userptr:
>     - fi-tgl-1115g4:      NOTRUN -> [SKIP][27] ([i915#3301])
>    [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-tgl-1115g4/igt@prime_vgem@basic-userptr.html
> 
>   * igt@runner@aborted:
>     - fi-kbl-8809g:       NOTRUN -> [FAIL][28] ([i915#2722] / [i915#3363])
>    [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-kbl-8809g/igt@runner@aborted.html
>     - fi-tgl-1115g4:      NOTRUN -> [FAIL][29] ([i915#1602] / [i915#2722])
>    [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-tgl-1115g4/igt@runner@aborted.html
>     - fi-skl-guc:         NOTRUN -> [FAIL][30] ([i915#2426] / [i915#3363])
>    [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-skl-guc/igt@runner@aborted.html
>     - fi-skl-6700k2:      NOTRUN -> [FAIL][31] ([i915#2426] / [i915#3363])
>    [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-skl-6700k2/igt@runner@aborted.html
> 
>   
> #### Possible fixes ####
> 
>   * igt@core_hotunplug@unbind-rebind:
>     - fi-skl-6700k2:      [INCOMPLETE][32] ([i915#4130]) -> [PASS][33]
>    [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10604/fi-skl-6700k2/igt@core_hotunplug@unbind-rebind.html
>    [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-skl-6700k2/igt@core_hotunplug@unbind-rebind.html
>     - fi-rkl-guc:         [INCOMPLETE][34] ([i915#4130]) -> [PASS][35]
>    [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10604/fi-rkl-guc/igt@core_hotunplug@unbind-rebind.html
>    [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-rkl-guc/igt@core_hotunplug@unbind-rebind.html
> 
>   * igt@i915_pm_rpm@module-reload:
>     - fi-cfl-8700k:       [INCOMPLETE][36] -> [PASS][37]
>    [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10604/fi-cfl-8700k/igt@i915_pm_rpm@module-reload.html
>    [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-cfl-8700k/igt@i915_pm_rpm@module-reload.html
> 
>   
> #### Warnings ####
> 
>   * igt@i915_module_load@reload:
>     - fi-kbl-8809g:       [INCOMPLETE][38] -> [INCOMPLETE][39] ([i915#4136])
>    [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10604/fi-kbl-8809g/igt@i915_module_load@reload.html
>    [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-kbl-8809g/igt@i915_module_load@reload.html
>     - fi-icl-u2:          [INCOMPLETE][40] ([i915#4130] / [i915#4136]) -> [INCOMPLETE][41] ([i915#4130])
>    [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10604/fi-icl-u2/igt@i915_module_load@reload.html
>    [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-icl-u2/igt@i915_module_load@reload.html
>     - fi-cml-u2:          [INCOMPLETE][42] ([i915#4130] / [i915#4136]) -> [INCOMPLETE][43] ([i915#4136])
>    [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10604/fi-cml-u2/igt@i915_module_load@reload.html
>    [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/fi-cml-u2/igt@i915_module_load@reload.html
> 
>   
>   {name}: This element is suppressed. This means it is ignored when computing
>           the status of the difference (SUCCESS, WARNING, or FAILURE).
> 
>   [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
>   [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
>   [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
>   [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
>   [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
>   [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
>   [i915#1602]: https://gitlab.freedesktop.org/drm/intel/issues/1602
>   [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
>   [i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426
>   [i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
>   [i915#295]: https://gitlab.freedesktop.org/drm/intel/issues/295
>   [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
>   [i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
>   [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
>   [i915#4130]: https://gitlab.freedesktop.org/drm/intel/issues/4130
>   [i915#4136]: https://gitlab.freedesktop.org/drm/intel/issues/4136
>   [i915#4139]: https://gitlab.freedesktop.org/drm/intel/issues/4139
> 
> 
> Participating hosts (38 -> 32)
> ------------------------------
> 
>   Additional (1): fi-tgl-1115g4 
>   Missing    (7): fi-ilk-m540 bat-dg1-6 fi-tgl-u2 fi-hsw-4200u fi-ctg-p8600 bat-jsl-2 fi-bdw-samus 
> 
> 
> Build changes
> -------------
> 
>   * Linux: CI_DRM_10604 -> Patchwork_21086
> 
>   CI-20190529: 20190529
>   CI_DRM_10604: febea2142ec3332a63b3a0afaee75163207e7060 @ git://anongit.freedesktop.org/gfx-ci/linux
>   IGT_6211: 7b275b3eb17ddf6e7c5b7b9ba359b7f5345a5311 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
>   Patchwork_21086: 924016e893510cf65aeebc5ee571ff9618280f0c @ git://anongit.freedesktop.org/gfx-ci/linux
> 
> 
> == Linux commits ==
> 
> 924016e89351 drm/i915: Make wa list per-gt
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21086/index.html

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795

^ permalink raw reply	[flat|nested] 13+ messages in thread

* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Make wa list per-gt (rev2)
  2021-09-17 17:08 ` [Intel-gfx] " Matt Roper
  (?)
  (?)
@ 2021-09-18  0:31 ` Patchwork
  -1 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2021-09-18  0:31 UTC (permalink / raw)
  To: Matt Roper; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 8935 bytes --]

== Series Details ==

Series: drm/i915: Make wa list per-gt (rev2)
URL   : https://patchwork.freedesktop.org/series/94811/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10605 -> Patchwork_21091
====================================================

Summary
-------

  **WARNING**

  Minor unknown changes coming with Patchwork_21091 need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21091, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_21091:

### IGT changes ###

#### Warnings ####

  * igt@i915_module_load@reload:
    - fi-kbl-soraka:      [INCOMPLETE][1] ([i915#4130] / [i915#4136]) -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/fi-kbl-soraka/igt@i915_module_load@reload.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/fi-kbl-soraka/igt@i915_module_load@reload.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_module_load@reload:
    - {fi-ehl-2}:         [INCOMPLETE][3] ([i915#4136]) -> [INCOMPLETE][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/fi-ehl-2/igt@i915_module_load@reload.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/fi-ehl-2/igt@i915_module_load@reload.html

  * igt@i915_pm_rpm@module-reload:
    - {fi-jsl-1}:         [PASS][5] -> [INCOMPLETE][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/fi-jsl-1/igt@i915_pm_rpm@module-reload.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/fi-jsl-1/igt@i915_pm_rpm@module-reload.html

  * igt@runner@aborted:
    - {fi-jsl-1}:         NOTRUN -> [FAIL][7]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/fi-jsl-1/igt@runner@aborted.html

  
Known issues
------------

  Here are the changes found in Patchwork_21091 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_basic@cs-sdma:
    - fi-cfl-8109u:       NOTRUN -> [SKIP][8] ([fdo#109271]) +17 similar issues
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/fi-cfl-8109u/igt@amdgpu/amd_basic@cs-sdma.html

  * igt@amdgpu/amd_basic@semaphore:
    - fi-icl-y:           NOTRUN -> [SKIP][9] ([fdo#109315]) +17 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/fi-icl-y/igt@amdgpu/amd_basic@semaphore.html

  * igt@amdgpu/amd_cs_nop@sync-fork-gfx0:
    - fi-cfl-8700k:       NOTRUN -> [SKIP][10] ([fdo#109271]) +17 similar issues
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/fi-cfl-8700k/igt@amdgpu/amd_cs_nop@sync-fork-gfx0.html

  * igt@core_hotunplug@unbind-rebind:
    - fi-skl-6700k2:      [PASS][11] -> [INCOMPLETE][12] ([i915#4130])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/fi-skl-6700k2/igt@core_hotunplug@unbind-rebind.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/fi-skl-6700k2/igt@core_hotunplug@unbind-rebind.html

  * igt@i915_module_load@reload:
    - fi-cfl-guc:         [PASS][13] -> [INCOMPLETE][14] ([i915#4136])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/fi-cfl-guc/igt@i915_module_load@reload.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/fi-cfl-guc/igt@i915_module_load@reload.html
    - fi-rkl-guc:         [PASS][15] -> [INCOMPLETE][16] ([i915#4136])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/fi-rkl-guc/igt@i915_module_load@reload.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/fi-rkl-guc/igt@i915_module_load@reload.html
    - fi-kbl-7500u:       NOTRUN -> [INCOMPLETE][17] ([i915#4130])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/fi-kbl-7500u/igt@i915_module_load@reload.html

  * igt@runner@aborted:
    - fi-kbl-7500u:       NOTRUN -> [FAIL][18] ([i915#2426] / [i915#3363])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/fi-kbl-7500u/igt@runner@aborted.html
    - fi-rkl-guc:         NOTRUN -> [FAIL][19] ([i915#2722])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/fi-rkl-guc/igt@runner@aborted.html

  
#### Possible fixes ####

  * igt@core_hotunplug@unbind-rebind:
    - fi-cfl-8700k:       [INCOMPLETE][20] ([i915#4130]) -> [PASS][21]
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/fi-cfl-8700k/igt@core_hotunplug@unbind-rebind.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/fi-cfl-8700k/igt@core_hotunplug@unbind-rebind.html
    - fi-kbl-7500u:       [INCOMPLETE][22] ([i915#4130]) -> [PASS][23]
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/fi-kbl-7500u/igt@core_hotunplug@unbind-rebind.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/fi-kbl-7500u/igt@core_hotunplug@unbind-rebind.html
    - fi-cfl-8109u:       [INCOMPLETE][24] ([i915#4130]) -> [PASS][25]
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/fi-cfl-8109u/igt@core_hotunplug@unbind-rebind.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/fi-cfl-8109u/igt@core_hotunplug@unbind-rebind.html

  * igt@i915_module_load@reload:
    - fi-kbl-7567u:       [DMESG-WARN][26] ([i915#4136]) -> [PASS][27]
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/fi-kbl-7567u/igt@i915_module_load@reload.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/fi-kbl-7567u/igt@i915_module_load@reload.html
    - fi-skl-guc:         [DMESG-WARN][28] ([i915#4136]) -> [PASS][29]
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/fi-skl-guc/igt@i915_module_load@reload.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/fi-skl-guc/igt@i915_module_load@reload.html
    - fi-kbl-guc:         [INCOMPLETE][30] ([i915#4139]) -> [PASS][31]
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/fi-kbl-guc/igt@i915_module_load@reload.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/fi-kbl-guc/igt@i915_module_load@reload.html

  
#### Warnings ####

  * igt@i915_module_load@reload:
    - fi-kbl-8809g:       [INCOMPLETE][32] ([i915#4136]) -> [INCOMPLETE][33] ([i915#4130])
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/fi-kbl-8809g/igt@i915_module_load@reload.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/fi-kbl-8809g/igt@i915_module_load@reload.html
    - fi-cml-u2:          [INCOMPLETE][34] ([i915#4130] / [i915#4136]) -> [INCOMPLETE][35] ([i915#4136])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/fi-cml-u2/igt@i915_module_load@reload.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/fi-cml-u2/igt@i915_module_load@reload.html
    - fi-icl-y:           [INCOMPLETE][36] ([i915#4130]) -> [TIMEOUT][37] ([i915#4136])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/fi-icl-y/igt@i915_module_load@reload.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/fi-icl-y/igt@i915_module_load@reload.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426
  [i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
  [i915#2932]: https://gitlab.freedesktop.org/drm/intel/issues/2932
  [i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
  [i915#3690]: https://gitlab.freedesktop.org/drm/intel/issues/3690
  [i915#4130]: https://gitlab.freedesktop.org/drm/intel/issues/4130
  [i915#4136]: https://gitlab.freedesktop.org/drm/intel/issues/4136
  [i915#4139]: https://gitlab.freedesktop.org/drm/intel/issues/4139


Participating hosts (38 -> 31)
------------------------------

  Missing    (7): fi-ilk-m540 bat-dg1-6 fi-tgl-u2 fi-hsw-4200u fi-ctg-p8600 bat-jsl-2 fi-bdw-samus 


Build changes
-------------

  * Linux: CI_DRM_10605 -> Patchwork_21091

  CI-20190529: 20190529
  CI_DRM_10605: e61e36045f57a5aaeef91f54274937843ee3d0d5 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6211: 7b275b3eb17ddf6e7c5b7b9ba359b7f5345a5311 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_21091: 66f78983c011b9feb4c2912ebc997d3f9f19116d @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

66f78983c011 drm/i915: Make wa list per-gt

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/index.html

[-- Attachment #2: Type: text/html, Size: 11112 bytes --]

^ permalink raw reply	[flat|nested] 13+ messages in thread

* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Make wa list per-gt (rev2)
  2021-09-17 17:08 ` [Intel-gfx] " Matt Roper
                   ` (2 preceding siblings ...)
  (?)
@ 2021-09-18  1:46 ` Patchwork
  2021-09-20 14:53   ` Matt Roper
  -1 siblings, 1 reply; 13+ messages in thread
From: Patchwork @ 2021-09-18  1:46 UTC (permalink / raw)
  To: Matt Roper; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 27605 bytes --]

== Series Details ==

Series: drm/i915: Make wa list per-gt (rev2)
URL   : https://patchwork.freedesktop.org/series/94811/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10605_full -> Patchwork_21091_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_21091_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21091_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_21091_full:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_atomic@plane-invalid-params:
    - shard-iclb:         [PASS][1] -> [DMESG-WARN][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb6/igt@kms_atomic@plane-invalid-params.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb2/igt@kms_atomic@plane-invalid-params.html

  * igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_mc_ccs:
    - shard-kbl:          NOTRUN -> [INCOMPLETE][3]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl2/igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_mc_ccs.html

  * igt@kms_sequence@queue-idle:
    - shard-skl:          [PASS][4] -> [FAIL][5]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl8/igt@kms_sequence@queue-idle.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl3/igt@kms_sequence@queue-idle.html

  
Known issues
------------

  Here are the changes found in Patchwork_21091_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@drm_import_export@flink:
    - shard-tglb:         [PASS][6] -> [INCOMPLETE][7] ([i915#750])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-tglb7/igt@drm_import_export@flink.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb2/igt@drm_import_export@flink.html

  * igt@gem_ctx_isolation@preservation-s3@vcs0:
    - shard-skl:          [PASS][8] -> [INCOMPLETE][9] ([i915#146] / [i915#198])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl6/igt@gem_ctx_isolation@preservation-s3@vcs0.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl4/igt@gem_ctx_isolation@preservation-s3@vcs0.html

  * igt@gem_ctx_sseu@engines:
    - shard-skl:          NOTRUN -> [SKIP][10] ([fdo#109271]) +9 similar issues
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl10/igt@gem_ctx_sseu@engines.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-tglb:         [PASS][11] -> [FAIL][12] ([i915#2842])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-tglb1/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb5/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_params@rsvd2-dirt:
    - shard-tglb:         NOTRUN -> [SKIP][13] ([fdo#109283])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@gem_exec_params@rsvd2-dirt.html

  * igt@gem_media_vme:
    - shard-tglb:         NOTRUN -> [SKIP][14] ([i915#284])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@gem_media_vme.html

  * igt@gem_pread@exhaustion:
    - shard-skl:          NOTRUN -> [WARN][15] ([i915#2658])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl8/igt@gem_pread@exhaustion.html

  * igt@gen9_exec_parse@valid-registers:
    - shard-tglb:         NOTRUN -> [SKIP][16] ([i915#2856])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@gen9_exec_parse@valid-registers.html

  * igt@i915_pm_rpm@pc8-residency:
    - shard-tglb:         NOTRUN -> [SKIP][17] ([fdo#109506] / [i915#2411])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@i915_pm_rpm@pc8-residency.html

  * igt@kms_big_fb@linear-8bpp-rotate-270:
    - shard-tglb:         NOTRUN -> [SKIP][18] ([fdo#111614]) +1 similar issue
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_big_fb@linear-8bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-kbl:          NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#3777])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl7/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
    - shard-tglb:         NOTRUN -> [SKIP][20] ([fdo#111615])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html

  * igt@kms_ccs@pipe-a-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc:
    - shard-kbl:          NOTRUN -> [SKIP][21] ([fdo#109271] / [i915#3886]) +7 similar issues
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl7/igt@kms_ccs@pipe-a-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][22] ([i915#3689] / [i915#3886])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-d-crc-primary-basic-yf_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][23] ([i915#3689]) +1 similar issue
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_ccs@pipe-d-crc-primary-basic-yf_tiled_ccs.html

  * igt@kms_ccs@pipe-d-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc:
    - shard-kbl:          NOTRUN -> [SKIP][24] ([fdo#109271]) +129 similar issues
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl4/igt@kms_ccs@pipe-d-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_chamelium@hdmi-hpd-for-each-pipe:
    - shard-kbl:          NOTRUN -> [SKIP][25] ([fdo#109271] / [fdo#111827]) +12 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl7/igt@kms_chamelium@hdmi-hpd-for-each-pipe.html

  * igt@kms_color_chamelium@pipe-b-ctm-negative:
    - shard-tglb:         NOTRUN -> [SKIP][26] ([fdo#109284] / [fdo#111827]) +2 similar issues
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_color_chamelium@pipe-b-ctm-negative.html

  * igt@kms_color_chamelium@pipe-c-gamma:
    - shard-skl:          NOTRUN -> [SKIP][27] ([fdo#109271] / [fdo#111827]) +3 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl8/igt@kms_color_chamelium@pipe-c-gamma.html

  * igt@kms_content_protection@dp-mst-lic-type-1:
    - shard-tglb:         NOTRUN -> [SKIP][28] ([i915#3116])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_content_protection@dp-mst-lic-type-1.html

  * igt@kms_content_protection@legacy:
    - shard-kbl:          NOTRUN -> [TIMEOUT][29] ([i915#1319])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl4/igt@kms_content_protection@legacy.html

  * igt@kms_cursor_crc@pipe-c-cursor-32x10-offscreen:
    - shard-tglb:         NOTRUN -> [SKIP][30] ([i915#3359])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_cursor_crc@pipe-c-cursor-32x10-offscreen.html

  * igt@kms_cursor_crc@pipe-d-cursor-512x512-offscreen:
    - shard-tglb:         NOTRUN -> [SKIP][31] ([fdo#109279] / [i915#3359])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_cursor_crc@pipe-d-cursor-512x512-offscreen.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-skl:          [PASS][32] -> [FAIL][33] ([i915#2346] / [i915#533])
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl10/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-edp1:
    - shard-tglb:         [PASS][34] -> [INCOMPLETE][35] ([i915#2411] / [i915#456]) +1 similar issue
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-tglb8/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb7/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html

  * igt@kms_flip@plain-flip-fb-recreate@b-edp1:
    - shard-skl:          [PASS][36] -> [FAIL][37] ([i915#2122]) +1 similar issue
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl8/igt@kms_flip@plain-flip-fb-recreate@b-edp1.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl3/igt@kms_flip@plain-flip-fb-recreate@b-edp1.html

  * igt@kms_flip@plain-flip-interruptible@a-edp1:
    - shard-skl:          [PASS][38] -> [DMESG-WARN][39] ([i915#1982])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl10/igt@kms_flip@plain-flip-interruptible@a-edp1.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl4/igt@kms_flip@plain-flip-interruptible@a-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs:
    - shard-iclb:         [PASS][40] -> [SKIP][41] ([i915#3701])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb7/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt:
    - shard-tglb:         NOTRUN -> [SKIP][42] ([fdo#111825]) +11 similar issues
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-kbl:          [PASS][43] -> [DMESG-WARN][44] ([i915#180]) +5 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl6/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence:
    - shard-kbl:          NOTRUN -> [SKIP][45] ([fdo#109271] / [i915#533])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl4/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
    - shard-tglb:         [PASS][46] -> [INCOMPLETE][47] ([i915#2828] / [i915#456])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-tglb6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html

  * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
    - shard-skl:          [PASS][48] -> [FAIL][49] ([fdo#108145] / [i915#265])
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl8/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl3/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html

  * igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb:
    - shard-kbl:          NOTRUN -> [FAIL][50] ([fdo#108145] / [i915#265]) +2 similar issues
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl2/igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb.html

  * igt@kms_plane_lowres@pipe-b-tiling-none:
    - shard-tglb:         NOTRUN -> [SKIP][51] ([i915#3536])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_plane_lowres@pipe-b-tiling-none.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3:
    - shard-kbl:          NOTRUN -> [SKIP][52] ([fdo#109271] / [i915#658]) +4 similar issues
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl2/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3.html

  * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5:
    - shard-tglb:         NOTRUN -> [SKIP][53] ([i915#2920]) +1 similar issue
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5.html

  * igt@kms_psr@psr2_no_drrs:
    - shard-iclb:         [PASS][54] -> [SKIP][55] ([fdo#109441]) +1 similar issue
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb2/igt@kms_psr@psr2_no_drrs.html
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb5/igt@kms_psr@psr2_no_drrs.html

  * igt@kms_writeback@writeback-fb-id:
    - shard-kbl:          NOTRUN -> [SKIP][56] ([fdo#109271] / [i915#2437])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl7/igt@kms_writeback@writeback-fb-id.html

  * igt@perf@polling-parameterized:
    - shard-skl:          [PASS][57] -> [FAIL][58] ([i915#1542])
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl7/igt@perf@polling-parameterized.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl5/igt@perf@polling-parameterized.html

  * igt@sysfs_clients@fair-7:
    - shard-tglb:         NOTRUN -> [SKIP][59] ([i915#2994])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@sysfs_clients@fair-7.html

  * igt@sysfs_clients@sema-50:
    - shard-kbl:          NOTRUN -> [SKIP][60] ([fdo#109271] / [i915#2994]) +2 similar issues
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl7/igt@sysfs_clients@sema-50.html

  
#### Possible fixes ####

  * igt@core_hotunplug@unbind-rebind:
    - shard-kbl:          [INCOMPLETE][61] ([i915#4130]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl3/igt@core_hotunplug@unbind-rebind.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl2/igt@core_hotunplug@unbind-rebind.html

  * igt@gem_eio@unwedge-stress:
    - shard-iclb:         [TIMEOUT][63] ([i915#2369] / [i915#2481] / [i915#3070]) -> [PASS][64]
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb8/igt@gem_eio@unwedge-stress.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb2/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_fair@basic-pace@vcs1:
    - shard-kbl:          [SKIP][65] ([fdo#109271]) -> [PASS][66]
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl6/igt@gem_exec_fair@basic-pace@vcs1.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl6/igt@gem_exec_fair@basic-pace@vcs1.html

  * igt@kms_cursor_crc@pipe-a-cursor-suspend:
    - shard-kbl:          [DMESG-WARN][67] ([i915#180]) -> [PASS][68] +5 similar issues
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl7/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
    - shard-skl:          [FAIL][69] ([i915#79]) -> [PASS][70]
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl6/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl2/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-edp1:
    - shard-skl:          [INCOMPLETE][71] ([i915#146] / [i915#198]) -> [PASS][72]
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl1/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl2/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html

  * igt@kms_frontbuffer_tracking@fbcpsr-suspend:
    - shard-tglb:         [INCOMPLETE][73] ([i915#2411] / [i915#456]) -> [PASS][74]
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-tglb7/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
    - shard-skl:          [INCOMPLETE][75] ([i915#198] / [i915#2828]) -> [PASS][76]
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl8/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl8/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
    - shard-skl:          [FAIL][77] ([fdo#108145] / [i915#265]) -> [PASS][78]
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl10/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html

  * igt@kms_psr@psr2_sprite_mmap_cpu:
    - shard-iclb:         [SKIP][79] ([fdo#109441]) -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb8/igt@kms_psr@psr2_sprite_mmap_cpu.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_cpu.html

  
#### Warnings ####

  * igt@i915_pm_dc@dc9-dpms:
    - shard-iclb:         [FAIL][81] ([i915#3343]) -> [SKIP][82] ([i915#3288])
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb2/igt@i915_pm_dc@dc9-dpms.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb3/igt@i915_pm_dc@dc9-dpms.html

  * igt@i915_pm_rc6_residency@rc6-idle:
    - shard-iclb:         [WARN][83] ([i915#1804] / [i915#2684]) -> [WARN][84] ([i915#2684])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb4/igt@i915_pm_rc6_residency@rc6-idle.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb8/igt@i915_pm_rc6_residency@rc6-idle.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
    - shard-skl:          [FAIL][85] ([i915#3743]) -> [FAIL][86] ([i915#3722])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl2/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl4/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1:
    - shard-iclb:         [SKIP][87] ([i915#658]) -> [SKIP][88] ([i915#2920]) +2 similar issues
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb7/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb2/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1.html

  * igt@runner@aborted:
    - shard-kbl:          ([FAIL][89], [FAIL][90], [FAIL][91], [FAIL][92], [FAIL][93], [FAIL][94], [FAIL][95], [FAIL][96], [FAIL][97], [FAIL][98], [FAIL][99]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#3002] / [i915#3363] / [i915#602]) -> ([FAIL][100], [FAIL][101], [FAIL][102], [FAIL][103], [FAIL][104], [FAIL][105], [FAIL][106], [FAIL][107], [FAIL][108], [FAIL][109], [FAIL][110]) ([fdo#109271] / [i915#1436] / [i915#180] / [i915#1814] / [i915#3002] / [i915#3363] / [i915#602])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl3/igt@runner@aborted.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl6/igt@runner@aborted.html
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl6/igt@runner@aborted.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl6/igt@runner@aborted.html
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl3/igt@runner@aborted.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl3/igt@runner@aborted.html
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl7/igt@runner@aborted.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl7/igt@runner@aborted.html
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl7/igt@runner@aborted.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl7/igt@runner@aborted.html
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl7/igt@runner@aborted.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl3/igt@runner@aborted.html
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl3/igt@runner@aborted.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl1/igt@runner@aborted.html
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl4/igt@runner@aborted.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl3/igt@runner@aborted.html
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl1/igt@runner@aborted.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl1/igt@runner@aborted.html
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl4/igt@runner@aborted.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl6/igt@runner@aborted.html
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl3/igt@runner@aborted.html
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl3/igt@runner@aborted.html
    - shard-tglb:         ([FAIL][111], [FAIL][112]) ([i915#3002]) -> ([FAIL][113], [FAIL][114], [FAIL][115]) ([i915#1814] / [i915#2426] / [i915#3002] / [i915#3690] / [i915#456])
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-tglb3/igt@runner@aborted.html
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-tglb2/igt@runner@aborted.html
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb8/igt@runner@aborted.html
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb8/igt@runner@aborted.html
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb3/igt@runner@aborted.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
  [fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
  [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
  [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1319]: https://gitlab.freedesktop.org/drm/intel/issues/1319
  [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
  [i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
  [i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#1804]: https://gitlab.freedesktop.org/drm/intel/issues/1804
  [i915#1814]: https://gitlab.freedesktop.org/drm/intel/issues/1814
  [i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
  [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
  [i915#2369]: https://gitlab.freedesktop.org/drm/intel/issues/2369
  [i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
  [i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426
  [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
  [i915#2481]: https://gitlab.freedesktop.org/drm/intel/issues/2481
  [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
  [i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
  [i915#2684]: https://gitlab.freedesktop.org/drm/intel/issues/2684
  [i915#2828]: https://gitlab.freedesktop.org/drm/intel/issues/2828
  [i915#284]: https://gitlab.freedesktop.org/drm/intel/issues/284
  [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
  [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
  [i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
  [i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
  [i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
  [i915#3070]: https://gitlab.freedesktop.org/drm/intel/issues/3070
  [i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
  [i915#3288]: https://gitlab.freedesktop.org/drm/intel/issues/3288
  [i915#3343]: https://gitlab.freedesktop.org/drm/intel/issues/3343
  [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
  [i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
  [i915#3536]: https://gitlab.freedesktop.org/drm/intel/issues/3536
  [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
  [i915#3690]: https://gitlab.freedesktop.org/drm/intel/issues/3690
  [i915#3701]: https://gitlab.freedesktop.org/drm/intel/issues/3701
  [i915#3722]: https://gitlab.freedesktop.org/drm/intel/issues/3722
  [i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743
  [i915#3777]: https://gitlab.freedesktop.org/drm/intel/issues/3777
  [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4130]: https://gitlab.freedesktop.org/drm/intel/issues/4130
  [i915#456]: https://gitlab.freedesktop.org/drm/intel/issues/456
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
  [i915#602]: https://gitlab.freedesktop.org/drm/intel/issues/602
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
  [i915#750]: https://gitlab.freedesktop.org/drm/intel/issues/750
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79


Participating hosts (11 -> 10)
------------------------------

  Missing    (1): shard-rkl 


Build changes
-------------

  * Linux: CI_DRM_10605 -> Patchwork_21091

  CI-20190529: 20190529
  CI_DRM_10605: e61e36045f57a5aaeef91f54274937843ee3d0d5 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6211: 7b275b3eb17ddf6e7c5b7b9ba359b7f5345a5311 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_21091: 66f78983c011b9feb4c2912ebc997d3f9f19116d @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/index.html

[-- Attachment #2: Type: text/html, Size: 33049 bytes --]

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH] drm/i915: Make wa list per-gt
  2021-09-17 17:08 ` [Intel-gfx] " Matt Roper
@ 2021-09-20  7:48   ` Tvrtko Ursulin
  -1 siblings, 0 replies; 13+ messages in thread
From: Tvrtko Ursulin @ 2021-09-20  7:48 UTC (permalink / raw)
  To: Matt Roper, intel-gfx
  Cc: dri-devel, Venkata Sandeep Dhanalakota, Daniele Ceraolo Spurio


On 17/09/2021 18:08, Matt Roper wrote:
> From: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
> 
> Support for multiple GT's within a single i915 device will be arriving
> soon.  Since each GT may have its own fusing and require different
> workarounds, we need to make the GT workaround functions and multicast
> steering setup per-gt.
> 
> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
>   drivers/gpu/drm/i915/gt/intel_gt.c            |   3 +
>   drivers/gpu/drm/i915/gt/intel_gt_types.h      |   2 +
>   drivers/gpu/drm/i915/gt/intel_workarounds.c   | 143 +++++++++---------
>   drivers/gpu/drm/i915/gt/intel_workarounds.h   |   2 +-
>   .../gpu/drm/i915/gt/selftest_workarounds.c    |   2 +-
>   drivers/gpu/drm/i915/i915_drv.c               |   2 -
>   drivers/gpu/drm/i915/i915_drv.h               |   2 -
>   drivers/gpu/drm/i915/i915_gem.c               |   2 -
>   8 files changed, 81 insertions(+), 77 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 55e87aff51d2..449ff6e83543 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -660,6 +660,8 @@ int intel_gt_init(struct intel_gt *gt)
>   	if (err)
>   		return err;
>   
> +	intel_gt_init_workarounds(gt);
> +
>   	/*
>   	 * This is just a security blanket to placate dragons.
>   	 * On some systems, we very sporadically observe that the first TLBs
> @@ -767,6 +769,7 @@ void intel_gt_driver_release(struct intel_gt *gt)
>   	if (vm) /* FIXME being called twice on error paths :( */
>   		i915_vm_put(vm);
>   
> +	intel_wa_list_free(&gt->wa_list);
>   	intel_gt_pm_fini(gt);
>   	intel_gt_fini_scratch(gt);
>   	intel_gt_fini_buffer_pool(gt);
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> index 6fdcde64c180..ce127cae9e49 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> @@ -72,6 +72,8 @@ struct intel_gt {
>   
>   	struct intel_uc uc;
>   
> +	struct i915_wa_list wa_list;
> +
>   	struct intel_gt_timelines {
>   		spinlock_t lock; /* protects active_list */
>   		struct list_head active_list;
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index c314d4917b6b..1f0a54b383d9 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -804,7 +804,7 @@ int intel_engine_emit_ctx_wa(struct i915_request *rq)
>   }
>   
>   static void
> -gen4_gt_workarounds_init(struct drm_i915_private *i915,
> +gen4_gt_workarounds_init(struct intel_gt *gt,
>   			 struct i915_wa_list *wal)
>   {
>   	/* WaDisable_RenderCache_OperationalFlush:gen4,ilk */
> @@ -812,29 +812,29 @@ gen4_gt_workarounds_init(struct drm_i915_private *i915,
>   }
>   
>   static void
> -g4x_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +g4x_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
> -	gen4_gt_workarounds_init(i915, wal);
> +	gen4_gt_workarounds_init(gt, wal);
>   
>   	/* WaDisableRenderCachePipelinedFlush:g4x,ilk */
>   	wa_masked_en(wal, CACHE_MODE_0, CM0_PIPELINED_RENDER_FLUSH_DISABLE);
>   }
>   
>   static void
> -ilk_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +ilk_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
> -	g4x_gt_workarounds_init(i915, wal);
> +	g4x_gt_workarounds_init(gt, wal);
>   
>   	wa_masked_en(wal, _3D_CHICKEN2, _3D_CHICKEN2_WM_READ_PIPELINED);
>   }
>   
>   static void
> -snb_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +snb_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
>   }
>   
>   static void
> -ivb_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +ivb_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
>   	/* Apply the WaDisableRHWOOptimizationForRenderHang:ivb workaround. */
>   	wa_masked_dis(wal,
> @@ -850,7 +850,7 @@ ivb_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
>   }
>   
>   static void
> -vlv_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +vlv_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
>   	/* WaForceL3Serialization:vlv */
>   	wa_write_clr(wal, GEN7_L3SQCREG4, L3SQ_URB_READ_CAM_MATCH_DISABLE);
> @@ -863,7 +863,7 @@ vlv_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
>   }
>   
>   static void
> -hsw_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +hsw_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
>   	/* L3 caching of data atomics doesn't work -- disable it. */
>   	wa_write(wal, HSW_SCRATCH1, HSW_SCRATCH1_L3_DATA_ATOMICS_DISABLE);
> @@ -878,15 +878,15 @@ hsw_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
>   }
>   
>   static void
> -gen9_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +gen9_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
>   	/* WaDisableKillLogic:bxt,skl,kbl */
> -	if (!IS_COFFEELAKE(i915) && !IS_COMETLAKE(i915))
> +	if (!IS_COFFEELAKE(gt->i915) && !IS_COMETLAKE(gt->i915))
>   		wa_write_or(wal,
>   			    GAM_ECOCHK,
>   			    ECOCHK_DIS_TLB);
>   
> -	if (HAS_LLC(i915)) {
> +	if (HAS_LLC(gt->i915)) {

Maybe see if local i915 looks better here, but optional.

Patch LGTM:

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko

>   		/* WaCompressedResourceSamplerPbeMediaNewHashMode:skl,kbl
>   		 *
>   		 * Must match Display Engine. See
> @@ -904,9 +904,9 @@ gen9_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal
>   }
>   
>   static void
> -skl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +skl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
> -	gen9_gt_workarounds_init(i915, wal);
> +	gen9_gt_workarounds_init(gt, wal);
>   
>   	/* WaDisableGafsUnitClkGating:skl */
>   	wa_write_or(wal,
> @@ -914,19 +914,19 @@ skl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
>   		    GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE);
>   
>   	/* WaInPlaceDecompressionHang:skl */
> -	if (IS_SKL_GT_STEP(i915, STEP_A0, STEP_H0))
> +	if (IS_SKL_GT_STEP(gt->i915, STEP_A0, STEP_H0))
>   		wa_write_or(wal,
>   			    GEN9_GAMT_ECO_REG_RW_IA,
>   			    GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS);
>   }
>   
>   static void
> -kbl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +kbl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
> -	gen9_gt_workarounds_init(i915, wal);
> +	gen9_gt_workarounds_init(gt, wal);
>   
>   	/* WaDisableDynamicCreditSharing:kbl */
> -	if (IS_KBL_GT_STEP(i915, 0, STEP_C0))
> +	if (IS_KBL_GT_STEP(gt->i915, 0, STEP_C0))
>   		wa_write_or(wal,
>   			    GAMT_CHKN_BIT_REG,
>   			    GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING);
> @@ -943,15 +943,15 @@ kbl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
>   }
>   
>   static void
> -glk_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +glk_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
> -	gen9_gt_workarounds_init(i915, wal);
> +	gen9_gt_workarounds_init(gt, wal);
>   }
>   
>   static void
> -cfl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +cfl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
> -	gen9_gt_workarounds_init(i915, wal);
> +	gen9_gt_workarounds_init(gt, wal);
>   
>   	/* WaDisableGafsUnitClkGating:cfl */
>   	wa_write_or(wal,
> @@ -976,21 +976,21 @@ static void __set_mcr_steering(struct i915_wa_list *wal,
>   	wa_write_clr_set(wal, steering_reg, mcr_mask, mcr);
>   }
>   
> -static void __add_mcr_wa(struct drm_i915_private *i915, struct i915_wa_list *wal,
> +static void __add_mcr_wa(struct intel_gt *gt, struct i915_wa_list *wal,
>   			 unsigned int slice, unsigned int subslice)
>   {
> -	drm_dbg(&i915->drm, "MCR slice=0x%x, subslice=0x%x\n", slice, subslice);
> +	drm_dbg(&gt->i915->drm, "MCR slice=0x%x, subslice=0x%x\n", slice, subslice);
>   
>   	__set_mcr_steering(wal, GEN8_MCR_SELECTOR, slice, subslice);
>   }
>   
>   static void
> -icl_wa_init_mcr(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +icl_wa_init_mcr(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
> -	const struct sseu_dev_info *sseu = &i915->gt.info.sseu;
> +	const struct sseu_dev_info *sseu = &gt->info.sseu;
>   	unsigned int slice, subslice;
>   
> -	GEM_BUG_ON(GRAPHICS_VER(i915) < 11);
> +	GEM_BUG_ON(GRAPHICS_VER(gt->i915) < 11);
>   	GEM_BUG_ON(hweight8(sseu->slice_mask) > 1);
>   	slice = 0;
>   
> @@ -1010,16 +1010,15 @@ icl_wa_init_mcr(struct drm_i915_private *i915, struct i915_wa_list *wal)
>   	 * then we can just rely on the default steering and won't need to
>   	 * worry about explicitly re-steering L3BANK reads later.
>   	 */
> -	if (i915->gt.info.l3bank_mask & BIT(subslice))
> -		i915->gt.steering_table[L3BANK] = NULL;
> +	if (gt->info.l3bank_mask & BIT(subslice))
> +		gt->steering_table[L3BANK] = NULL;
>   
> -	__add_mcr_wa(i915, wal, slice, subslice);
> +	__add_mcr_wa(gt, wal, slice, subslice);
>   }
>   
>   static void
>   xehp_init_mcr(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
> -	struct drm_i915_private *i915 = gt->i915;
>   	const struct sseu_dev_info *sseu = &gt->info.sseu;
>   	unsigned long slice, subslice = 0, slice_mask = 0;
>   	u64 dss_mask = 0;
> @@ -1083,7 +1082,7 @@ xehp_init_mcr(struct intel_gt *gt, struct i915_wa_list *wal)
>   	WARN_ON(subslice > GEN_DSS_PER_GSLICE);
>   	WARN_ON(dss_mask >> (slice * GEN_DSS_PER_GSLICE) == 0);
>   
> -	__add_mcr_wa(i915, wal, slice, subslice);
> +	__add_mcr_wa(gt, wal, slice, subslice);
>   
>   	/*
>   	 * SQIDI ranges are special because they use different steering
> @@ -1099,9 +1098,11 @@ xehp_init_mcr(struct intel_gt *gt, struct i915_wa_list *wal)
>   }
>   
>   static void
> -icl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +icl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
> -	icl_wa_init_mcr(i915, wal);
> +	struct drm_i915_private *i915 = gt->i915;
> +
> +	icl_wa_init_mcr(gt, wal);
>   
>   	/* WaModifyGamTlbPartitioning:icl */
>   	wa_write_clr_set(wal,
> @@ -1152,10 +1153,9 @@ icl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
>    * the engine-specific workaround list.
>    */
>   static void
> -wa_14011060649(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +wa_14011060649(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
>   	struct intel_engine_cs *engine;
> -	struct intel_gt *gt = &i915->gt;
>   	int id;
>   
>   	for_each_engine(engine, gt, id) {
> @@ -1169,22 +1169,23 @@ wa_14011060649(struct drm_i915_private *i915, struct i915_wa_list *wal)
>   }
>   
>   static void
> -gen12_gt_workarounds_init(struct drm_i915_private *i915,
> -			  struct i915_wa_list *wal)
> +gen12_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
> -	icl_wa_init_mcr(i915, wal);
> +	icl_wa_init_mcr(gt, wal);
>   
>   	/* Wa_14011060649:tgl,rkl,dg1,adl-s,adl-p */
> -	wa_14011060649(i915, wal);
> +	wa_14011060649(gt, wal);
>   
>   	/* Wa_14011059788:tgl,rkl,adl-s,dg1,adl-p */
>   	wa_write_or(wal, GEN10_DFR_RATIO_EN_AND_CHICKEN, DFR_DISABLE);
>   }
>   
>   static void
> -tgl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +tgl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
> -	gen12_gt_workarounds_init(i915, wal);
> +	struct drm_i915_private *i915 = gt->i915;
> +
> +	gen12_gt_workarounds_init(gt, wal);
>   
>   	/* Wa_1409420604:tgl */
>   	if (IS_TGL_UY_GT_STEP(i915, STEP_A0, STEP_B0))
> @@ -1205,9 +1206,11 @@ tgl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
>   }
>   
>   static void
> -dg1_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +dg1_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
> -	gen12_gt_workarounds_init(i915, wal);
> +	struct drm_i915_private *i915 = gt->i915;
> +
> +	gen12_gt_workarounds_init(gt, wal);
>   
>   	/* Wa_1607087056:dg1 */
>   	if (IS_DG1_GT_STEP(i915, STEP_A0, STEP_B0))
> @@ -1229,60 +1232,62 @@ dg1_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
>   }
>   
>   static void
> -xehpsdv_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +xehpsdv_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
> -	xehp_init_mcr(&i915->gt, wal);
> +	xehp_init_mcr(gt, wal);
>   }
>   
>   static void
> -gt_init_workarounds(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +gt_init_workarounds(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
> +	struct drm_i915_private *i915 = gt->i915;
> +
>   	if (IS_XEHPSDV(i915))
> -		xehpsdv_gt_workarounds_init(i915, wal);
> +		xehpsdv_gt_workarounds_init(gt, wal);
>   	else if (IS_DG1(i915))
> -		dg1_gt_workarounds_init(i915, wal);
> +		dg1_gt_workarounds_init(gt, wal);
>   	else if (IS_TIGERLAKE(i915))
> -		tgl_gt_workarounds_init(i915, wal);
> +		tgl_gt_workarounds_init(gt, wal);
>   	else if (GRAPHICS_VER(i915) == 12)
> -		gen12_gt_workarounds_init(i915, wal);
> +		gen12_gt_workarounds_init(gt, wal);
>   	else if (GRAPHICS_VER(i915) == 11)
> -		icl_gt_workarounds_init(i915, wal);
> +		icl_gt_workarounds_init(gt, wal);
>   	else if (IS_COFFEELAKE(i915) || IS_COMETLAKE(i915))
> -		cfl_gt_workarounds_init(i915, wal);
> +		cfl_gt_workarounds_init(gt, wal);
>   	else if (IS_GEMINILAKE(i915))
> -		glk_gt_workarounds_init(i915, wal);
> +		glk_gt_workarounds_init(gt, wal);
>   	else if (IS_KABYLAKE(i915))
> -		kbl_gt_workarounds_init(i915, wal);
> +		kbl_gt_workarounds_init(gt, wal);
>   	else if (IS_BROXTON(i915))
> -		gen9_gt_workarounds_init(i915, wal);
> +		gen9_gt_workarounds_init(gt, wal);
>   	else if (IS_SKYLAKE(i915))
> -		skl_gt_workarounds_init(i915, wal);
> +		skl_gt_workarounds_init(gt, wal);
>   	else if (IS_HASWELL(i915))
> -		hsw_gt_workarounds_init(i915, wal);
> +		hsw_gt_workarounds_init(gt, wal);
>   	else if (IS_VALLEYVIEW(i915))
> -		vlv_gt_workarounds_init(i915, wal);
> +		vlv_gt_workarounds_init(gt, wal);
>   	else if (IS_IVYBRIDGE(i915))
> -		ivb_gt_workarounds_init(i915, wal);
> +		ivb_gt_workarounds_init(gt, wal);
>   	else if (GRAPHICS_VER(i915) == 6)
> -		snb_gt_workarounds_init(i915, wal);
> +		snb_gt_workarounds_init(gt, wal);
>   	else if (GRAPHICS_VER(i915) == 5)
> -		ilk_gt_workarounds_init(i915, wal);
> +		ilk_gt_workarounds_init(gt, wal);
>   	else if (IS_G4X(i915))
> -		g4x_gt_workarounds_init(i915, wal);
> +		g4x_gt_workarounds_init(gt, wal);
>   	else if (GRAPHICS_VER(i915) == 4)
> -		gen4_gt_workarounds_init(i915, wal);
> +		gen4_gt_workarounds_init(gt, wal);
>   	else if (GRAPHICS_VER(i915) <= 8)
>   		;
>   	else
>   		MISSING_CASE(GRAPHICS_VER(i915));
>   }
>   
> -void intel_gt_init_workarounds(struct drm_i915_private *i915)
> +void intel_gt_init_workarounds(struct intel_gt *gt)
>   {
> -	struct i915_wa_list *wal = &i915->gt_wa_list;
> +	struct i915_wa_list *wal = &gt->wa_list;
>   
>   	wa_init_start(wal, "GT", "global");
> -	gt_init_workarounds(i915, wal);
> +	gt_init_workarounds(gt, wal);
>   	wa_init_finish(wal);
>   }
>   
> @@ -1353,7 +1358,7 @@ wa_list_apply(struct intel_gt *gt, const struct i915_wa_list *wal)
>   
>   void intel_gt_apply_workarounds(struct intel_gt *gt)
>   {
> -	wa_list_apply(gt, &gt->i915->gt_wa_list);
> +	wa_list_apply(gt, &gt->wa_list);
>   }
>   
>   static bool wa_list_verify(struct intel_gt *gt,
> @@ -1385,7 +1390,7 @@ static bool wa_list_verify(struct intel_gt *gt,
>   
>   bool intel_gt_verify_workarounds(struct intel_gt *gt, const char *from)
>   {
> -	return wa_list_verify(gt, &gt->i915->gt_wa_list, from);
> +	return wa_list_verify(gt, &gt->wa_list, from);
>   }
>   
>   __maybe_unused
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.h b/drivers/gpu/drm/i915/gt/intel_workarounds.h
> index 15abb68b6c00..9beaab77c7f0 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.h
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.h
> @@ -24,7 +24,7 @@ static inline void intel_wa_list_free(struct i915_wa_list *wal)
>   void intel_engine_init_ctx_wa(struct intel_engine_cs *engine);
>   int intel_engine_emit_ctx_wa(struct i915_request *rq);
>   
> -void intel_gt_init_workarounds(struct drm_i915_private *i915);
> +void intel_gt_init_workarounds(struct intel_gt *gt);
>   void intel_gt_apply_workarounds(struct intel_gt *gt);
>   bool intel_gt_verify_workarounds(struct intel_gt *gt, const char *from);
>   
> diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> index e623ac45f4aa..962e91ba3be4 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> @@ -66,7 +66,7 @@ reference_lists_init(struct intel_gt *gt, struct wa_lists *lists)
>   	memset(lists, 0, sizeof(*lists));
>   
>   	wa_init_start(&lists->gt_wa_list, "GT_REF", "global");
> -	gt_init_workarounds(gt->i915, &lists->gt_wa_list);
> +	gt_init_workarounds(gt, &lists->gt_wa_list);
>   	wa_init_finish(&lists->gt_wa_list);
>   
>   	for_each_engine(engine, gt, id) {
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 59fb4c710c8c..3cf61bead2f6 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -588,8 +588,6 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
>   
>   	pci_set_master(pdev);
>   
> -	intel_gt_init_workarounds(dev_priv);
> -
>   	/* On the 945G/GM, the chipset reports the MSI capability on the
>   	 * integrated graphics even though the support isn't actually there
>   	 * according to the published specs.  It doesn't appear to function
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 37c1ca266bcd..93c23eaf3fc7 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -998,8 +998,6 @@ struct drm_i915_private {
>   
>   	struct list_head global_obj_list;
>   
> -	struct i915_wa_list gt_wa_list;
> -
>   	struct i915_frontbuffer_tracking fb_tracking;
>   
>   	struct intel_atomic_helper {
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 590efc8b0265..981e383d1a5d 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -1139,8 +1139,6 @@ void i915_gem_driver_release(struct drm_i915_private *dev_priv)
>   {
>   	intel_gt_driver_release(&dev_priv->gt);
>   
> -	intel_wa_list_free(&dev_priv->gt_wa_list);
> -
>   	intel_uc_cleanup_firmwares(&dev_priv->gt.uc);
>   
>   	i915_gem_drain_freed_objects(dev_priv);
> 

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915: Make wa list per-gt
@ 2021-09-20  7:48   ` Tvrtko Ursulin
  0 siblings, 0 replies; 13+ messages in thread
From: Tvrtko Ursulin @ 2021-09-20  7:48 UTC (permalink / raw)
  To: Matt Roper, intel-gfx
  Cc: dri-devel, Venkata Sandeep Dhanalakota, Daniele Ceraolo Spurio


On 17/09/2021 18:08, Matt Roper wrote:
> From: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
> 
> Support for multiple GT's within a single i915 device will be arriving
> soon.  Since each GT may have its own fusing and require different
> workarounds, we need to make the GT workaround functions and multicast
> steering setup per-gt.
> 
> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
>   drivers/gpu/drm/i915/gt/intel_gt.c            |   3 +
>   drivers/gpu/drm/i915/gt/intel_gt_types.h      |   2 +
>   drivers/gpu/drm/i915/gt/intel_workarounds.c   | 143 +++++++++---------
>   drivers/gpu/drm/i915/gt/intel_workarounds.h   |   2 +-
>   .../gpu/drm/i915/gt/selftest_workarounds.c    |   2 +-
>   drivers/gpu/drm/i915/i915_drv.c               |   2 -
>   drivers/gpu/drm/i915/i915_drv.h               |   2 -
>   drivers/gpu/drm/i915/i915_gem.c               |   2 -
>   8 files changed, 81 insertions(+), 77 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 55e87aff51d2..449ff6e83543 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -660,6 +660,8 @@ int intel_gt_init(struct intel_gt *gt)
>   	if (err)
>   		return err;
>   
> +	intel_gt_init_workarounds(gt);
> +
>   	/*
>   	 * This is just a security blanket to placate dragons.
>   	 * On some systems, we very sporadically observe that the first TLBs
> @@ -767,6 +769,7 @@ void intel_gt_driver_release(struct intel_gt *gt)
>   	if (vm) /* FIXME being called twice on error paths :( */
>   		i915_vm_put(vm);
>   
> +	intel_wa_list_free(&gt->wa_list);
>   	intel_gt_pm_fini(gt);
>   	intel_gt_fini_scratch(gt);
>   	intel_gt_fini_buffer_pool(gt);
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> index 6fdcde64c180..ce127cae9e49 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> @@ -72,6 +72,8 @@ struct intel_gt {
>   
>   	struct intel_uc uc;
>   
> +	struct i915_wa_list wa_list;
> +
>   	struct intel_gt_timelines {
>   		spinlock_t lock; /* protects active_list */
>   		struct list_head active_list;
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index c314d4917b6b..1f0a54b383d9 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -804,7 +804,7 @@ int intel_engine_emit_ctx_wa(struct i915_request *rq)
>   }
>   
>   static void
> -gen4_gt_workarounds_init(struct drm_i915_private *i915,
> +gen4_gt_workarounds_init(struct intel_gt *gt,
>   			 struct i915_wa_list *wal)
>   {
>   	/* WaDisable_RenderCache_OperationalFlush:gen4,ilk */
> @@ -812,29 +812,29 @@ gen4_gt_workarounds_init(struct drm_i915_private *i915,
>   }
>   
>   static void
> -g4x_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +g4x_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
> -	gen4_gt_workarounds_init(i915, wal);
> +	gen4_gt_workarounds_init(gt, wal);
>   
>   	/* WaDisableRenderCachePipelinedFlush:g4x,ilk */
>   	wa_masked_en(wal, CACHE_MODE_0, CM0_PIPELINED_RENDER_FLUSH_DISABLE);
>   }
>   
>   static void
> -ilk_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +ilk_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
> -	g4x_gt_workarounds_init(i915, wal);
> +	g4x_gt_workarounds_init(gt, wal);
>   
>   	wa_masked_en(wal, _3D_CHICKEN2, _3D_CHICKEN2_WM_READ_PIPELINED);
>   }
>   
>   static void
> -snb_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +snb_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
>   }
>   
>   static void
> -ivb_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +ivb_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
>   	/* Apply the WaDisableRHWOOptimizationForRenderHang:ivb workaround. */
>   	wa_masked_dis(wal,
> @@ -850,7 +850,7 @@ ivb_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
>   }
>   
>   static void
> -vlv_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +vlv_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
>   	/* WaForceL3Serialization:vlv */
>   	wa_write_clr(wal, GEN7_L3SQCREG4, L3SQ_URB_READ_CAM_MATCH_DISABLE);
> @@ -863,7 +863,7 @@ vlv_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
>   }
>   
>   static void
> -hsw_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +hsw_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
>   	/* L3 caching of data atomics doesn't work -- disable it. */
>   	wa_write(wal, HSW_SCRATCH1, HSW_SCRATCH1_L3_DATA_ATOMICS_DISABLE);
> @@ -878,15 +878,15 @@ hsw_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
>   }
>   
>   static void
> -gen9_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +gen9_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
>   	/* WaDisableKillLogic:bxt,skl,kbl */
> -	if (!IS_COFFEELAKE(i915) && !IS_COMETLAKE(i915))
> +	if (!IS_COFFEELAKE(gt->i915) && !IS_COMETLAKE(gt->i915))
>   		wa_write_or(wal,
>   			    GAM_ECOCHK,
>   			    ECOCHK_DIS_TLB);
>   
> -	if (HAS_LLC(i915)) {
> +	if (HAS_LLC(gt->i915)) {

Maybe see if local i915 looks better here, but optional.

Patch LGTM:

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko

>   		/* WaCompressedResourceSamplerPbeMediaNewHashMode:skl,kbl
>   		 *
>   		 * Must match Display Engine. See
> @@ -904,9 +904,9 @@ gen9_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal
>   }
>   
>   static void
> -skl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +skl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
> -	gen9_gt_workarounds_init(i915, wal);
> +	gen9_gt_workarounds_init(gt, wal);
>   
>   	/* WaDisableGafsUnitClkGating:skl */
>   	wa_write_or(wal,
> @@ -914,19 +914,19 @@ skl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
>   		    GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE);
>   
>   	/* WaInPlaceDecompressionHang:skl */
> -	if (IS_SKL_GT_STEP(i915, STEP_A0, STEP_H0))
> +	if (IS_SKL_GT_STEP(gt->i915, STEP_A0, STEP_H0))
>   		wa_write_or(wal,
>   			    GEN9_GAMT_ECO_REG_RW_IA,
>   			    GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS);
>   }
>   
>   static void
> -kbl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +kbl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
> -	gen9_gt_workarounds_init(i915, wal);
> +	gen9_gt_workarounds_init(gt, wal);
>   
>   	/* WaDisableDynamicCreditSharing:kbl */
> -	if (IS_KBL_GT_STEP(i915, 0, STEP_C0))
> +	if (IS_KBL_GT_STEP(gt->i915, 0, STEP_C0))
>   		wa_write_or(wal,
>   			    GAMT_CHKN_BIT_REG,
>   			    GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING);
> @@ -943,15 +943,15 @@ kbl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
>   }
>   
>   static void
> -glk_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +glk_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
> -	gen9_gt_workarounds_init(i915, wal);
> +	gen9_gt_workarounds_init(gt, wal);
>   }
>   
>   static void
> -cfl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +cfl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
> -	gen9_gt_workarounds_init(i915, wal);
> +	gen9_gt_workarounds_init(gt, wal);
>   
>   	/* WaDisableGafsUnitClkGating:cfl */
>   	wa_write_or(wal,
> @@ -976,21 +976,21 @@ static void __set_mcr_steering(struct i915_wa_list *wal,
>   	wa_write_clr_set(wal, steering_reg, mcr_mask, mcr);
>   }
>   
> -static void __add_mcr_wa(struct drm_i915_private *i915, struct i915_wa_list *wal,
> +static void __add_mcr_wa(struct intel_gt *gt, struct i915_wa_list *wal,
>   			 unsigned int slice, unsigned int subslice)
>   {
> -	drm_dbg(&i915->drm, "MCR slice=0x%x, subslice=0x%x\n", slice, subslice);
> +	drm_dbg(&gt->i915->drm, "MCR slice=0x%x, subslice=0x%x\n", slice, subslice);
>   
>   	__set_mcr_steering(wal, GEN8_MCR_SELECTOR, slice, subslice);
>   }
>   
>   static void
> -icl_wa_init_mcr(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +icl_wa_init_mcr(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
> -	const struct sseu_dev_info *sseu = &i915->gt.info.sseu;
> +	const struct sseu_dev_info *sseu = &gt->info.sseu;
>   	unsigned int slice, subslice;
>   
> -	GEM_BUG_ON(GRAPHICS_VER(i915) < 11);
> +	GEM_BUG_ON(GRAPHICS_VER(gt->i915) < 11);
>   	GEM_BUG_ON(hweight8(sseu->slice_mask) > 1);
>   	slice = 0;
>   
> @@ -1010,16 +1010,15 @@ icl_wa_init_mcr(struct drm_i915_private *i915, struct i915_wa_list *wal)
>   	 * then we can just rely on the default steering and won't need to
>   	 * worry about explicitly re-steering L3BANK reads later.
>   	 */
> -	if (i915->gt.info.l3bank_mask & BIT(subslice))
> -		i915->gt.steering_table[L3BANK] = NULL;
> +	if (gt->info.l3bank_mask & BIT(subslice))
> +		gt->steering_table[L3BANK] = NULL;
>   
> -	__add_mcr_wa(i915, wal, slice, subslice);
> +	__add_mcr_wa(gt, wal, slice, subslice);
>   }
>   
>   static void
>   xehp_init_mcr(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
> -	struct drm_i915_private *i915 = gt->i915;
>   	const struct sseu_dev_info *sseu = &gt->info.sseu;
>   	unsigned long slice, subslice = 0, slice_mask = 0;
>   	u64 dss_mask = 0;
> @@ -1083,7 +1082,7 @@ xehp_init_mcr(struct intel_gt *gt, struct i915_wa_list *wal)
>   	WARN_ON(subslice > GEN_DSS_PER_GSLICE);
>   	WARN_ON(dss_mask >> (slice * GEN_DSS_PER_GSLICE) == 0);
>   
> -	__add_mcr_wa(i915, wal, slice, subslice);
> +	__add_mcr_wa(gt, wal, slice, subslice);
>   
>   	/*
>   	 * SQIDI ranges are special because they use different steering
> @@ -1099,9 +1098,11 @@ xehp_init_mcr(struct intel_gt *gt, struct i915_wa_list *wal)
>   }
>   
>   static void
> -icl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +icl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
> -	icl_wa_init_mcr(i915, wal);
> +	struct drm_i915_private *i915 = gt->i915;
> +
> +	icl_wa_init_mcr(gt, wal);
>   
>   	/* WaModifyGamTlbPartitioning:icl */
>   	wa_write_clr_set(wal,
> @@ -1152,10 +1153,9 @@ icl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
>    * the engine-specific workaround list.
>    */
>   static void
> -wa_14011060649(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +wa_14011060649(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
>   	struct intel_engine_cs *engine;
> -	struct intel_gt *gt = &i915->gt;
>   	int id;
>   
>   	for_each_engine(engine, gt, id) {
> @@ -1169,22 +1169,23 @@ wa_14011060649(struct drm_i915_private *i915, struct i915_wa_list *wal)
>   }
>   
>   static void
> -gen12_gt_workarounds_init(struct drm_i915_private *i915,
> -			  struct i915_wa_list *wal)
> +gen12_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
> -	icl_wa_init_mcr(i915, wal);
> +	icl_wa_init_mcr(gt, wal);
>   
>   	/* Wa_14011060649:tgl,rkl,dg1,adl-s,adl-p */
> -	wa_14011060649(i915, wal);
> +	wa_14011060649(gt, wal);
>   
>   	/* Wa_14011059788:tgl,rkl,adl-s,dg1,adl-p */
>   	wa_write_or(wal, GEN10_DFR_RATIO_EN_AND_CHICKEN, DFR_DISABLE);
>   }
>   
>   static void
> -tgl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +tgl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
> -	gen12_gt_workarounds_init(i915, wal);
> +	struct drm_i915_private *i915 = gt->i915;
> +
> +	gen12_gt_workarounds_init(gt, wal);
>   
>   	/* Wa_1409420604:tgl */
>   	if (IS_TGL_UY_GT_STEP(i915, STEP_A0, STEP_B0))
> @@ -1205,9 +1206,11 @@ tgl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
>   }
>   
>   static void
> -dg1_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +dg1_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
> -	gen12_gt_workarounds_init(i915, wal);
> +	struct drm_i915_private *i915 = gt->i915;
> +
> +	gen12_gt_workarounds_init(gt, wal);
>   
>   	/* Wa_1607087056:dg1 */
>   	if (IS_DG1_GT_STEP(i915, STEP_A0, STEP_B0))
> @@ -1229,60 +1232,62 @@ dg1_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
>   }
>   
>   static void
> -xehpsdv_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +xehpsdv_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
> -	xehp_init_mcr(&i915->gt, wal);
> +	xehp_init_mcr(gt, wal);
>   }
>   
>   static void
> -gt_init_workarounds(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +gt_init_workarounds(struct intel_gt *gt, struct i915_wa_list *wal)
>   {
> +	struct drm_i915_private *i915 = gt->i915;
> +
>   	if (IS_XEHPSDV(i915))
> -		xehpsdv_gt_workarounds_init(i915, wal);
> +		xehpsdv_gt_workarounds_init(gt, wal);
>   	else if (IS_DG1(i915))
> -		dg1_gt_workarounds_init(i915, wal);
> +		dg1_gt_workarounds_init(gt, wal);
>   	else if (IS_TIGERLAKE(i915))
> -		tgl_gt_workarounds_init(i915, wal);
> +		tgl_gt_workarounds_init(gt, wal);
>   	else if (GRAPHICS_VER(i915) == 12)
> -		gen12_gt_workarounds_init(i915, wal);
> +		gen12_gt_workarounds_init(gt, wal);
>   	else if (GRAPHICS_VER(i915) == 11)
> -		icl_gt_workarounds_init(i915, wal);
> +		icl_gt_workarounds_init(gt, wal);
>   	else if (IS_COFFEELAKE(i915) || IS_COMETLAKE(i915))
> -		cfl_gt_workarounds_init(i915, wal);
> +		cfl_gt_workarounds_init(gt, wal);
>   	else if (IS_GEMINILAKE(i915))
> -		glk_gt_workarounds_init(i915, wal);
> +		glk_gt_workarounds_init(gt, wal);
>   	else if (IS_KABYLAKE(i915))
> -		kbl_gt_workarounds_init(i915, wal);
> +		kbl_gt_workarounds_init(gt, wal);
>   	else if (IS_BROXTON(i915))
> -		gen9_gt_workarounds_init(i915, wal);
> +		gen9_gt_workarounds_init(gt, wal);
>   	else if (IS_SKYLAKE(i915))
> -		skl_gt_workarounds_init(i915, wal);
> +		skl_gt_workarounds_init(gt, wal);
>   	else if (IS_HASWELL(i915))
> -		hsw_gt_workarounds_init(i915, wal);
> +		hsw_gt_workarounds_init(gt, wal);
>   	else if (IS_VALLEYVIEW(i915))
> -		vlv_gt_workarounds_init(i915, wal);
> +		vlv_gt_workarounds_init(gt, wal);
>   	else if (IS_IVYBRIDGE(i915))
> -		ivb_gt_workarounds_init(i915, wal);
> +		ivb_gt_workarounds_init(gt, wal);
>   	else if (GRAPHICS_VER(i915) == 6)
> -		snb_gt_workarounds_init(i915, wal);
> +		snb_gt_workarounds_init(gt, wal);
>   	else if (GRAPHICS_VER(i915) == 5)
> -		ilk_gt_workarounds_init(i915, wal);
> +		ilk_gt_workarounds_init(gt, wal);
>   	else if (IS_G4X(i915))
> -		g4x_gt_workarounds_init(i915, wal);
> +		g4x_gt_workarounds_init(gt, wal);
>   	else if (GRAPHICS_VER(i915) == 4)
> -		gen4_gt_workarounds_init(i915, wal);
> +		gen4_gt_workarounds_init(gt, wal);
>   	else if (GRAPHICS_VER(i915) <= 8)
>   		;
>   	else
>   		MISSING_CASE(GRAPHICS_VER(i915));
>   }
>   
> -void intel_gt_init_workarounds(struct drm_i915_private *i915)
> +void intel_gt_init_workarounds(struct intel_gt *gt)
>   {
> -	struct i915_wa_list *wal = &i915->gt_wa_list;
> +	struct i915_wa_list *wal = &gt->wa_list;
>   
>   	wa_init_start(wal, "GT", "global");
> -	gt_init_workarounds(i915, wal);
> +	gt_init_workarounds(gt, wal);
>   	wa_init_finish(wal);
>   }
>   
> @@ -1353,7 +1358,7 @@ wa_list_apply(struct intel_gt *gt, const struct i915_wa_list *wal)
>   
>   void intel_gt_apply_workarounds(struct intel_gt *gt)
>   {
> -	wa_list_apply(gt, &gt->i915->gt_wa_list);
> +	wa_list_apply(gt, &gt->wa_list);
>   }
>   
>   static bool wa_list_verify(struct intel_gt *gt,
> @@ -1385,7 +1390,7 @@ static bool wa_list_verify(struct intel_gt *gt,
>   
>   bool intel_gt_verify_workarounds(struct intel_gt *gt, const char *from)
>   {
> -	return wa_list_verify(gt, &gt->i915->gt_wa_list, from);
> +	return wa_list_verify(gt, &gt->wa_list, from);
>   }
>   
>   __maybe_unused
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.h b/drivers/gpu/drm/i915/gt/intel_workarounds.h
> index 15abb68b6c00..9beaab77c7f0 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.h
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.h
> @@ -24,7 +24,7 @@ static inline void intel_wa_list_free(struct i915_wa_list *wal)
>   void intel_engine_init_ctx_wa(struct intel_engine_cs *engine);
>   int intel_engine_emit_ctx_wa(struct i915_request *rq);
>   
> -void intel_gt_init_workarounds(struct drm_i915_private *i915);
> +void intel_gt_init_workarounds(struct intel_gt *gt);
>   void intel_gt_apply_workarounds(struct intel_gt *gt);
>   bool intel_gt_verify_workarounds(struct intel_gt *gt, const char *from);
>   
> diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> index e623ac45f4aa..962e91ba3be4 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> @@ -66,7 +66,7 @@ reference_lists_init(struct intel_gt *gt, struct wa_lists *lists)
>   	memset(lists, 0, sizeof(*lists));
>   
>   	wa_init_start(&lists->gt_wa_list, "GT_REF", "global");
> -	gt_init_workarounds(gt->i915, &lists->gt_wa_list);
> +	gt_init_workarounds(gt, &lists->gt_wa_list);
>   	wa_init_finish(&lists->gt_wa_list);
>   
>   	for_each_engine(engine, gt, id) {
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 59fb4c710c8c..3cf61bead2f6 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -588,8 +588,6 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
>   
>   	pci_set_master(pdev);
>   
> -	intel_gt_init_workarounds(dev_priv);
> -
>   	/* On the 945G/GM, the chipset reports the MSI capability on the
>   	 * integrated graphics even though the support isn't actually there
>   	 * according to the published specs.  It doesn't appear to function
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 37c1ca266bcd..93c23eaf3fc7 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -998,8 +998,6 @@ struct drm_i915_private {
>   
>   	struct list_head global_obj_list;
>   
> -	struct i915_wa_list gt_wa_list;
> -
>   	struct i915_frontbuffer_tracking fb_tracking;
>   
>   	struct intel_atomic_helper {
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 590efc8b0265..981e383d1a5d 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -1139,8 +1139,6 @@ void i915_gem_driver_release(struct drm_i915_private *dev_priv)
>   {
>   	intel_gt_driver_release(&dev_priv->gt);
>   
> -	intel_wa_list_free(&dev_priv->gt_wa_list);
> -
>   	intel_uc_cleanup_firmwares(&dev_priv->gt.uc);
>   
>   	i915_gem_drain_freed_objects(dev_priv);
> 

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [Intel-gfx]  ✗ Fi.CI.IGT: failure for drm/i915: Make wa list per-gt (rev2)
  2021-09-18  1:46 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2021-09-20 14:53   ` Matt Roper
  2021-09-20 16:04     ` Vudum, Lakshminarayana
  0 siblings, 1 reply; 13+ messages in thread
From: Matt Roper @ 2021-09-20 14:53 UTC (permalink / raw)
  To: intel-gfx; +Cc: Vudum, Lakshminarayana, damian.kijanczuk

On Sat, Sep 18, 2021 at 01:46:39AM +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915: Make wa list per-gt (rev2)
> URL   : https://patchwork.freedesktop.org/series/94811/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_10605_full -> Patchwork_21091_full
> ====================================================
> 
> Summary
> -------
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with Patchwork_21091_full absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_21091_full, please notify your bug team to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   
> 
> Possible new issues
> -------------------
> 
>   Here are the unknown changes that may have been introduced in Patchwork_21091_full:
> 
> ### IGT changes ###
> 
> #### Possible regressions ####
> 
>   * igt@kms_atomic@plane-invalid-params:
>     - shard-iclb:         [PASS][1] -> [DMESG-WARN][2]
>    [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb6/igt@kms_atomic@plane-invalid-params.html
>    [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb2/igt@kms_atomic@plane-invalid-params.html

https://gitlab.freedesktop.org/drm/intel/-/issues/3728

> 
>   * igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_mc_ccs:
>     - shard-kbl:          NOTRUN -> [INCOMPLETE][3]
>    [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl2/igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_mc_ccs.html

<0>[  148.225355] NMI watchdog: Watchdog detected hard LOCKUP on cpu 2

with some CPU(s) stuck in snd_hda_codec's azx_interrupt().  We've seen
this signature on other CI failures recently too; it seems to be
something introduced by the 5.15-rc1 backmerge, although I'm not sure if
there's a gitlab issue open for it yet.

> 
>   * igt@kms_sequence@queue-idle:
>     - shard-skl:          [PASS][4] -> [FAIL][5]
>    [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl8/igt@kms_sequence@queue-idle.html
>    [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl3/igt@kms_sequence@queue-idle.html

Looks like https://gitlab.freedesktop.org/drm/intel/-/issues/2441 was
just closed because it couldn't be reproduced, but it seems to still be
happening.



Matt

> 
>   
> Known issues
> ------------
> 
>   Here are the changes found in Patchwork_21091_full that come from known issues:
> 
> ### IGT changes ###
> 
> #### Issues hit ####
> 
>   * igt@drm_import_export@flink:
>     - shard-tglb:         [PASS][6] -> [INCOMPLETE][7] ([i915#750])
>    [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-tglb7/igt@drm_import_export@flink.html
>    [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb2/igt@drm_import_export@flink.html
> 
>   * igt@gem_ctx_isolation@preservation-s3@vcs0:
>     - shard-skl:          [PASS][8] -> [INCOMPLETE][9] ([i915#146] / [i915#198])
>    [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl6/igt@gem_ctx_isolation@preservation-s3@vcs0.html
>    [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl4/igt@gem_ctx_isolation@preservation-s3@vcs0.html
> 
>   * igt@gem_ctx_sseu@engines:
>     - shard-skl:          NOTRUN -> [SKIP][10] ([fdo#109271]) +9 similar issues
>    [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl10/igt@gem_ctx_sseu@engines.html
> 
>   * igt@gem_exec_fair@basic-pace-share@rcs0:
>     - shard-tglb:         [PASS][11] -> [FAIL][12] ([i915#2842])
>    [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-tglb1/igt@gem_exec_fair@basic-pace-share@rcs0.html
>    [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb5/igt@gem_exec_fair@basic-pace-share@rcs0.html
> 
>   * igt@gem_exec_params@rsvd2-dirt:
>     - shard-tglb:         NOTRUN -> [SKIP][13] ([fdo#109283])
>    [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@gem_exec_params@rsvd2-dirt.html
> 
>   * igt@gem_media_vme:
>     - shard-tglb:         NOTRUN -> [SKIP][14] ([i915#284])
>    [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@gem_media_vme.html
> 
>   * igt@gem_pread@exhaustion:
>     - shard-skl:          NOTRUN -> [WARN][15] ([i915#2658])
>    [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl8/igt@gem_pread@exhaustion.html
> 
>   * igt@gen9_exec_parse@valid-registers:
>     - shard-tglb:         NOTRUN -> [SKIP][16] ([i915#2856])
>    [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@gen9_exec_parse@valid-registers.html
> 
>   * igt@i915_pm_rpm@pc8-residency:
>     - shard-tglb:         NOTRUN -> [SKIP][17] ([fdo#109506] / [i915#2411])
>    [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@i915_pm_rpm@pc8-residency.html
> 
>   * igt@kms_big_fb@linear-8bpp-rotate-270:
>     - shard-tglb:         NOTRUN -> [SKIP][18] ([fdo#111614]) +1 similar issue
>    [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_big_fb@linear-8bpp-rotate-270.html
> 
>   * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip:
>     - shard-kbl:          NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#3777])
>    [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl7/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
> 
>   * igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
>     - shard-tglb:         NOTRUN -> [SKIP][20] ([fdo#111615])
>    [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
> 
>   * igt@kms_ccs@pipe-a-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc:
>     - shard-kbl:          NOTRUN -> [SKIP][21] ([fdo#109271] / [i915#3886]) +7 similar issues
>    [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl7/igt@kms_ccs@pipe-a-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc.html
> 
>   * igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs:
>     - shard-tglb:         NOTRUN -> [SKIP][22] ([i915#3689] / [i915#3886])
>    [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html
> 
>   * igt@kms_ccs@pipe-d-crc-primary-basic-yf_tiled_ccs:
>     - shard-tglb:         NOTRUN -> [SKIP][23] ([i915#3689]) +1 similar issue
>    [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_ccs@pipe-d-crc-primary-basic-yf_tiled_ccs.html
> 
>   * igt@kms_ccs@pipe-d-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc:
>     - shard-kbl:          NOTRUN -> [SKIP][24] ([fdo#109271]) +129 similar issues
>    [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl4/igt@kms_ccs@pipe-d-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html
> 
>   * igt@kms_chamelium@hdmi-hpd-for-each-pipe:
>     - shard-kbl:          NOTRUN -> [SKIP][25] ([fdo#109271] / [fdo#111827]) +12 similar issues
>    [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl7/igt@kms_chamelium@hdmi-hpd-for-each-pipe.html
> 
>   * igt@kms_color_chamelium@pipe-b-ctm-negative:
>     - shard-tglb:         NOTRUN -> [SKIP][26] ([fdo#109284] / [fdo#111827]) +2 similar issues
>    [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_color_chamelium@pipe-b-ctm-negative.html
> 
>   * igt@kms_color_chamelium@pipe-c-gamma:
>     - shard-skl:          NOTRUN -> [SKIP][27] ([fdo#109271] / [fdo#111827]) +3 similar issues
>    [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl8/igt@kms_color_chamelium@pipe-c-gamma.html
> 
>   * igt@kms_content_protection@dp-mst-lic-type-1:
>     - shard-tglb:         NOTRUN -> [SKIP][28] ([i915#3116])
>    [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_content_protection@dp-mst-lic-type-1.html
> 
>   * igt@kms_content_protection@legacy:
>     - shard-kbl:          NOTRUN -> [TIMEOUT][29] ([i915#1319])
>    [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl4/igt@kms_content_protection@legacy.html
> 
>   * igt@kms_cursor_crc@pipe-c-cursor-32x10-offscreen:
>     - shard-tglb:         NOTRUN -> [SKIP][30] ([i915#3359])
>    [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_cursor_crc@pipe-c-cursor-32x10-offscreen.html
> 
>   * igt@kms_cursor_crc@pipe-d-cursor-512x512-offscreen:
>     - shard-tglb:         NOTRUN -> [SKIP][31] ([fdo#109279] / [i915#3359])
>    [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_cursor_crc@pipe-d-cursor-512x512-offscreen.html
> 
>   * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
>     - shard-skl:          [PASS][32] -> [FAIL][33] ([i915#2346] / [i915#533])
>    [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
>    [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl10/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
> 
>   * igt@kms_flip@flip-vs-suspend-interruptible@a-edp1:
>     - shard-tglb:         [PASS][34] -> [INCOMPLETE][35] ([i915#2411] / [i915#456]) +1 similar issue
>    [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-tglb8/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html
>    [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb7/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html
> 
>   * igt@kms_flip@plain-flip-fb-recreate@b-edp1:
>     - shard-skl:          [PASS][36] -> [FAIL][37] ([i915#2122]) +1 similar issue
>    [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl8/igt@kms_flip@plain-flip-fb-recreate@b-edp1.html
>    [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl3/igt@kms_flip@plain-flip-fb-recreate@b-edp1.html
> 
>   * igt@kms_flip@plain-flip-interruptible@a-edp1:
>     - shard-skl:          [PASS][38] -> [DMESG-WARN][39] ([i915#1982])
>    [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl10/igt@kms_flip@plain-flip-interruptible@a-edp1.html
>    [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl4/igt@kms_flip@plain-flip-interruptible@a-edp1.html
> 
>   * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs:
>     - shard-iclb:         [PASS][40] -> [SKIP][41] ([i915#3701])
>    [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb7/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs.html
>    [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs.html
> 
>   * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt:
>     - shard-tglb:         NOTRUN -> [SKIP][42] ([fdo#111825]) +11 similar issues
>    [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html
> 
>   * igt@kms_frontbuffer_tracking@fbc-suspend:
>     - shard-kbl:          [PASS][43] -> [DMESG-WARN][44] ([i915#180]) +5 similar issues
>    [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl6/igt@kms_frontbuffer_tracking@fbc-suspend.html
>    [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html
> 
>   * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence:
>     - shard-kbl:          NOTRUN -> [SKIP][45] ([fdo#109271] / [i915#533])
>    [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl4/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence.html
> 
>   * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
>     - shard-tglb:         [PASS][46] -> [INCOMPLETE][47] ([i915#2828] / [i915#456])
>    [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-tglb6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html
>    [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html
> 
>   * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
>     - shard-skl:          [PASS][48] -> [FAIL][49] ([fdo#108145] / [i915#265])
>    [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl8/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
>    [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl3/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
> 
>   * igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb:
>     - shard-kbl:          NOTRUN -> [FAIL][50] ([fdo#108145] / [i915#265]) +2 similar issues
>    [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl2/igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb.html
> 
>   * igt@kms_plane_lowres@pipe-b-tiling-none:
>     - shard-tglb:         NOTRUN -> [SKIP][51] ([i915#3536])
>    [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_plane_lowres@pipe-b-tiling-none.html
> 
>   * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3:
>     - shard-kbl:          NOTRUN -> [SKIP][52] ([fdo#109271] / [i915#658]) +4 similar issues
>    [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl2/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3.html
> 
>   * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5:
>     - shard-tglb:         NOTRUN -> [SKIP][53] ([i915#2920]) +1 similar issue
>    [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5.html
> 
>   * igt@kms_psr@psr2_no_drrs:
>     - shard-iclb:         [PASS][54] -> [SKIP][55] ([fdo#109441]) +1 similar issue
>    [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb2/igt@kms_psr@psr2_no_drrs.html
>    [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb5/igt@kms_psr@psr2_no_drrs.html
> 
>   * igt@kms_writeback@writeback-fb-id:
>     - shard-kbl:          NOTRUN -> [SKIP][56] ([fdo#109271] / [i915#2437])
>    [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl7/igt@kms_writeback@writeback-fb-id.html
> 
>   * igt@perf@polling-parameterized:
>     - shard-skl:          [PASS][57] -> [FAIL][58] ([i915#1542])
>    [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl7/igt@perf@polling-parameterized.html
>    [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl5/igt@perf@polling-parameterized.html
> 
>   * igt@sysfs_clients@fair-7:
>     - shard-tglb:         NOTRUN -> [SKIP][59] ([i915#2994])
>    [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@sysfs_clients@fair-7.html
> 
>   * igt@sysfs_clients@sema-50:
>     - shard-kbl:          NOTRUN -> [SKIP][60] ([fdo#109271] / [i915#2994]) +2 similar issues
>    [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl7/igt@sysfs_clients@sema-50.html
> 
>   
> #### Possible fixes ####
> 
>   * igt@core_hotunplug@unbind-rebind:
>     - shard-kbl:          [INCOMPLETE][61] ([i915#4130]) -> [PASS][62]
>    [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl3/igt@core_hotunplug@unbind-rebind.html
>    [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl2/igt@core_hotunplug@unbind-rebind.html
> 
>   * igt@gem_eio@unwedge-stress:
>     - shard-iclb:         [TIMEOUT][63] ([i915#2369] / [i915#2481] / [i915#3070]) -> [PASS][64]
>    [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb8/igt@gem_eio@unwedge-stress.html
>    [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb2/igt@gem_eio@unwedge-stress.html
> 
>   * igt@gem_exec_fair@basic-pace@vcs1:
>     - shard-kbl:          [SKIP][65] ([fdo#109271]) -> [PASS][66]
>    [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl6/igt@gem_exec_fair@basic-pace@vcs1.html
>    [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl6/igt@gem_exec_fair@basic-pace@vcs1.html
> 
>   * igt@kms_cursor_crc@pipe-a-cursor-suspend:
>     - shard-kbl:          [DMESG-WARN][67] ([i915#180]) -> [PASS][68] +5 similar issues
>    [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl7/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
>    [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
> 
>   * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
>     - shard-skl:          [FAIL][69] ([i915#79]) -> [PASS][70]
>    [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl6/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
>    [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl2/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
> 
>   * igt@kms_flip@flip-vs-suspend-interruptible@a-edp1:
>     - shard-skl:          [INCOMPLETE][71] ([i915#146] / [i915#198]) -> [PASS][72]
>    [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl1/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html
>    [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl2/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html
> 
>   * igt@kms_frontbuffer_tracking@fbcpsr-suspend:
>     - shard-tglb:         [INCOMPLETE][73] ([i915#2411] / [i915#456]) -> [PASS][74]
>    [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-tglb7/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html
>    [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html
> 
>   * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
>     - shard-skl:          [INCOMPLETE][75] ([i915#198] / [i915#2828]) -> [PASS][76]
>    [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl8/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html
>    [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl8/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html
> 
>   * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
>     - shard-skl:          [FAIL][77] ([fdo#108145] / [i915#265]) -> [PASS][78]
>    [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
>    [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl10/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
> 
>   * igt@kms_psr@psr2_sprite_mmap_cpu:
>     - shard-iclb:         [SKIP][79] ([fdo#109441]) -> [PASS][80]
>    [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb8/igt@kms_psr@psr2_sprite_mmap_cpu.html
>    [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_cpu.html
> 
>   
> #### Warnings ####
> 
>   * igt@i915_pm_dc@dc9-dpms:
>     - shard-iclb:         [FAIL][81] ([i915#3343]) -> [SKIP][82] ([i915#3288])
>    [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb2/igt@i915_pm_dc@dc9-dpms.html
>    [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb3/igt@i915_pm_dc@dc9-dpms.html
> 
>   * igt@i915_pm_rc6_residency@rc6-idle:
>     - shard-iclb:         [WARN][83] ([i915#1804] / [i915#2684]) -> [WARN][84] ([i915#2684])
>    [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb4/igt@i915_pm_rc6_residency@rc6-idle.html
>    [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb8/igt@i915_pm_rc6_residency@rc6-idle.html
> 
>   * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
>     - shard-skl:          [FAIL][85] ([i915#3743]) -> [FAIL][86] ([i915#3722])
>    [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl2/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
>    [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl4/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
> 
>   * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1:
>     - shard-iclb:         [SKIP][87] ([i915#658]) -> [SKIP][88] ([i915#2920]) +2 similar issues
>    [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb7/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1.html
>    [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb2/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1.html
> 
>   * igt@runner@aborted:
>     - shard-kbl:          ([FAIL][89], [FAIL][90], [FAIL][91], [FAIL][92], [FAIL][93], [FAIL][94], [FAIL][95], [FAIL][96], [FAIL][97], [FAIL][98], [FAIL][99]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#3002] / [i915#3363] / [i915#602]) -> ([FAIL][100], [FAIL][101], [FAIL][102], [FAIL][103], [FAIL][104], [FAIL][105], [FAIL][106], [FAIL][107], [FAIL][108], [FAIL][109], [FAIL][110]) ([fdo#109271] / [i915#1436] / [i915#180] / [i915#1814] / [i915#3002] / [i915#3363] / [i915#602])
>    [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl3/igt@runner@aborted.html
>    [90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl6/igt@runner@aborted.html
>    [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl6/igt@runner@aborted.html
>    [92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl6/igt@runner@aborted.html
>    [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl3/igt@runner@aborted.html
>    [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl3/igt@runner@aborted.html
>    [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl7/igt@runner@aborted.html
>    [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl7/igt@runner@aborted.html
>    [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl7/igt@runner@aborted.html
>    [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl7/igt@runner@aborted.html
>    [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl7/igt@runner@aborted.html
>    [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl3/igt@runner@aborted.html
>    [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl3/igt@runner@aborted.html
>    [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl1/igt@runner@aborted.html
>    [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl4/igt@runner@aborted.html
>    [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl3/igt@runner@aborted.html
>    [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl1/igt@runner@aborted.html
>    [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl1/igt@runner@aborted.html
>    [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl4/igt@runner@aborted.html
>    [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl6/igt@runner@aborted.html
>    [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl3/igt@runner@aborted.html
>    [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl3/igt@runner@aborted.html
>     - shard-tglb:         ([FAIL][111], [FAIL][112]) ([i915#3002]) -> ([FAIL][113], [FAIL][114], [FAIL][115]) ([i915#1814] / [i915#2426] / [i915#3002] / [i915#3690] / [i915#456])
>    [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-tglb3/igt@runner@aborted.html
>    [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-tglb2/igt@runner@aborted.html
>    [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb8/igt@runner@aborted.html
>    [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb8/igt@runner@aborted.html
>    [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb3/igt@runner@aborted.html
> 
>   
>   {name}: This element is suppressed. This means it is ignored when computing
>           the status of the difference (SUCCESS, WARNING, or FAILURE).
> 
>   [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
>   [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
>   [fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
>   [fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
>   [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
>   [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
>   [fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
>   [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
>   [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
>   [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
>   [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
>   [i915#1319]: https://gitlab.freedesktop.org/drm/intel/issues/1319
>   [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
>   [i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
>   [i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
>   [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
>   [i915#1804]: https://gitlab.freedesktop.org/drm/intel/issues/1804
>   [i915#1814]: https://gitlab.freedesktop.org/drm/intel/issues/1814
>   [i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
>   [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
>   [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
>   [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
>   [i915#2369]: https://gitlab.freedesktop.org/drm/intel/issues/2369
>   [i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
>   [i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426
>   [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
>   [i915#2481]: https://gitlab.freedesktop.org/drm/intel/issues/2481
>   [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
>   [i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
>   [i915#2684]: https://gitlab.freedesktop.org/drm/intel/issues/2684
>   [i915#2828]: https://gitlab.freedesktop.org/drm/intel/issues/2828
>   [i915#284]: https://gitlab.freedesktop.org/drm/intel/issues/284
>   [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
>   [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
>   [i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
>   [i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
>   [i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
>   [i915#3070]: https://gitlab.freedesktop.org/drm/intel/issues/3070
>   [i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
>   [i915#3288]: https://gitlab.freedesktop.org/drm/intel/issues/3288
>   [i915#3343]: https://gitlab.freedesktop.org/drm/intel/issues/3343
>   [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
>   [i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
>   [i915#3536]: https://gitlab.freedesktop.org/drm/intel/issues/3536
>   [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
>   [i915#3690]: https://gitlab.freedesktop.org/drm/intel/issues/3690
>   [i915#3701]: https://gitlab.freedesktop.org/drm/intel/issues/3701
>   [i915#3722]: https://gitlab.freedesktop.org/drm/intel/issues/3722
>   [i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743
>   [i915#3777]: https://gitlab.freedesktop.org/drm/intel/issues/3777
>   [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
>   [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
>   [i915#4130]: https://gitlab.freedesktop.org/drm/intel/issues/4130
>   [i915#456]: https://gitlab.freedesktop.org/drm/intel/issues/456
>   [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
>   [i915#602]: https://gitlab.freedesktop.org/drm/intel/issues/602
>   [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
>   [i915#750]: https://gitlab.freedesktop.org/drm/intel/issues/750
>   [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
> 
> 
> Participating hosts (11 -> 10)
> ------------------------------
> 
>   Missing    (1): shard-rkl 
> 
> 
> Build changes
> -------------
> 
>   * Linux: CI_DRM_10605 -> Patchwork_21091
> 
>   CI-20190529: 20190529
>   CI_DRM_10605: e61e36045f57a5aaeef91f54274937843ee3d0d5 @ git://anongit.freedesktop.org/gfx-ci/linux
>   IGT_6211: 7b275b3eb17ddf6e7c5b7b9ba359b7f5345a5311 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
>   Patchwork_21091: 66f78983c011b9feb4c2912ebc997d3f9f19116d @ git://anongit.freedesktop.org/gfx-ci/linux
>   piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/index.html

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795

^ permalink raw reply	[flat|nested] 13+ messages in thread

* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Make wa list per-gt (rev2)
  2021-09-17 17:08 ` [Intel-gfx] " Matt Roper
                   ` (4 preceding siblings ...)
  (?)
@ 2021-09-20 15:43 ` Patchwork
  -1 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2021-09-20 15:43 UTC (permalink / raw)
  To: Matt Roper; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 30259 bytes --]

== Series Details ==

Series: drm/i915: Make wa list per-gt (rev2)
URL   : https://patchwork.freedesktop.org/series/94811/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10605_full -> Patchwork_21091_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_21091_full:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@runner@aborted:
    - {shard-rkl}:        ([FAIL][1], [FAIL][2], [FAIL][3]) ([i915#3002] / [i915#3811]) -> ([FAIL][4], [FAIL][5], [FAIL][6], [FAIL][7]) ([i915#3002] / [i915#3728])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-rkl-6/igt@runner@aborted.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-rkl-2/igt@runner@aborted.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-rkl-2/igt@runner@aborted.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-rkl-1/igt@runner@aborted.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-rkl-2/igt@runner@aborted.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-rkl-6/igt@runner@aborted.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-rkl-6/igt@runner@aborted.html

  
Known issues
------------

  Here are the changes found in Patchwork_21091_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@drm_import_export@flink:
    - shard-tglb:         [PASS][8] -> [INCOMPLETE][9] ([i915#750])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-tglb7/igt@drm_import_export@flink.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb2/igt@drm_import_export@flink.html

  * igt@gem_ctx_isolation@preservation-s3@vcs0:
    - shard-skl:          [PASS][10] -> [INCOMPLETE][11] ([i915#146] / [i915#198])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl6/igt@gem_ctx_isolation@preservation-s3@vcs0.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl4/igt@gem_ctx_isolation@preservation-s3@vcs0.html

  * igt@gem_ctx_sseu@engines:
    - shard-skl:          NOTRUN -> [SKIP][12] ([fdo#109271]) +9 similar issues
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl10/igt@gem_ctx_sseu@engines.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-tglb:         [PASS][13] -> [FAIL][14] ([i915#2842])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-tglb1/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb5/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_params@rsvd2-dirt:
    - shard-tglb:         NOTRUN -> [SKIP][15] ([fdo#109283])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@gem_exec_params@rsvd2-dirt.html

  * igt@gem_media_vme:
    - shard-tglb:         NOTRUN -> [SKIP][16] ([i915#284])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@gem_media_vme.html

  * igt@gem_pread@exhaustion:
    - shard-skl:          NOTRUN -> [WARN][17] ([i915#2658])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl8/igt@gem_pread@exhaustion.html

  * igt@gen9_exec_parse@valid-registers:
    - shard-tglb:         NOTRUN -> [SKIP][18] ([i915#2856])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@gen9_exec_parse@valid-registers.html

  * igt@i915_pm_rpm@pc8-residency:
    - shard-tglb:         NOTRUN -> [SKIP][19] ([fdo#109506] / [i915#2411])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@i915_pm_rpm@pc8-residency.html

  * igt@kms_atomic@plane-invalid-params:
    - shard-iclb:         [PASS][20] -> [DMESG-WARN][21] ([i915#3728])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb6/igt@kms_atomic@plane-invalid-params.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb2/igt@kms_atomic@plane-invalid-params.html

  * igt@kms_big_fb@linear-8bpp-rotate-270:
    - shard-tglb:         NOTRUN -> [SKIP][22] ([fdo#111614]) +1 similar issue
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_big_fb@linear-8bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-kbl:          NOTRUN -> [SKIP][23] ([fdo#109271] / [i915#3777])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl7/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
    - shard-tglb:         NOTRUN -> [SKIP][24] ([fdo#111615])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html

  * igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_mc_ccs:
    - shard-kbl:          NOTRUN -> [INCOMPLETE][25] ([i915#4149])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl2/igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-a-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc:
    - shard-kbl:          NOTRUN -> [SKIP][26] ([fdo#109271] / [i915#3886]) +7 similar issues
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl7/igt@kms_ccs@pipe-a-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][27] ([i915#3689] / [i915#3886])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-d-crc-primary-basic-yf_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][28] ([i915#3689]) +1 similar issue
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_ccs@pipe-d-crc-primary-basic-yf_tiled_ccs.html

  * igt@kms_ccs@pipe-d-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc:
    - shard-kbl:          NOTRUN -> [SKIP][29] ([fdo#109271]) +129 similar issues
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl4/igt@kms_ccs@pipe-d-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_chamelium@hdmi-hpd-for-each-pipe:
    - shard-kbl:          NOTRUN -> [SKIP][30] ([fdo#109271] / [fdo#111827]) +12 similar issues
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl7/igt@kms_chamelium@hdmi-hpd-for-each-pipe.html

  * igt@kms_color_chamelium@pipe-b-ctm-negative:
    - shard-tglb:         NOTRUN -> [SKIP][31] ([fdo#109284] / [fdo#111827]) +2 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_color_chamelium@pipe-b-ctm-negative.html

  * igt@kms_color_chamelium@pipe-c-gamma:
    - shard-skl:          NOTRUN -> [SKIP][32] ([fdo#109271] / [fdo#111827]) +3 similar issues
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl8/igt@kms_color_chamelium@pipe-c-gamma.html

  * igt@kms_content_protection@dp-mst-lic-type-1:
    - shard-tglb:         NOTRUN -> [SKIP][33] ([i915#3116])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_content_protection@dp-mst-lic-type-1.html

  * igt@kms_content_protection@legacy:
    - shard-kbl:          NOTRUN -> [TIMEOUT][34] ([i915#1319])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl4/igt@kms_content_protection@legacy.html

  * igt@kms_cursor_crc@pipe-c-cursor-32x10-offscreen:
    - shard-tglb:         NOTRUN -> [SKIP][35] ([i915#3359])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_cursor_crc@pipe-c-cursor-32x10-offscreen.html

  * igt@kms_cursor_crc@pipe-d-cursor-512x512-offscreen:
    - shard-tglb:         NOTRUN -> [SKIP][36] ([fdo#109279] / [i915#3359])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_cursor_crc@pipe-d-cursor-512x512-offscreen.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-skl:          [PASS][37] -> [FAIL][38] ([i915#2346] / [i915#533])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl10/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-edp1:
    - shard-tglb:         [PASS][39] -> [INCOMPLETE][40] ([i915#2411] / [i915#456]) +1 similar issue
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-tglb8/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb7/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html

  * igt@kms_flip@plain-flip-fb-recreate@b-edp1:
    - shard-skl:          [PASS][41] -> [FAIL][42] ([i915#2122]) +1 similar issue
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl8/igt@kms_flip@plain-flip-fb-recreate@b-edp1.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl3/igt@kms_flip@plain-flip-fb-recreate@b-edp1.html

  * igt@kms_flip@plain-flip-interruptible@a-edp1:
    - shard-skl:          [PASS][43] -> [DMESG-WARN][44] ([i915#1982])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl10/igt@kms_flip@plain-flip-interruptible@a-edp1.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl4/igt@kms_flip@plain-flip-interruptible@a-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs:
    - shard-iclb:         [PASS][45] -> [SKIP][46] ([i915#3701])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb7/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt:
    - shard-tglb:         NOTRUN -> [SKIP][47] ([fdo#111825]) +11 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-kbl:          [PASS][48] -> [DMESG-WARN][49] ([i915#180]) +5 similar issues
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl6/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence:
    - shard-kbl:          NOTRUN -> [SKIP][50] ([fdo#109271] / [i915#533])
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl4/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
    - shard-tglb:         [PASS][51] -> [INCOMPLETE][52] ([i915#2828] / [i915#456])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-tglb6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html

  * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
    - shard-skl:          [PASS][53] -> [FAIL][54] ([fdo#108145] / [i915#265])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl8/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl3/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html

  * igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb:
    - shard-kbl:          NOTRUN -> [FAIL][55] ([fdo#108145] / [i915#265]) +2 similar issues
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl2/igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb.html

  * igt@kms_plane_lowres@pipe-b-tiling-none:
    - shard-tglb:         NOTRUN -> [SKIP][56] ([i915#3536])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_plane_lowres@pipe-b-tiling-none.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3:
    - shard-kbl:          NOTRUN -> [SKIP][57] ([fdo#109271] / [i915#658]) +4 similar issues
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl2/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3.html

  * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5:
    - shard-tglb:         NOTRUN -> [SKIP][58] ([i915#2920]) +1 similar issue
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5.html

  * igt@kms_psr@psr2_no_drrs:
    - shard-iclb:         [PASS][59] -> [SKIP][60] ([fdo#109441]) +1 similar issue
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb2/igt@kms_psr@psr2_no_drrs.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb5/igt@kms_psr@psr2_no_drrs.html

  * igt@kms_sequence@queue-idle:
    - shard-skl:          [PASS][61] -> [FAIL][62] ([i915#2995])
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl8/igt@kms_sequence@queue-idle.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl3/igt@kms_sequence@queue-idle.html

  * igt@kms_writeback@writeback-fb-id:
    - shard-kbl:          NOTRUN -> [SKIP][63] ([fdo#109271] / [i915#2437])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl7/igt@kms_writeback@writeback-fb-id.html

  * igt@perf@polling-parameterized:
    - shard-skl:          [PASS][64] -> [FAIL][65] ([i915#1542])
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl7/igt@perf@polling-parameterized.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl5/igt@perf@polling-parameterized.html

  * igt@sysfs_clients@fair-7:
    - shard-tglb:         NOTRUN -> [SKIP][66] ([i915#2994])
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@sysfs_clients@fair-7.html

  * igt@sysfs_clients@sema-50:
    - shard-kbl:          NOTRUN -> [SKIP][67] ([fdo#109271] / [i915#2994]) +2 similar issues
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl7/igt@sysfs_clients@sema-50.html

  
#### Possible fixes ####

  * igt@core_hotunplug@unbind-rebind:
    - shard-kbl:          [INCOMPLETE][68] ([i915#4130]) -> [PASS][69]
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl3/igt@core_hotunplug@unbind-rebind.html
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl2/igt@core_hotunplug@unbind-rebind.html

  * igt@fbdev@write:
    - {shard-rkl}:        [SKIP][70] ([i915#2582]) -> [PASS][71] +1 similar issue
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-rkl-2/igt@fbdev@write.html
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-rkl-6/igt@fbdev@write.html

  * igt@gem_eio@unwedge-stress:
    - shard-iclb:         [TIMEOUT][72] ([i915#2369] / [i915#2481] / [i915#3070]) -> [PASS][73]
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb8/igt@gem_eio@unwedge-stress.html
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb2/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_fair@basic-pace@vcs1:
    - shard-kbl:          [SKIP][74] ([fdo#109271]) -> [PASS][75]
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl6/igt@gem_exec_fair@basic-pace@vcs1.html
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl6/igt@gem_exec_fair@basic-pace@vcs1.html

  * igt@i915_pm_backlight@fade:
    - {shard-rkl}:        [SKIP][76] ([i915#3012]) -> [PASS][77]
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-rkl-2/igt@i915_pm_backlight@fade.html
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-rkl-6/igt@i915_pm_backlight@fade.html

  * igt@i915_pm_rpm@gem-execbuf:
    - {shard-rkl}:        [SKIP][78] ([fdo#109308]) -> [PASS][79] +2 similar issues
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-rkl-1/igt@i915_pm_rpm@gem-execbuf.html
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-rkl-6/igt@i915_pm_rpm@gem-execbuf.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-180:
    - {shard-rkl}:        [SKIP][80] ([i915#3638]) -> [PASS][81] +4 similar issues
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-rkl-2/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-rkl-6/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
    - {shard-rkl}:        [SKIP][82] ([i915#3721]) -> [PASS][83] +2 similar issues
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-rkl-1/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-rkl-6/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html

  * igt@kms_color@pipe-b-gamma:
    - {shard-rkl}:        [SKIP][84] ([i915#1149] / [i915#1849] / [i915#4070]) -> [PASS][85]
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-rkl-2/igt@kms_color@pipe-b-gamma.html
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-rkl-6/igt@kms_color@pipe-b-gamma.html

  * igt@kms_cursor_crc@pipe-a-cursor-suspend:
    - shard-kbl:          [DMESG-WARN][86] ([i915#180]) -> [PASS][87] +5 similar issues
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl7/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html

  * igt@kms_cursor_crc@pipe-b-cursor-128x128-sliding:
    - {shard-rkl}:        [SKIP][88] ([fdo#112022] / [i915#4070]) -> [PASS][89] +4 similar issues
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-rkl-2/igt@kms_cursor_crc@pipe-b-cursor-128x128-sliding.html
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-rkl-6/igt@kms_cursor_crc@pipe-b-cursor-128x128-sliding.html

  * igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic:
    - {shard-rkl}:        [SKIP][90] ([fdo#111825] / [i915#4070]) -> [PASS][91] +8 similar issues
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-rkl-2/igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic.html
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-rkl-6/igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic.html

  * igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-ytiled:
    - {shard-rkl}:        [SKIP][92] ([fdo#111314]) -> [PASS][93] +5 similar issues
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-rkl-2/igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-ytiled.html
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-rkl-6/igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-ytiled.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
    - shard-skl:          [FAIL][94] ([i915#79]) -> [PASS][95]
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl6/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl2/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-edp1:
    - shard-skl:          [INCOMPLETE][96] ([i915#146] / [i915#198]) -> [PASS][97]
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl1/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl2/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html

  * igt@kms_frontbuffer_tracking@fbcpsr-suspend:
    - shard-tglb:         [INCOMPLETE][98] ([i915#2411] / [i915#456]) -> [PASS][99]
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-tglb7/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt:
    - {shard-rkl}:        [SKIP][100] ([i915#1849]) -> [PASS][101] +21 similar issues
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-rkl-1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt.html
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt.html

  * igt@kms_hdr@static-toggle-dpms:
    - {shard-rkl}:        [SKIP][102] ([i915#1845]) -> [PASS][103] +23 similar issues
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-rkl-1/igt@kms_hdr@static-toggle-dpms.html
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-rkl-6/igt@kms_hdr@static-toggle-dpms.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
    - shard-skl:          [INCOMPLETE][104] ([i915#198] / [i915#2828]) -> [PASS][105]
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl8/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl8/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html

  * igt@kms_plane@plane-position-hole-dpms@pipe-b-planes:
    - {shard-rkl}:        [SKIP][106] ([i915#3558]) -> [PASS][107] +1 similar issue
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-rkl-2/igt@kms_plane@plane-position-hole-dpms@pipe-b-planes.html
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-rkl-6/igt@kms_plane@plane-position-hole-dpms@pipe-b-planes.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
    - shard-skl:          [FAIL][108] ([fdo#108145] / [i915#265]) -> [PASS][109]
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl10/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html

  * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
    - {shard-rkl}:        [SKIP][110] ([i915#1849] / [i915#4070]) -> [PASS][111] +4 similar issues
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-rkl-2/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-rkl-6/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html

  * igt@kms_plane_multiple@atomic-pipe-a-tiling-x:
    - {shard-rkl}:        [SKIP][112] ([i915#1849] / [i915#3558] / [i915#4070]) -> [PASS][113]
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-rkl-2/igt@kms_plane_multiple@atomic-pipe-a-tiling-x.html
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-rkl-6/igt@kms_plane_multiple@atomic-pipe-a-tiling-x.html

  * igt@kms_psr@psr2_sprite_mmap_cpu:
    - shard-iclb:         [SKIP][114] ([fdo#109441]) -> [PASS][115]
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb8/igt@kms_psr@psr2_sprite_mmap_cpu.html
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_cpu.html

  * igt@kms_psr@sprite_blt:
    - {shard-rkl}:        [SKIP][116] ([i915#1072]) -> [PASS][117] +2 similar issues
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-rkl-1/igt@kms_psr@sprite_blt.html
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-rkl-6/igt@kms_psr@sprite_blt.html

  
#### Warnings ####

  * igt@i915_pm_dc@dc9-dpms:
    - shard-iclb:         [FAIL][118] ([i915#3343]) -> [SKIP][119] ([i915#3288])
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb2/igt@i915_pm_dc@dc9-dpms.html
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb3/igt@i915_pm_dc@dc9-dpms.html

  * igt@i915_pm_rc6_residency@rc6-idle:
    - shard-iclb:         [WARN][120] ([i915#1804] / [i915#2684]) -> [WARN][121] ([i915#2684])
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb4/igt@i915_pm_rc6_residency@rc6-idle.html
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb8/igt@i915_pm_rc6_residency@rc6-idle.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
    - shard-skl:          [FAIL][122] ([i915#3743]) -> [FAIL][123] ([i915#3722])
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl2/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl4/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1:
    - shard-iclb:         [SKIP][124] ([i915#658]) -> [SKIP][125] ([i915#2920]) +2 similar issues
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb7/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1.html
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb2/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1.html

  * igt@runner@aborted:
    - shard-kbl:          ([FAIL][126], [FAIL][127], [FAIL][128], [FAIL][129], [FAIL][130], [FAIL][131], [FAIL][132], [FAIL][133], [FAIL][134], [FAIL][135], [FAIL][136]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#3002] / [i915#3363] / [i915#602]) -> ([FAIL][137], [FAIL][138], [FAIL][139], [FAIL][140], [FAIL][141], [FAIL][142], [FAIL][143], [FAIL][144], [FAIL][145], [FAIL][146], [FAIL][147]) ([fdo#109271] / [i915#1436] / [i915#180] / [i915#1814] / [i915#3002] / [i915#3363] / [i915#602])
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl3/igt@runner@aborted.html
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl6/igt@runner@aborted.html
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl6/igt@runner@aborted.html
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl6/igt@runner@aborted.html
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl3/igt@runner@aborted.html
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl3/igt@runner@aborted.html
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl7/igt@runner@aborted.html
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl7/igt@runner@aborted.html
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl7/igt@runner@aborted.html
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl7/igt@runner@aborted.html
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl7/igt@runner@aborted.html
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl3/igt@runner@aborted.html
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl3/igt@runner@aborted.html
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl1/igt@runner@aborted.html
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl4/igt@runner@aborted.html
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl3/igt@runner@aborted.html
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl1/igt@runner@aborted.html
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl1/igt@runner@aborted.html
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl4/igt@runner@aborted.html
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl6/igt@runner@aborted.html
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl3/igt@runner@aborted.html
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl3/igt@runner@aborted.html
    - shard-tglb:         ([FAIL][148], [FAIL][149]) ([i915#3002]) -> ([FAIL][150], [FAIL][151], [FAIL][152]) ([i915#1814] / [i915#2426] / [i915#3002] / [i915#3690] / [i915#456])
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-tglb3/igt@runner@aborted.html
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-tglb2/igt@runner@aborted.html
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb3/igt@runner@aborted.html
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb8/igt@runner@aborted.html
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb8/igt@runner@aborted.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
  [fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [fdo#109300]: https://bugs.freedesktop.org/show_bug.cgi?id=109300
  [fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109506]: http

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/index.html

[-- Attachment #2: Type: text/html, Size: 33985 bytes --]

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915: Make wa list per-gt
  2021-09-17 17:08 ` [Intel-gfx] " Matt Roper
                   ` (5 preceding siblings ...)
  (?)
@ 2021-09-20 15:56 ` Rodrigo Vivi
  -1 siblings, 0 replies; 13+ messages in thread
From: Rodrigo Vivi @ 2021-09-20 15:56 UTC (permalink / raw)
  To: Matt Roper
  Cc: intel-gfx, dri-devel, Venkata Sandeep Dhanalakota,
	Tvrtko Ursulin, Daniele Ceraolo Spurio

On Fri, Sep 17, 2021 at 10:08:45AM -0700, Matt Roper wrote:
> From: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
> 
> Support for multiple GT's within a single i915 device will be arriving
> soon.  Since each GT may have its own fusing and require different
> workarounds, we need to make the GT workaround functions and multicast
> steering setup per-gt.
> 
> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/i915/gt/intel_gt.c            |   3 +
>  drivers/gpu/drm/i915/gt/intel_gt_types.h      |   2 +
>  drivers/gpu/drm/i915/gt/intel_workarounds.c   | 143 +++++++++---------
>  drivers/gpu/drm/i915/gt/intel_workarounds.h   |   2 +-
>  .../gpu/drm/i915/gt/selftest_workarounds.c    |   2 +-
>  drivers/gpu/drm/i915/i915_drv.c               |   2 -
>  drivers/gpu/drm/i915/i915_drv.h               |   2 -
>  drivers/gpu/drm/i915/i915_gem.c               |   2 -
>  8 files changed, 81 insertions(+), 77 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 55e87aff51d2..449ff6e83543 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -660,6 +660,8 @@ int intel_gt_init(struct intel_gt *gt)
>  	if (err)
>  		return err;
>  
> +	intel_gt_init_workarounds(gt);
> +
>  	/*
>  	 * This is just a security blanket to placate dragons.
>  	 * On some systems, we very sporadically observe that the first TLBs
> @@ -767,6 +769,7 @@ void intel_gt_driver_release(struct intel_gt *gt)
>  	if (vm) /* FIXME being called twice on error paths :( */
>  		i915_vm_put(vm);
>  
> +	intel_wa_list_free(&gt->wa_list);
>  	intel_gt_pm_fini(gt);
>  	intel_gt_fini_scratch(gt);
>  	intel_gt_fini_buffer_pool(gt);
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> index 6fdcde64c180..ce127cae9e49 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> @@ -72,6 +72,8 @@ struct intel_gt {
>  
>  	struct intel_uc uc;
>  
> +	struct i915_wa_list wa_list;
> +
>  	struct intel_gt_timelines {
>  		spinlock_t lock; /* protects active_list */
>  		struct list_head active_list;
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index c314d4917b6b..1f0a54b383d9 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -804,7 +804,7 @@ int intel_engine_emit_ctx_wa(struct i915_request *rq)
>  }
>  
>  static void
> -gen4_gt_workarounds_init(struct drm_i915_private *i915,
> +gen4_gt_workarounds_init(struct intel_gt *gt,
>  			 struct i915_wa_list *wal)
>  {
>  	/* WaDisable_RenderCache_OperationalFlush:gen4,ilk */
> @@ -812,29 +812,29 @@ gen4_gt_workarounds_init(struct drm_i915_private *i915,
>  }
>  
>  static void
> -g4x_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +g4x_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>  {
> -	gen4_gt_workarounds_init(i915, wal);
> +	gen4_gt_workarounds_init(gt, wal);
>  
>  	/* WaDisableRenderCachePipelinedFlush:g4x,ilk */
>  	wa_masked_en(wal, CACHE_MODE_0, CM0_PIPELINED_RENDER_FLUSH_DISABLE);
>  }
>  
>  static void
> -ilk_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +ilk_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>  {
> -	g4x_gt_workarounds_init(i915, wal);
> +	g4x_gt_workarounds_init(gt, wal);
>  
>  	wa_masked_en(wal, _3D_CHICKEN2, _3D_CHICKEN2_WM_READ_PIPELINED);
>  }
>  
>  static void
> -snb_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +snb_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>  {
>  }
>  
>  static void
> -ivb_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +ivb_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>  {
>  	/* Apply the WaDisableRHWOOptimizationForRenderHang:ivb workaround. */
>  	wa_masked_dis(wal,
> @@ -850,7 +850,7 @@ ivb_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
>  }
>  
>  static void
> -vlv_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +vlv_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>  {
>  	/* WaForceL3Serialization:vlv */
>  	wa_write_clr(wal, GEN7_L3SQCREG4, L3SQ_URB_READ_CAM_MATCH_DISABLE);
> @@ -863,7 +863,7 @@ vlv_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
>  }
>  
>  static void
> -hsw_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +hsw_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>  {
>  	/* L3 caching of data atomics doesn't work -- disable it. */
>  	wa_write(wal, HSW_SCRATCH1, HSW_SCRATCH1_L3_DATA_ATOMICS_DISABLE);
> @@ -878,15 +878,15 @@ hsw_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
>  }
>  
>  static void
> -gen9_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +gen9_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>  {
>  	/* WaDisableKillLogic:bxt,skl,kbl */
> -	if (!IS_COFFEELAKE(i915) && !IS_COMETLAKE(i915))
> +	if (!IS_COFFEELAKE(gt->i915) && !IS_COMETLAKE(gt->i915))
>  		wa_write_or(wal,
>  			    GAM_ECOCHK,
>  			    ECOCHK_DIS_TLB);
>  
> -	if (HAS_LLC(i915)) {
> +	if (HAS_LLC(gt->i915)) {
>  		/* WaCompressedResourceSamplerPbeMediaNewHashMode:skl,kbl
>  		 *
>  		 * Must match Display Engine. See
> @@ -904,9 +904,9 @@ gen9_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal
>  }
>  
>  static void
> -skl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +skl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>  {
> -	gen9_gt_workarounds_init(i915, wal);
> +	gen9_gt_workarounds_init(gt, wal);
>  
>  	/* WaDisableGafsUnitClkGating:skl */
>  	wa_write_or(wal,
> @@ -914,19 +914,19 @@ skl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
>  		    GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE);
>  
>  	/* WaInPlaceDecompressionHang:skl */
> -	if (IS_SKL_GT_STEP(i915, STEP_A0, STEP_H0))
> +	if (IS_SKL_GT_STEP(gt->i915, STEP_A0, STEP_H0))
>  		wa_write_or(wal,
>  			    GEN9_GAMT_ECO_REG_RW_IA,
>  			    GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS);
>  }
>  
>  static void
> -kbl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +kbl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>  {
> -	gen9_gt_workarounds_init(i915, wal);
> +	gen9_gt_workarounds_init(gt, wal);
>  
>  	/* WaDisableDynamicCreditSharing:kbl */
> -	if (IS_KBL_GT_STEP(i915, 0, STEP_C0))
> +	if (IS_KBL_GT_STEP(gt->i915, 0, STEP_C0))
>  		wa_write_or(wal,
>  			    GAMT_CHKN_BIT_REG,
>  			    GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING);
> @@ -943,15 +943,15 @@ kbl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
>  }
>  
>  static void
> -glk_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +glk_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>  {
> -	gen9_gt_workarounds_init(i915, wal);
> +	gen9_gt_workarounds_init(gt, wal);
>  }
>  
>  static void
> -cfl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +cfl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>  {
> -	gen9_gt_workarounds_init(i915, wal);
> +	gen9_gt_workarounds_init(gt, wal);
>  
>  	/* WaDisableGafsUnitClkGating:cfl */
>  	wa_write_or(wal,
> @@ -976,21 +976,21 @@ static void __set_mcr_steering(struct i915_wa_list *wal,
>  	wa_write_clr_set(wal, steering_reg, mcr_mask, mcr);
>  }
>  
> -static void __add_mcr_wa(struct drm_i915_private *i915, struct i915_wa_list *wal,
> +static void __add_mcr_wa(struct intel_gt *gt, struct i915_wa_list *wal,
>  			 unsigned int slice, unsigned int subslice)
>  {
> -	drm_dbg(&i915->drm, "MCR slice=0x%x, subslice=0x%x\n", slice, subslice);
> +	drm_dbg(&gt->i915->drm, "MCR slice=0x%x, subslice=0x%x\n", slice, subslice);
>  
>  	__set_mcr_steering(wal, GEN8_MCR_SELECTOR, slice, subslice);
>  }
>  
>  static void
> -icl_wa_init_mcr(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +icl_wa_init_mcr(struct intel_gt *gt, struct i915_wa_list *wal)
>  {
> -	const struct sseu_dev_info *sseu = &i915->gt.info.sseu;
> +	const struct sseu_dev_info *sseu = &gt->info.sseu;
>  	unsigned int slice, subslice;
>  
> -	GEM_BUG_ON(GRAPHICS_VER(i915) < 11);
> +	GEM_BUG_ON(GRAPHICS_VER(gt->i915) < 11);
>  	GEM_BUG_ON(hweight8(sseu->slice_mask) > 1);
>  	slice = 0;
>  
> @@ -1010,16 +1010,15 @@ icl_wa_init_mcr(struct drm_i915_private *i915, struct i915_wa_list *wal)
>  	 * then we can just rely on the default steering and won't need to
>  	 * worry about explicitly re-steering L3BANK reads later.
>  	 */
> -	if (i915->gt.info.l3bank_mask & BIT(subslice))
> -		i915->gt.steering_table[L3BANK] = NULL;
> +	if (gt->info.l3bank_mask & BIT(subslice))
> +		gt->steering_table[L3BANK] = NULL;
>  
> -	__add_mcr_wa(i915, wal, slice, subslice);
> +	__add_mcr_wa(gt, wal, slice, subslice);
>  }
>  
>  static void
>  xehp_init_mcr(struct intel_gt *gt, struct i915_wa_list *wal)
>  {
> -	struct drm_i915_private *i915 = gt->i915;
>  	const struct sseu_dev_info *sseu = &gt->info.sseu;
>  	unsigned long slice, subslice = 0, slice_mask = 0;
>  	u64 dss_mask = 0;
> @@ -1083,7 +1082,7 @@ xehp_init_mcr(struct intel_gt *gt, struct i915_wa_list *wal)
>  	WARN_ON(subslice > GEN_DSS_PER_GSLICE);
>  	WARN_ON(dss_mask >> (slice * GEN_DSS_PER_GSLICE) == 0);
>  
> -	__add_mcr_wa(i915, wal, slice, subslice);
> +	__add_mcr_wa(gt, wal, slice, subslice);
>  
>  	/*
>  	 * SQIDI ranges are special because they use different steering
> @@ -1099,9 +1098,11 @@ xehp_init_mcr(struct intel_gt *gt, struct i915_wa_list *wal)
>  }
>  
>  static void
> -icl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +icl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>  {
> -	icl_wa_init_mcr(i915, wal);
> +	struct drm_i915_private *i915 = gt->i915;
> +
> +	icl_wa_init_mcr(gt, wal);
>  
>  	/* WaModifyGamTlbPartitioning:icl */
>  	wa_write_clr_set(wal,
> @@ -1152,10 +1153,9 @@ icl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
>   * the engine-specific workaround list.
>   */
>  static void
> -wa_14011060649(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +wa_14011060649(struct intel_gt *gt, struct i915_wa_list *wal)
>  {
>  	struct intel_engine_cs *engine;
> -	struct intel_gt *gt = &i915->gt;
>  	int id;
>  
>  	for_each_engine(engine, gt, id) {
> @@ -1169,22 +1169,23 @@ wa_14011060649(struct drm_i915_private *i915, struct i915_wa_list *wal)
>  }
>  
>  static void
> -gen12_gt_workarounds_init(struct drm_i915_private *i915,
> -			  struct i915_wa_list *wal)
> +gen12_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>  {
> -	icl_wa_init_mcr(i915, wal);
> +	icl_wa_init_mcr(gt, wal);
>  
>  	/* Wa_14011060649:tgl,rkl,dg1,adl-s,adl-p */
> -	wa_14011060649(i915, wal);
> +	wa_14011060649(gt, wal);
>  
>  	/* Wa_14011059788:tgl,rkl,adl-s,dg1,adl-p */
>  	wa_write_or(wal, GEN10_DFR_RATIO_EN_AND_CHICKEN, DFR_DISABLE);
>  }
>  
>  static void
> -tgl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +tgl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>  {
> -	gen12_gt_workarounds_init(i915, wal);
> +	struct drm_i915_private *i915 = gt->i915;
> +
> +	gen12_gt_workarounds_init(gt, wal);
>  
>  	/* Wa_1409420604:tgl */
>  	if (IS_TGL_UY_GT_STEP(i915, STEP_A0, STEP_B0))
> @@ -1205,9 +1206,11 @@ tgl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
>  }
>  
>  static void
> -dg1_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +dg1_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>  {
> -	gen12_gt_workarounds_init(i915, wal);
> +	struct drm_i915_private *i915 = gt->i915;
> +
> +	gen12_gt_workarounds_init(gt, wal);
>  
>  	/* Wa_1607087056:dg1 */
>  	if (IS_DG1_GT_STEP(i915, STEP_A0, STEP_B0))
> @@ -1229,60 +1232,62 @@ dg1_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
>  }
>  
>  static void
> -xehpsdv_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +xehpsdv_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>  {
> -	xehp_init_mcr(&i915->gt, wal);
> +	xehp_init_mcr(gt, wal);
>  }
>  
>  static void
> -gt_init_workarounds(struct drm_i915_private *i915, struct i915_wa_list *wal)
> +gt_init_workarounds(struct intel_gt *gt, struct i915_wa_list *wal)
>  {
> +	struct drm_i915_private *i915 = gt->i915;
> +
>  	if (IS_XEHPSDV(i915))
> -		xehpsdv_gt_workarounds_init(i915, wal);
> +		xehpsdv_gt_workarounds_init(gt, wal);
>  	else if (IS_DG1(i915))
> -		dg1_gt_workarounds_init(i915, wal);
> +		dg1_gt_workarounds_init(gt, wal);
>  	else if (IS_TIGERLAKE(i915))
> -		tgl_gt_workarounds_init(i915, wal);
> +		tgl_gt_workarounds_init(gt, wal);
>  	else if (GRAPHICS_VER(i915) == 12)
> -		gen12_gt_workarounds_init(i915, wal);
> +		gen12_gt_workarounds_init(gt, wal);
>  	else if (GRAPHICS_VER(i915) == 11)
> -		icl_gt_workarounds_init(i915, wal);
> +		icl_gt_workarounds_init(gt, wal);
>  	else if (IS_COFFEELAKE(i915) || IS_COMETLAKE(i915))
> -		cfl_gt_workarounds_init(i915, wal);
> +		cfl_gt_workarounds_init(gt, wal);
>  	else if (IS_GEMINILAKE(i915))
> -		glk_gt_workarounds_init(i915, wal);
> +		glk_gt_workarounds_init(gt, wal);
>  	else if (IS_KABYLAKE(i915))
> -		kbl_gt_workarounds_init(i915, wal);
> +		kbl_gt_workarounds_init(gt, wal);
>  	else if (IS_BROXTON(i915))
> -		gen9_gt_workarounds_init(i915, wal);
> +		gen9_gt_workarounds_init(gt, wal);
>  	else if (IS_SKYLAKE(i915))
> -		skl_gt_workarounds_init(i915, wal);
> +		skl_gt_workarounds_init(gt, wal);
>  	else if (IS_HASWELL(i915))
> -		hsw_gt_workarounds_init(i915, wal);
> +		hsw_gt_workarounds_init(gt, wal);
>  	else if (IS_VALLEYVIEW(i915))
> -		vlv_gt_workarounds_init(i915, wal);
> +		vlv_gt_workarounds_init(gt, wal);
>  	else if (IS_IVYBRIDGE(i915))
> -		ivb_gt_workarounds_init(i915, wal);
> +		ivb_gt_workarounds_init(gt, wal);
>  	else if (GRAPHICS_VER(i915) == 6)
> -		snb_gt_workarounds_init(i915, wal);
> +		snb_gt_workarounds_init(gt, wal);
>  	else if (GRAPHICS_VER(i915) == 5)
> -		ilk_gt_workarounds_init(i915, wal);
> +		ilk_gt_workarounds_init(gt, wal);
>  	else if (IS_G4X(i915))
> -		g4x_gt_workarounds_init(i915, wal);
> +		g4x_gt_workarounds_init(gt, wal);
>  	else if (GRAPHICS_VER(i915) == 4)
> -		gen4_gt_workarounds_init(i915, wal);
> +		gen4_gt_workarounds_init(gt, wal);
>  	else if (GRAPHICS_VER(i915) <= 8)
>  		;
>  	else
>  		MISSING_CASE(GRAPHICS_VER(i915));
>  }
>  
> -void intel_gt_init_workarounds(struct drm_i915_private *i915)
> +void intel_gt_init_workarounds(struct intel_gt *gt)
>  {
> -	struct i915_wa_list *wal = &i915->gt_wa_list;
> +	struct i915_wa_list *wal = &gt->wa_list;
>  
>  	wa_init_start(wal, "GT", "global");
> -	gt_init_workarounds(i915, wal);
> +	gt_init_workarounds(gt, wal);
>  	wa_init_finish(wal);
>  }
>  
> @@ -1353,7 +1358,7 @@ wa_list_apply(struct intel_gt *gt, const struct i915_wa_list *wal)
>  
>  void intel_gt_apply_workarounds(struct intel_gt *gt)
>  {
> -	wa_list_apply(gt, &gt->i915->gt_wa_list);
> +	wa_list_apply(gt, &gt->wa_list);
>  }
>  
>  static bool wa_list_verify(struct intel_gt *gt,
> @@ -1385,7 +1390,7 @@ static bool wa_list_verify(struct intel_gt *gt,
>  
>  bool intel_gt_verify_workarounds(struct intel_gt *gt, const char *from)
>  {
> -	return wa_list_verify(gt, &gt->i915->gt_wa_list, from);
> +	return wa_list_verify(gt, &gt->wa_list, from);
>  }
>  
>  __maybe_unused
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.h b/drivers/gpu/drm/i915/gt/intel_workarounds.h
> index 15abb68b6c00..9beaab77c7f0 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.h
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.h
> @@ -24,7 +24,7 @@ static inline void intel_wa_list_free(struct i915_wa_list *wal)
>  void intel_engine_init_ctx_wa(struct intel_engine_cs *engine);
>  int intel_engine_emit_ctx_wa(struct i915_request *rq);
>  
> -void intel_gt_init_workarounds(struct drm_i915_private *i915);
> +void intel_gt_init_workarounds(struct intel_gt *gt);
>  void intel_gt_apply_workarounds(struct intel_gt *gt);
>  bool intel_gt_verify_workarounds(struct intel_gt *gt, const char *from);
>  
> diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> index e623ac45f4aa..962e91ba3be4 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> @@ -66,7 +66,7 @@ reference_lists_init(struct intel_gt *gt, struct wa_lists *lists)
>  	memset(lists, 0, sizeof(*lists));
>  
>  	wa_init_start(&lists->gt_wa_list, "GT_REF", "global");
> -	gt_init_workarounds(gt->i915, &lists->gt_wa_list);
> +	gt_init_workarounds(gt, &lists->gt_wa_list);
>  	wa_init_finish(&lists->gt_wa_list);
>  
>  	for_each_engine(engine, gt, id) {
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 59fb4c710c8c..3cf61bead2f6 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -588,8 +588,6 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
>  
>  	pci_set_master(pdev);
>  
> -	intel_gt_init_workarounds(dev_priv);
> -
>  	/* On the 945G/GM, the chipset reports the MSI capability on the
>  	 * integrated graphics even though the support isn't actually there
>  	 * according to the published specs.  It doesn't appear to function
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 37c1ca266bcd..93c23eaf3fc7 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -998,8 +998,6 @@ struct drm_i915_private {
>  
>  	struct list_head global_obj_list;
>  
> -	struct i915_wa_list gt_wa_list;
> -
>  	struct i915_frontbuffer_tracking fb_tracking;
>  
>  	struct intel_atomic_helper {
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 590efc8b0265..981e383d1a5d 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -1139,8 +1139,6 @@ void i915_gem_driver_release(struct drm_i915_private *dev_priv)
>  {
>  	intel_gt_driver_release(&dev_priv->gt);
>  
> -	intel_wa_list_free(&dev_priv->gt_wa_list);
> -
>  	intel_uc_cleanup_firmwares(&dev_priv->gt.uc);
>  
>  	i915_gem_drain_freed_objects(dev_priv);
> -- 
> 2.33.0
> 

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [Intel-gfx]  ✗ Fi.CI.IGT: failure for drm/i915: Make wa list per-gt (rev2)
  2021-09-20 14:53   ` Matt Roper
@ 2021-09-20 16:04     ` Vudum, Lakshminarayana
  0 siblings, 0 replies; 13+ messages in thread
From: Vudum, Lakshminarayana @ 2021-09-20 16:04 UTC (permalink / raw)
  To: Roper, Matthew D, intel-gfx; +Cc: Kijanczuk, Damian

Reported.

-----Original Message-----
From: Roper, Matthew D <matthew.d.roper@intel.com> 
Sent: Monday, September 20, 2021 7:53 AM
To: intel-gfx@lists.freedesktop.org
Cc: Vudum, Lakshminarayana <lakshminarayana.vudum@intel.com>; Kijanczuk, Damian <damian.kijanczuk@intel.com>
Subject: Re: ✗ Fi.CI.IGT: failure for drm/i915: Make wa list per-gt (rev2)

On Sat, Sep 18, 2021 at 01:46:39AM +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915: Make wa list per-gt (rev2)
> URL   : https://patchwork.freedesktop.org/series/94811/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_10605_full -> Patchwork_21091_full 
> ====================================================
> 
> Summary
> -------
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with Patchwork_21091_full absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_21091_full, please notify your bug team to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   
> 
> Possible new issues
> -------------------
> 
>   Here are the unknown changes that may have been introduced in Patchwork_21091_full:
> 
> ### IGT changes ###
> 
> #### Possible regressions ####
> 
>   * igt@kms_atomic@plane-invalid-params:
>     - shard-iclb:         [PASS][1] -> [DMESG-WARN][2]
>    [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb6/igt@kms_atomic@plane-invalid-params.html
>    [2]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb2/i
> gt@kms_atomic@plane-invalid-params.html

https://gitlab.freedesktop.org/drm/intel/-/issues/3728

> 
>   * igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_mc_ccs:
>     - shard-kbl:          NOTRUN -> [INCOMPLETE][3]
>    [3]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl2/ig
> t@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_mc_ccs.html

<0>[  148.225355] NMI watchdog: Watchdog detected hard LOCKUP on cpu 2

with some CPU(s) stuck in snd_hda_codec's azx_interrupt().  We've seen this signature on other CI failures recently too; it seems to be something introduced by the 5.15-rc1 backmerge, although I'm not sure if there's a gitlab issue open for it yet.

> 
>   * igt@kms_sequence@queue-idle:
>     - shard-skl:          [PASS][4] -> [FAIL][5]
>    [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl8/igt@kms_sequence@queue-idle.html
>    [5]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl3/ig
> t@kms_sequence@queue-idle.html

Looks like https://gitlab.freedesktop.org/drm/intel/-/issues/2441 was just closed because it couldn't be reproduced, but it seems to still be happening.



Matt

> 
>   
> Known issues
> ------------
> 
>   Here are the changes found in Patchwork_21091_full that come from known issues:
> 
> ### IGT changes ###
> 
> #### Issues hit ####
> 
>   * igt@drm_import_export@flink:
>     - shard-tglb:         [PASS][6] -> [INCOMPLETE][7] ([i915#750])
>    [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-tglb7/igt@drm_import_export@flink.html
>    [7]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb2/i
> gt@drm_import_export@flink.html
> 
>   * igt@gem_ctx_isolation@preservation-s3@vcs0:
>     - shard-skl:          [PASS][8] -> [INCOMPLETE][9] ([i915#146] / [i915#198])
>    [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl6/igt@gem_ctx_isolation@preservation-s3@vcs0.html
>    [9]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl4/ig
> t@gem_ctx_isolation@preservation-s3@vcs0.html
> 
>   * igt@gem_ctx_sseu@engines:
>     - shard-skl:          NOTRUN -> [SKIP][10] ([fdo#109271]) +9 similar issues
>    [10]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl10/i
> gt@gem_ctx_sseu@engines.html
> 
>   * igt@gem_exec_fair@basic-pace-share@rcs0:
>     - shard-tglb:         [PASS][11] -> [FAIL][12] ([i915#2842])
>    [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-tglb1/igt@gem_exec_fair@basic-pace-share@rcs0.html
>    [12]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb5/i
> gt@gem_exec_fair@basic-pace-share@rcs0.html
> 
>   * igt@gem_exec_params@rsvd2-dirt:
>     - shard-tglb:         NOTRUN -> [SKIP][13] ([fdo#109283])
>    [13]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/i
> gt@gem_exec_params@rsvd2-dirt.html
> 
>   * igt@gem_media_vme:
>     - shard-tglb:         NOTRUN -> [SKIP][14] ([i915#284])
>    [14]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/i
> gt@gem_media_vme.html
> 
>   * igt@gem_pread@exhaustion:
>     - shard-skl:          NOTRUN -> [WARN][15] ([i915#2658])
>    [15]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl8/ig
> t@gem_pread@exhaustion.html
> 
>   * igt@gen9_exec_parse@valid-registers:
>     - shard-tglb:         NOTRUN -> [SKIP][16] ([i915#2856])
>    [16]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/i
> gt@gen9_exec_parse@valid-registers.html
> 
>   * igt@i915_pm_rpm@pc8-residency:
>     - shard-tglb:         NOTRUN -> [SKIP][17] ([fdo#109506] / [i915#2411])
>    [17]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/i
> gt@i915_pm_rpm@pc8-residency.html
> 
>   * igt@kms_big_fb@linear-8bpp-rotate-270:
>     - shard-tglb:         NOTRUN -> [SKIP][18] ([fdo#111614]) +1 similar issue
>    [18]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/i
> gt@kms_big_fb@linear-8bpp-rotate-270.html
> 
>   * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip:
>     - shard-kbl:          NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#3777])
>    [19]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl7/ig
> t@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
> 
>   * igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
>     - shard-tglb:         NOTRUN -> [SKIP][20] ([fdo#111615])
>    [20]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/i
> gt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
> 
>   * igt@kms_ccs@pipe-a-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc:
>     - shard-kbl:          NOTRUN -> [SKIP][21] ([fdo#109271] / [i915#3886]) +7 similar issues
>    [21]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl7/ig
> t@kms_ccs@pipe-a-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc.html
> 
>   * igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs:
>     - shard-tglb:         NOTRUN -> [SKIP][22] ([i915#3689] / [i915#3886])
>    [22]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/i
> gt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html
> 
>   * igt@kms_ccs@pipe-d-crc-primary-basic-yf_tiled_ccs:
>     - shard-tglb:         NOTRUN -> [SKIP][23] ([i915#3689]) +1 similar issue
>    [23]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/i
> gt@kms_ccs@pipe-d-crc-primary-basic-yf_tiled_ccs.html
> 
>   * igt@kms_ccs@pipe-d-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc:
>     - shard-kbl:          NOTRUN -> [SKIP][24] ([fdo#109271]) +129 similar issues
>    [24]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl4/ig
> t@kms_ccs@pipe-d-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html
> 
>   * igt@kms_chamelium@hdmi-hpd-for-each-pipe:
>     - shard-kbl:          NOTRUN -> [SKIP][25] ([fdo#109271] / [fdo#111827]) +12 similar issues
>    [25]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl7/ig
> t@kms_chamelium@hdmi-hpd-for-each-pipe.html
> 
>   * igt@kms_color_chamelium@pipe-b-ctm-negative:
>     - shard-tglb:         NOTRUN -> [SKIP][26] ([fdo#109284] / [fdo#111827]) +2 similar issues
>    [26]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/i
> gt@kms_color_chamelium@pipe-b-ctm-negative.html
> 
>   * igt@kms_color_chamelium@pipe-c-gamma:
>     - shard-skl:          NOTRUN -> [SKIP][27] ([fdo#109271] / [fdo#111827]) +3 similar issues
>    [27]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl8/ig
> t@kms_color_chamelium@pipe-c-gamma.html
> 
>   * igt@kms_content_protection@dp-mst-lic-type-1:
>     - shard-tglb:         NOTRUN -> [SKIP][28] ([i915#3116])
>    [28]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/i
> gt@kms_content_protection@dp-mst-lic-type-1.html
> 
>   * igt@kms_content_protection@legacy:
>     - shard-kbl:          NOTRUN -> [TIMEOUT][29] ([i915#1319])
>    [29]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl4/ig
> t@kms_content_protection@legacy.html
> 
>   * igt@kms_cursor_crc@pipe-c-cursor-32x10-offscreen:
>     - shard-tglb:         NOTRUN -> [SKIP][30] ([i915#3359])
>    [30]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/i
> gt@kms_cursor_crc@pipe-c-cursor-32x10-offscreen.html
> 
>   * igt@kms_cursor_crc@pipe-d-cursor-512x512-offscreen:
>     - shard-tglb:         NOTRUN -> [SKIP][31] ([fdo#109279] / [i915#3359])
>    [31]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/i
> gt@kms_cursor_crc@pipe-d-cursor-512x512-offscreen.html
> 
>   * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
>     - shard-skl:          [PASS][32] -> [FAIL][33] ([i915#2346] / [i915#533])
>    [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
>    [33]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl10/i
> gt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.ht
> ml
> 
>   * igt@kms_flip@flip-vs-suspend-interruptible@a-edp1:
>     - shard-tglb:         [PASS][34] -> [INCOMPLETE][35] ([i915#2411] / [i915#456]) +1 similar issue
>    [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-tglb8/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html
>    [35]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb7/i
> gt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html
> 
>   * igt@kms_flip@plain-flip-fb-recreate@b-edp1:
>     - shard-skl:          [PASS][36] -> [FAIL][37] ([i915#2122]) +1 similar issue
>    [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl8/igt@kms_flip@plain-flip-fb-recreate@b-edp1.html
>    [37]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl3/ig
> t@kms_flip@plain-flip-fb-recreate@b-edp1.html
> 
>   * igt@kms_flip@plain-flip-interruptible@a-edp1:
>     - shard-skl:          [PASS][38] -> [DMESG-WARN][39] ([i915#1982])
>    [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl10/igt@kms_flip@plain-flip-interruptible@a-edp1.html
>    [39]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl4/ig
> t@kms_flip@plain-flip-interruptible@a-edp1.html
> 
>   * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs:
>     - shard-iclb:         [PASS][40] -> [SKIP][41] ([i915#3701])
>    [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb7/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs.html
>    [41]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb2/i
> gt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs.html
> 
>   * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt:
>     - shard-tglb:         NOTRUN -> [SKIP][42] ([fdo#111825]) +11 similar issues
>    [42]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/i
> gt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html
> 
>   * igt@kms_frontbuffer_tracking@fbc-suspend:
>     - shard-kbl:          [PASS][43] -> [DMESG-WARN][44] ([i915#180]) +5 similar issues
>    [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl6/igt@kms_frontbuffer_tracking@fbc-suspend.html
>    [44]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl4/ig
> t@kms_frontbuffer_tracking@fbc-suspend.html
> 
>   * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence:
>     - shard-kbl:          NOTRUN -> [SKIP][45] ([fdo#109271] / [i915#533])
>    [45]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl4/ig
> t@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence.html
> 
>   * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
>     - shard-tglb:         [PASS][46] -> [INCOMPLETE][47] ([i915#2828] / [i915#456])
>    [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-tglb6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html
>    [47]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb7/i
> gt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html
> 
>   * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
>     - shard-skl:          [PASS][48] -> [FAIL][49] ([fdo#108145] / [i915#265])
>    [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl8/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
>    [49]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl3/ig
> t@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
> 
>   * igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb:
>     - shard-kbl:          NOTRUN -> [FAIL][50] ([fdo#108145] / [i915#265]) +2 similar issues
>    [50]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl2/ig
> t@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb.html
> 
>   * igt@kms_plane_lowres@pipe-b-tiling-none:
>     - shard-tglb:         NOTRUN -> [SKIP][51] ([i915#3536])
>    [51]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/i
> gt@kms_plane_lowres@pipe-b-tiling-none.html
> 
>   * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3:
>     - shard-kbl:          NOTRUN -> [SKIP][52] ([fdo#109271] / [i915#658]) +4 similar issues
>    [52]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl2/ig
> t@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3.html
> 
>   * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5:
>     - shard-tglb:         NOTRUN -> [SKIP][53] ([i915#2920]) +1 similar issue
>    [53]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/i
> gt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5.html
> 
>   * igt@kms_psr@psr2_no_drrs:
>     - shard-iclb:         [PASS][54] -> [SKIP][55] ([fdo#109441]) +1 similar issue
>    [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb2/igt@kms_psr@psr2_no_drrs.html
>    [55]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb5/i
> gt@kms_psr@psr2_no_drrs.html
> 
>   * igt@kms_writeback@writeback-fb-id:
>     - shard-kbl:          NOTRUN -> [SKIP][56] ([fdo#109271] / [i915#2437])
>    [56]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl7/ig
> t@kms_writeback@writeback-fb-id.html
> 
>   * igt@perf@polling-parameterized:
>     - shard-skl:          [PASS][57] -> [FAIL][58] ([i915#1542])
>    [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl7/igt@perf@polling-parameterized.html
>    [58]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl5/ig
> t@perf@polling-parameterized.html
> 
>   * igt@sysfs_clients@fair-7:
>     - shard-tglb:         NOTRUN -> [SKIP][59] ([i915#2994])
>    [59]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/i
> gt@sysfs_clients@fair-7.html
> 
>   * igt@sysfs_clients@sema-50:
>     - shard-kbl:          NOTRUN -> [SKIP][60] ([fdo#109271] / [i915#2994]) +2 similar issues
>    [60]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl7/ig
> t@sysfs_clients@sema-50.html
> 
>   
> #### Possible fixes ####
> 
>   * igt@core_hotunplug@unbind-rebind:
>     - shard-kbl:          [INCOMPLETE][61] ([i915#4130]) -> [PASS][62]
>    [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl3/igt@core_hotunplug@unbind-rebind.html
>    [62]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl2/ig
> t@core_hotunplug@unbind-rebind.html
> 
>   * igt@gem_eio@unwedge-stress:
>     - shard-iclb:         [TIMEOUT][63] ([i915#2369] / [i915#2481] / [i915#3070]) -> [PASS][64]
>    [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb8/igt@gem_eio@unwedge-stress.html
>    [64]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb2/i
> gt@gem_eio@unwedge-stress.html
> 
>   * igt@gem_exec_fair@basic-pace@vcs1:
>     - shard-kbl:          [SKIP][65] ([fdo#109271]) -> [PASS][66]
>    [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl6/igt@gem_exec_fair@basic-pace@vcs1.html
>    [66]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl6/ig
> t@gem_exec_fair@basic-pace@vcs1.html
> 
>   * igt@kms_cursor_crc@pipe-a-cursor-suspend:
>     - shard-kbl:          [DMESG-WARN][67] ([i915#180]) -> [PASS][68] +5 similar issues
>    [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl7/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
>    [68]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl4/ig
> t@kms_cursor_crc@pipe-a-cursor-suspend.html
> 
>   * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
>     - shard-skl:          [FAIL][69] ([i915#79]) -> [PASS][70]
>    [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl6/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
>    [70]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl2/ig
> t@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
> 
>   * igt@kms_flip@flip-vs-suspend-interruptible@a-edp1:
>     - shard-skl:          [INCOMPLETE][71] ([i915#146] / [i915#198]) -> [PASS][72]
>    [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl1/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html
>    [72]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl2/ig
> t@kms_flip@flip-vs-suspend-interruptible@a-edp1.html
> 
>   * igt@kms_frontbuffer_tracking@fbcpsr-suspend:
>     - shard-tglb:         [INCOMPLETE][73] ([i915#2411] / [i915#456]) -> [PASS][74]
>    [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-tglb7/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html
>    [74]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb1/i
> gt@kms_frontbuffer_tracking@fbcpsr-suspend.html
> 
>   * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
>     - shard-skl:          [INCOMPLETE][75] ([i915#198] / [i915#2828]) -> [PASS][76]
>    [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl8/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html
>    [76]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl8/ig
> t@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html
> 
>   * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
>     - shard-skl:          [FAIL][77] ([fdo#108145] / [i915#265]) -> [PASS][78]
>    [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
>    [78]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl10/i
> gt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
> 
>   * igt@kms_psr@psr2_sprite_mmap_cpu:
>     - shard-iclb:         [SKIP][79] ([fdo#109441]) -> [PASS][80]
>    [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb8/igt@kms_psr@psr2_sprite_mmap_cpu.html
>    [80]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb2/i
> gt@kms_psr@psr2_sprite_mmap_cpu.html
> 
>   
> #### Warnings ####
> 
>   * igt@i915_pm_dc@dc9-dpms:
>     - shard-iclb:         [FAIL][81] ([i915#3343]) -> [SKIP][82] ([i915#3288])
>    [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb2/igt@i915_pm_dc@dc9-dpms.html
>    [82]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb3/i
> gt@i915_pm_dc@dc9-dpms.html
> 
>   * igt@i915_pm_rc6_residency@rc6-idle:
>     - shard-iclb:         [WARN][83] ([i915#1804] / [i915#2684]) -> [WARN][84] ([i915#2684])
>    [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb4/igt@i915_pm_rc6_residency@rc6-idle.html
>    [84]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb8/i
> gt@i915_pm_rc6_residency@rc6-idle.html
> 
>   * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
>     - shard-skl:          [FAIL][85] ([i915#3743]) -> [FAIL][86] ([i915#3722])
>    [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-skl2/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
>    [86]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-skl4/ig
> t@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
> 
>   * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1:
>     - shard-iclb:         [SKIP][87] ([i915#658]) -> [SKIP][88] ([i915#2920]) +2 similar issues
>    [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-iclb7/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1.html
>    [88]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-iclb2/i
> gt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1.html
> 
>   * igt@runner@aborted:
>     - shard-kbl:          ([FAIL][89], [FAIL][90], [FAIL][91], [FAIL][92], [FAIL][93], [FAIL][94], [FAIL][95], [FAIL][96], [FAIL][97], [FAIL][98], [FAIL][99]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#3002] / [i915#3363] / [i915#602]) -> ([FAIL][100], [FAIL][101], [FAIL][102], [FAIL][103], [FAIL][104], [FAIL][105], [FAIL][106], [FAIL][107], [FAIL][108], [FAIL][109], [FAIL][110]) ([fdo#109271] / [i915#1436] / [i915#180] / [i915#1814] / [i915#3002] / [i915#3363] / [i915#602])
>    [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl3/igt@runner@aborted.html
>    [90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl6/igt@runner@aborted.html
>    [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl6/igt@runner@aborted.html
>    [92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl6/igt@runner@aborted.html
>    [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl3/igt@runner@aborted.html
>    [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl3/igt@runner@aborted.html
>    [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl7/igt@runner@aborted.html
>    [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl7/igt@runner@aborted.html
>    [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl7/igt@runner@aborted.html
>    [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl7/igt@runner@aborted.html
>    [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-kbl7/igt@runner@aborted.html
>    [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl3/igt@runner@aborted.html
>    [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl3/igt@runner@aborted.html
>    [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl1/igt@runner@aborted.html
>    [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl4/igt@runner@aborted.html
>    [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl3/igt@runner@aborted.html
>    [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl1/igt@runner@aborted.html
>    [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl1/igt@runner@aborted.html
>    [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl4/igt@runner@aborted.html
>    [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl6/igt@runner@aborted.html
>    [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl3/igt@runner@aborted.html
>    [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-kbl3/igt@runner@aborted.html
>     - shard-tglb:         ([FAIL][111], [FAIL][112]) ([i915#3002]) -> ([FAIL][113], [FAIL][114], [FAIL][115]) ([i915#1814] / [i915#2426] / [i915#3002] / [i915#3690] / [i915#456])
>    [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-tglb3/igt@runner@aborted.html
>    [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10605/shard-tglb2/igt@runner@aborted.html
>    [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb8/igt@runner@aborted.html
>    [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb8/igt@runner@aborted.html
>    [115]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/shard-tglb3/i
> gt@runner@aborted.html
> 
>   
>   {name}: This element is suppressed. This means it is ignored when computing
>           the status of the difference (SUCCESS, WARNING, or FAILURE).
> 
>   [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
>   [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
>   [fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
>   [fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
>   [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
>   [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
>   [fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
>   [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
>   [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
>   [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
>   [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
>   [i915#1319]: https://gitlab.freedesktop.org/drm/intel/issues/1319
>   [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
>   [i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
>   [i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
>   [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
>   [i915#1804]: https://gitlab.freedesktop.org/drm/intel/issues/1804
>   [i915#1814]: https://gitlab.freedesktop.org/drm/intel/issues/1814
>   [i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
>   [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
>   [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
>   [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
>   [i915#2369]: https://gitlab.freedesktop.org/drm/intel/issues/2369
>   [i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
>   [i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426
>   [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
>   [i915#2481]: https://gitlab.freedesktop.org/drm/intel/issues/2481
>   [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
>   [i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
>   [i915#2684]: https://gitlab.freedesktop.org/drm/intel/issues/2684
>   [i915#2828]: https://gitlab.freedesktop.org/drm/intel/issues/2828
>   [i915#284]: https://gitlab.freedesktop.org/drm/intel/issues/284
>   [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
>   [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
>   [i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
>   [i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
>   [i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
>   [i915#3070]: https://gitlab.freedesktop.org/drm/intel/issues/3070
>   [i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
>   [i915#3288]: https://gitlab.freedesktop.org/drm/intel/issues/3288
>   [i915#3343]: https://gitlab.freedesktop.org/drm/intel/issues/3343
>   [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
>   [i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
>   [i915#3536]: https://gitlab.freedesktop.org/drm/intel/issues/3536
>   [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
>   [i915#3690]: https://gitlab.freedesktop.org/drm/intel/issues/3690
>   [i915#3701]: https://gitlab.freedesktop.org/drm/intel/issues/3701
>   [i915#3722]: https://gitlab.freedesktop.org/drm/intel/issues/3722
>   [i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743
>   [i915#3777]: https://gitlab.freedesktop.org/drm/intel/issues/3777
>   [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
>   [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
>   [i915#4130]: https://gitlab.freedesktop.org/drm/intel/issues/4130
>   [i915#456]: https://gitlab.freedesktop.org/drm/intel/issues/456
>   [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
>   [i915#602]: https://gitlab.freedesktop.org/drm/intel/issues/602
>   [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
>   [i915#750]: https://gitlab.freedesktop.org/drm/intel/issues/750
>   [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
> 
> 
> Participating hosts (11 -> 10)
> ------------------------------
> 
>   Missing    (1): shard-rkl 
> 
> 
> Build changes
> -------------
> 
>   * Linux: CI_DRM_10605 -> Patchwork_21091
> 
>   CI-20190529: 20190529
>   CI_DRM_10605: e61e36045f57a5aaeef91f54274937843ee3d0d5 @ git://anongit.freedesktop.org/gfx-ci/linux
>   IGT_6211: 7b275b3eb17ddf6e7c5b7b9ba359b7f5345a5311 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
>   Patchwork_21091: 66f78983c011b9feb4c2912ebc997d3f9f19116d @ git://anongit.freedesktop.org/gfx-ci/linux
>   piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ 
> git://anongit.freedesktop.org/piglit
> 
> == Logs ==
> 
> For more details see: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21091/index.html

--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915: Make wa list per-gt
  2021-09-17 17:08 ` [Intel-gfx] " Matt Roper
                   ` (6 preceding siblings ...)
  (?)
@ 2021-09-20 19:06 ` Yokoyama, Caz
  -1 siblings, 0 replies; 13+ messages in thread
From: Yokoyama, Caz @ 2021-09-20 19:06 UTC (permalink / raw)
  To: Roper, Matthew D, intel-gfx
  Cc: dri-devel, tvrtko.ursulin, Dhanalakota, Venkata S,
	Ceraolo Spurio, Daniele

On Fri, 2021-09-17 at 10:08 -0700, Matt Roper wrote:
> From: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
> 
> Support for multiple GT's within a single i915 device will be
> arriving
> soon.  Since each GT may have its own fusing and require different
> workarounds, we need to make the GT workaround functions and
> multicast
> steering setup per-gt.
> 
> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Venkata Sandeep Dhanalakota <
> venkata.s.dhanalakota@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_gt.c            |   3 +
>  drivers/gpu/drm/i915/gt/intel_gt_types.h      |   2 +
>  drivers/gpu/drm/i915/gt/intel_workarounds.c   | 143 +++++++++-------
> --
>  drivers/gpu/drm/i915/gt/intel_workarounds.h   |   2 +-
>  .../gpu/drm/i915/gt/selftest_workarounds.c    |   2 +-
>  drivers/gpu/drm/i915/i915_drv.c               |   2 -
>  drivers/gpu/drm/i915/i915_drv.h               |   2 -
>  drivers/gpu/drm/i915/i915_gem.c               |   2 -
>  8 files changed, 81 insertions(+), 77 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c
> b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 55e87aff51d2..449ff6e83543 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -660,6 +660,8 @@ int intel_gt_init(struct intel_gt *gt)
>  	if (err)
>  		return err;
>  
> +	intel_gt_init_workarounds(gt);
> +
>  	/*
>  	 * This is just a security blanket to placate dragons.
>  	 * On some systems, we very sporadically observe that the first
> TLBs
> @@ -767,6 +769,7 @@ void intel_gt_driver_release(struct intel_gt *gt)
>  	if (vm) /* FIXME being called twice on error paths :( */
>  		i915_vm_put(vm);
>  
> +	intel_wa_list_free(&gt->wa_list);
>  	intel_gt_pm_fini(gt);
>  	intel_gt_fini_scratch(gt);
>  	intel_gt_fini_buffer_pool(gt);
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h
> b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> index 6fdcde64c180..ce127cae9e49 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> @@ -72,6 +72,8 @@ struct intel_gt {
>  
>  	struct intel_uc uc;
>  
> +	struct i915_wa_list wa_list;
> +
>  	struct intel_gt_timelines {
>  		spinlock_t lock; /* protects active_list */
>  		struct list_head active_list;
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index c314d4917b6b..1f0a54b383d9 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -804,7 +804,7 @@ int intel_engine_emit_ctx_wa(struct i915_request
> *rq)
>  }
>  
>  static void
> -gen4_gt_workarounds_init(struct drm_i915_private *i915,
> +gen4_gt_workarounds_init(struct intel_gt *gt,
>  			 struct i915_wa_list *wal)
>  {
>  	/* WaDisable_RenderCache_OperationalFlush:gen4,ilk */
> @@ -812,29 +812,29 @@ gen4_gt_workarounds_init(struct
> drm_i915_private *i915,
>  }
>  
>  static void
> -g4x_gt_workarounds_init(struct drm_i915_private *i915, struct
> i915_wa_list *wal)
> +g4x_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list
> *wal)
>  {
> -	gen4_gt_workarounds_init(i915, wal);
> +	gen4_gt_workarounds_init(gt, wal);
>  
>  	/* WaDisableRenderCachePipelinedFlush:g4x,ilk */
>  	wa_masked_en(wal, CACHE_MODE_0,
> CM0_PIPELINED_RENDER_FLUSH_DISABLE);
>  }
>  
>  static void
> -ilk_gt_workarounds_init(struct drm_i915_private *i915, struct
> i915_wa_list *wal)
> +ilk_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list
> *wal)
>  {
> -	g4x_gt_workarounds_init(i915, wal);
> +	g4x_gt_workarounds_init(gt, wal);
>  
>  	wa_masked_en(wal, _3D_CHICKEN2,
> _3D_CHICKEN2_WM_READ_PIPELINED);
>  }
>  
>  static void
> -snb_gt_workarounds_init(struct drm_i915_private *i915, struct
> i915_wa_list *wal)
> +snb_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list
> *wal)
>  {
>  }
>  
>  static void
> -ivb_gt_workarounds_init(struct drm_i915_private *i915, struct
> i915_wa_list *wal)
> +ivb_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list
> *wal)
>  {
>  	/* Apply the WaDisableRHWOOptimizationForRenderHang:ivb
> workaround. */
>  	wa_masked_dis(wal,
> @@ -850,7 +850,7 @@ ivb_gt_workarounds_init(struct drm_i915_private
> *i915, struct i915_wa_list *wal)
>  }
>  
>  static void
> -vlv_gt_workarounds_init(struct drm_i915_private *i915, struct
> i915_wa_list *wal)
> +vlv_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list
> *wal)
>  {
>  	/* WaForceL3Serialization:vlv */
>  	wa_write_clr(wal, GEN7_L3SQCREG4,
> L3SQ_URB_READ_CAM_MATCH_DISABLE);
> @@ -863,7 +863,7 @@ vlv_gt_workarounds_init(struct drm_i915_private
> *i915, struct i915_wa_list *wal)
>  }
>  
>  static void
> -hsw_gt_workarounds_init(struct drm_i915_private *i915, struct
> i915_wa_list *wal)
> +hsw_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list
> *wal)
>  {
>  	/* L3 caching of data atomics doesn't work -- disable it. */
>  	wa_write(wal, HSW_SCRATCH1,
> HSW_SCRATCH1_L3_DATA_ATOMICS_DISABLE);
> @@ -878,15 +878,15 @@ hsw_gt_workarounds_init(struct drm_i915_private
> *i915, struct i915_wa_list *wal)
>  }
>  
>  static void
> -gen9_gt_workarounds_init(struct drm_i915_private *i915, struct
> i915_wa_list *wal)
> +gen9_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list
> *wal)
>  {
>  	/* WaDisableKillLogic:bxt,skl,kbl */
> -	if (!IS_COFFEELAKE(i915) && !IS_COMETLAKE(i915))
> +	if (!IS_COFFEELAKE(gt->i915) && !IS_COMETLAKE(gt->i915))
>  		wa_write_or(wal,
>  			    GAM_ECOCHK,
>  			    ECOCHK_DIS_TLB);
>  
> -	if (HAS_LLC(i915)) {
> +	if (HAS_LLC(gt->i915)) {
>  		/*
> WaCompressedResourceSamplerPbeMediaNewHashMode:skl,kbl
>  		 *
>  		 * Must match Display Engine. See
> @@ -904,9 +904,9 @@ gen9_gt_workarounds_init(struct drm_i915_private
> *i915, struct i915_wa_list *wal
>  }
>  
>  static void
> -skl_gt_workarounds_init(struct drm_i915_private *i915, struct
> i915_wa_list *wal)
> +skl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list
> *wal)
>  {
> -	gen9_gt_workarounds_init(i915, wal);
> +	gen9_gt_workarounds_init(gt, wal);
>  
>  	/* WaDisableGafsUnitClkGating:skl */
>  	wa_write_or(wal,
> @@ -914,19 +914,19 @@ skl_gt_workarounds_init(struct drm_i915_private
> *i915, struct i915_wa_list *wal)
>  		    GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE);
>  
>  	/* WaInPlaceDecompressionHang:skl */
> -	if (IS_SKL_GT_STEP(i915, STEP_A0, STEP_H0))
> +	if (IS_SKL_GT_STEP(gt->i915, STEP_A0, STEP_H0))
>  		wa_write_or(wal,
>  			    GEN9_GAMT_ECO_REG_RW_IA,
>  			    GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS);
>  }
>  
>  static void
> -kbl_gt_workarounds_init(struct drm_i915_private *i915, struct
> i915_wa_list *wal)
> +kbl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list
> *wal)
>  {
> -	gen9_gt_workarounds_init(i915, wal);
> +	gen9_gt_workarounds_init(gt, wal);
>  
>  	/* WaDisableDynamicCreditSharing:kbl */
> -	if (IS_KBL_GT_STEP(i915, 0, STEP_C0))
> +	if (IS_KBL_GT_STEP(gt->i915, 0, STEP_C0))
>  		wa_write_or(wal,
>  			    GAMT_CHKN_BIT_REG,
>  			    GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING);
> @@ -943,15 +943,15 @@ kbl_gt_workarounds_init(struct drm_i915_private
> *i915, struct i915_wa_list *wal)
>  }
>  
>  static void
> -glk_gt_workarounds_init(struct drm_i915_private *i915, struct
> i915_wa_list *wal)
> +glk_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list
> *wal)
>  {
> -	gen9_gt_workarounds_init(i915, wal);
> +	gen9_gt_workarounds_init(gt, wal);
>  }
>  
>  static void
> -cfl_gt_workarounds_init(struct drm_i915_private *i915, struct
> i915_wa_list *wal)
> +cfl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list
> *wal)
>  {
> -	gen9_gt_workarounds_init(i915, wal);
> +	gen9_gt_workarounds_init(gt, wal);
>  
>  	/* WaDisableGafsUnitClkGating:cfl */
>  	wa_write_or(wal,
> @@ -976,21 +976,21 @@ static void __set_mcr_steering(struct
> i915_wa_list *wal,
>  	wa_write_clr_set(wal, steering_reg, mcr_mask, mcr);
>  }
>  
> -static void __add_mcr_wa(struct drm_i915_private *i915, struct
> i915_wa_list *wal,
> +static void __add_mcr_wa(struct intel_gt *gt, struct i915_wa_list
> *wal,
>  			 unsigned int slice, unsigned int subslice)
>  {
> -	drm_dbg(&i915->drm, "MCR slice=0x%x, subslice=0x%x\n", slice,
> subslice);
> +	drm_dbg(&gt->i915->drm, "MCR slice=0x%x, subslice=0x%x\n",
> slice, subslice);
>  
>  	__set_mcr_steering(wal, GEN8_MCR_SELECTOR, slice, subslice);
>  }
>  
>  static void
> -icl_wa_init_mcr(struct drm_i915_private *i915, struct i915_wa_list
> *wal)
> +icl_wa_init_mcr(struct intel_gt *gt, struct i915_wa_list *wal)
>  {
> -	const struct sseu_dev_info *sseu = &i915->gt.info.sseu;
> +	const struct sseu_dev_info *sseu = &gt->info.sseu;
>  	unsigned int slice, subslice;
>  
> -	GEM_BUG_ON(GRAPHICS_VER(i915) < 11);
> +	GEM_BUG_ON(GRAPHICS_VER(gt->i915) < 11);
>  	GEM_BUG_ON(hweight8(sseu->slice_mask) > 1);
>  	slice = 0;
>  
> @@ -1010,16 +1010,15 @@ icl_wa_init_mcr(struct drm_i915_private
> *i915, struct i915_wa_list *wal)
>  	 * then we can just rely on the default steering and won't need
> to
>  	 * worry about explicitly re-steering L3BANK reads later.
>  	 */
> -	if (i915->gt.info.l3bank_mask & BIT(subslice))
> -		i915->gt.steering_table[L3BANK] = NULL;
> +	if (gt->info.l3bank_mask & BIT(subslice))
> +		gt->steering_table[L3BANK] = NULL;
>  
> -	__add_mcr_wa(i915, wal, slice, subslice);
> +	__add_mcr_wa(gt, wal, slice, subslice);
>  }
>  
>  static void
>  xehp_init_mcr(struct intel_gt *gt, struct i915_wa_list *wal)
>  {
> -	struct drm_i915_private *i915 = gt->i915;
>  	const struct sseu_dev_info *sseu = &gt->info.sseu;
>  	unsigned long slice, subslice = 0, slice_mask = 0;
>  	u64 dss_mask = 0;
> @@ -1083,7 +1082,7 @@ xehp_init_mcr(struct intel_gt *gt, struct
> i915_wa_list *wal)
>  	WARN_ON(subslice > GEN_DSS_PER_GSLICE);
>  	WARN_ON(dss_mask >> (slice * GEN_DSS_PER_GSLICE) == 0);
>  
> -	__add_mcr_wa(i915, wal, slice, subslice);
> +	__add_mcr_wa(gt, wal, slice, subslice);
>  
>  	/*
>  	 * SQIDI ranges are special because they use different steering
> @@ -1099,9 +1098,11 @@ xehp_init_mcr(struct intel_gt *gt, struct
> i915_wa_list *wal)
>  }
>  
>  static void
> -icl_gt_workarounds_init(struct drm_i915_private *i915, struct
> i915_wa_list *wal)
> +icl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list
> *wal)
>  {
> -	icl_wa_init_mcr(i915, wal);
> +	struct drm_i915_private *i915 = gt->i915;
> +
> +	icl_wa_init_mcr(gt, wal);
>  
>  	/* WaModifyGamTlbPartitioning:icl */
>  	wa_write_clr_set(wal,
> @@ -1152,10 +1153,9 @@ icl_gt_workarounds_init(struct
> drm_i915_private *i915, struct i915_wa_list *wal)
>   * the engine-specific workaround list.
>   */
>  static void
> -wa_14011060649(struct drm_i915_private *i915, struct i915_wa_list
> *wal)
> +wa_14011060649(struct intel_gt *gt, struct i915_wa_list *wal)
>  {
>  	struct intel_engine_cs *engine;
> -	struct intel_gt *gt = &i915->gt;
>  	int id;
>  
>  	for_each_engine(engine, gt, id) {
> @@ -1169,22 +1169,23 @@ wa_14011060649(struct drm_i915_private *i915,
> struct i915_wa_list *wal)
>  }
>  
>  static void
> -gen12_gt_workarounds_init(struct drm_i915_private *i915,
> -			  struct i915_wa_list *wal)
> +gen12_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list
> *wal)
>  {
> -	icl_wa_init_mcr(i915, wal);
> +	icl_wa_init_mcr(gt, wal);
>  
>  	/* Wa_14011060649:tgl,rkl,dg1,adl-s,adl-p */
> -	wa_14011060649(i915, wal);
> +	wa_14011060649(gt, wal);
>  
>  	/* Wa_14011059788:tgl,rkl,adl-s,dg1,adl-p */
>  	wa_write_or(wal, GEN10_DFR_RATIO_EN_AND_CHICKEN, DFR_DISABLE);
>  }
>  
>  static void
> -tgl_gt_workarounds_init(struct drm_i915_private *i915, struct
> i915_wa_list *wal)
> +tgl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list
> *wal)
>  {
> -	gen12_gt_workarounds_init(i915, wal);
> +	struct drm_i915_private *i915 = gt->i915;
Do you need i915? I don't find i915 in tgl_gt_workarounds_init().
-caz

> +
> +	gen12_gt_workarounds_init(gt, wal);
>  
>  	/* Wa_1409420604:tgl */
>  	if (IS_TGL_UY_GT_STEP(i915, STEP_A0, STEP_B0))
> @@ -1205,9 +1206,11 @@ tgl_gt_workarounds_init(struct
> drm_i915_private *i915, struct i915_wa_list *wal)
>  }
>  
>  static void
> -dg1_gt_workarounds_init(struct drm_i915_private *i915, struct
> i915_wa_list *wal)
> +dg1_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list
> *wal)
>  {
> -	gen12_gt_workarounds_init(i915, wal);
> +	struct drm_i915_private *i915 = gt->i915;
> +
> +	gen12_gt_workarounds_init(gt, wal);
>  
>  	/* Wa_1607087056:dg1 */
>  	if (IS_DG1_GT_STEP(i915, STEP_A0, STEP_B0))
> @@ -1229,60 +1232,62 @@ dg1_gt_workarounds_init(struct
> drm_i915_private *i915, struct i915_wa_list *wal)
>  }
>  
>  static void
> -xehpsdv_gt_workarounds_init(struct drm_i915_private *i915, struct
> i915_wa_list *wal)
> +xehpsdv_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list
> *wal)
>  {
> -	xehp_init_mcr(&i915->gt, wal);
> +	xehp_init_mcr(gt, wal);
>  }
>  
>  static void
> -gt_init_workarounds(struct drm_i915_private *i915, struct
> i915_wa_list *wal)
> +gt_init_workarounds(struct intel_gt *gt, struct i915_wa_list *wal)
>  {
> +	struct drm_i915_private *i915 = gt->i915;
> +
>  	if (IS_XEHPSDV(i915))
> -		xehpsdv_gt_workarounds_init(i915, wal);
> +		xehpsdv_gt_workarounds_init(gt, wal);
>  	else if (IS_DG1(i915))
> -		dg1_gt_workarounds_init(i915, wal);
> +		dg1_gt_workarounds_init(gt, wal);
>  	else if (IS_TIGERLAKE(i915))
> -		tgl_gt_workarounds_init(i915, wal);
> +		tgl_gt_workarounds_init(gt, wal);
>  	else if (GRAPHICS_VER(i915) == 12)
> -		gen12_gt_workarounds_init(i915, wal);
> +		gen12_gt_workarounds_init(gt, wal);
>  	else if (GRAPHICS_VER(i915) == 11)
> -		icl_gt_workarounds_init(i915, wal);
> +		icl_gt_workarounds_init(gt, wal);
>  	else if (IS_COFFEELAKE(i915) || IS_COMETLAKE(i915))
> -		cfl_gt_workarounds_init(i915, wal);
> +		cfl_gt_workarounds_init(gt, wal);
>  	else if (IS_GEMINILAKE(i915))
> -		glk_gt_workarounds_init(i915, wal);
> +		glk_gt_workarounds_init(gt, wal);
>  	else if (IS_KABYLAKE(i915))
> -		kbl_gt_workarounds_init(i915, wal);
> +		kbl_gt_workarounds_init(gt, wal);
>  	else if (IS_BROXTON(i915))
> -		gen9_gt_workarounds_init(i915, wal);
> +		gen9_gt_workarounds_init(gt, wal);
>  	else if (IS_SKYLAKE(i915))
> -		skl_gt_workarounds_init(i915, wal);
> +		skl_gt_workarounds_init(gt, wal);
>  	else if (IS_HASWELL(i915))
> -		hsw_gt_workarounds_init(i915, wal);
> +		hsw_gt_workarounds_init(gt, wal);
>  	else if (IS_VALLEYVIEW(i915))
> -		vlv_gt_workarounds_init(i915, wal);
> +		vlv_gt_workarounds_init(gt, wal);
>  	else if (IS_IVYBRIDGE(i915))
> -		ivb_gt_workarounds_init(i915, wal);
> +		ivb_gt_workarounds_init(gt, wal);
>  	else if (GRAPHICS_VER(i915) == 6)
> -		snb_gt_workarounds_init(i915, wal);
> +		snb_gt_workarounds_init(gt, wal);
>  	else if (GRAPHICS_VER(i915) == 5)
> -		ilk_gt_workarounds_init(i915, wal);
> +		ilk_gt_workarounds_init(gt, wal);
>  	else if (IS_G4X(i915))
> -		g4x_gt_workarounds_init(i915, wal);
> +		g4x_gt_workarounds_init(gt, wal);
>  	else if (GRAPHICS_VER(i915) == 4)
> -		gen4_gt_workarounds_init(i915, wal);
> +		gen4_gt_workarounds_init(gt, wal);
>  	else if (GRAPHICS_VER(i915) <= 8)
>  		;
>  	else
>  		MISSING_CASE(GRAPHICS_VER(i915));
>  }
>  
> -void intel_gt_init_workarounds(struct drm_i915_private *i915)
> +void intel_gt_init_workarounds(struct intel_gt *gt)
>  {
> -	struct i915_wa_list *wal = &i915->gt_wa_list;
> +	struct i915_wa_list *wal = &gt->wa_list;
>  
>  	wa_init_start(wal, "GT", "global");
> -	gt_init_workarounds(i915, wal);
> +	gt_init_workarounds(gt, wal);
>  	wa_init_finish(wal);
>  }
>  
> @@ -1353,7 +1358,7 @@ wa_list_apply(struct intel_gt *gt, const struct
> i915_wa_list *wal)
>  
>  void intel_gt_apply_workarounds(struct intel_gt *gt)
>  {
> -	wa_list_apply(gt, &gt->i915->gt_wa_list);
> +	wa_list_apply(gt, &gt->wa_list);
>  }
>  
>  static bool wa_list_verify(struct intel_gt *gt,
> @@ -1385,7 +1390,7 @@ static bool wa_list_verify(struct intel_gt *gt,
>  
>  bool intel_gt_verify_workarounds(struct intel_gt *gt, const char
> *from)
>  {
> -	return wa_list_verify(gt, &gt->i915->gt_wa_list, from);
> +	return wa_list_verify(gt, &gt->wa_list, from);
>  }
>  
>  __maybe_unused
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.h
> b/drivers/gpu/drm/i915/gt/intel_workarounds.h
> index 15abb68b6c00..9beaab77c7f0 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.h
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.h
> @@ -24,7 +24,7 @@ static inline void intel_wa_list_free(struct
> i915_wa_list *wal)
>  void intel_engine_init_ctx_wa(struct intel_engine_cs *engine);
>  int intel_engine_emit_ctx_wa(struct i915_request *rq);
>  
> -void intel_gt_init_workarounds(struct drm_i915_private *i915);
> +void intel_gt_init_workarounds(struct intel_gt *gt);
>  void intel_gt_apply_workarounds(struct intel_gt *gt);
>  bool intel_gt_verify_workarounds(struct intel_gt *gt, const char
> *from);
>  
> diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> index e623ac45f4aa..962e91ba3be4 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> @@ -66,7 +66,7 @@ reference_lists_init(struct intel_gt *gt, struct
> wa_lists *lists)
>  	memset(lists, 0, sizeof(*lists));
>  
>  	wa_init_start(&lists->gt_wa_list, "GT_REF", "global");
> -	gt_init_workarounds(gt->i915, &lists->gt_wa_list);
> +	gt_init_workarounds(gt, &lists->gt_wa_list);
>  	wa_init_finish(&lists->gt_wa_list);
>  
>  	for_each_engine(engine, gt, id) {
> diff --git a/drivers/gpu/drm/i915/i915_drv.c
> b/drivers/gpu/drm/i915/i915_drv.c
> index 59fb4c710c8c..3cf61bead2f6 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -588,8 +588,6 @@ static int i915_driver_hw_probe(struct
> drm_i915_private *dev_priv)
>  
>  	pci_set_master(pdev);
>  
> -	intel_gt_init_workarounds(dev_priv);
> -
>  	/* On the 945G/GM, the chipset reports the MSI capability on
> the
>  	 * integrated graphics even though the support isn't actually
> there
>  	 * according to the published specs.  It doesn't appear to
> function
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h
> index 37c1ca266bcd..93c23eaf3fc7 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -998,8 +998,6 @@ struct drm_i915_private {
>  
>  	struct list_head global_obj_list;
>  
> -	struct i915_wa_list gt_wa_list;
> -
>  	struct i915_frontbuffer_tracking fb_tracking;
>  
>  	struct intel_atomic_helper {
> diff --git a/drivers/gpu/drm/i915/i915_gem.c
> b/drivers/gpu/drm/i915/i915_gem.c
> index 590efc8b0265..981e383d1a5d 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -1139,8 +1139,6 @@ void i915_gem_driver_release(struct
> drm_i915_private *dev_priv)
>  {
>  	intel_gt_driver_release(&dev_priv->gt);
>  
> -	intel_wa_list_free(&dev_priv->gt_wa_list);
> -
>  	intel_uc_cleanup_firmwares(&dev_priv->gt.uc);
>  
>  	i915_gem_drain_freed_objects(dev_priv);

^ permalink raw reply	[flat|nested] 13+ messages in thread

end of thread, other threads:[~2021-09-20 19:06 UTC | newest]

Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-09-17 17:08 [PATCH] drm/i915: Make wa list per-gt Matt Roper
2021-09-17 17:08 ` [Intel-gfx] " Matt Roper
2021-09-17 17:44 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
2021-09-17 17:50   ` Matt Roper
2021-09-18  0:31 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Make wa list per-gt (rev2) Patchwork
2021-09-18  1:46 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-09-20 14:53   ` Matt Roper
2021-09-20 16:04     ` Vudum, Lakshminarayana
2021-09-20  7:48 ` [PATCH] drm/i915: Make wa list per-gt Tvrtko Ursulin
2021-09-20  7:48   ` [Intel-gfx] " Tvrtko Ursulin
2021-09-20 15:43 ` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Make wa list per-gt (rev2) Patchwork
2021-09-20 15:56 ` [Intel-gfx] [PATCH] drm/i915: Make wa list per-gt Rodrigo Vivi
2021-09-20 19:06 ` Yokoyama, Caz

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