From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Souza, Jose" Subject: Re: [PATCH 5/5] drm/i915/debugfs: Print PSR selective update status register values Date: Thu, 13 Dec 2018 18:06:39 +0000 Message-ID: <7050a7048480f70b047b5e95657f40bb161f1e99.camel@intel.com> References: <20181204230032.6352-1-jose.souza@intel.com> <20181204230032.6352-5-jose.souza@intel.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1690596477==" Return-path: Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 087246E013 for ; Thu, 13 Dec 2018 18:06:41 +0000 (UTC) In-Reply-To: Content-Language: en-US List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: "intel-gfx@lists.freedesktop.org" , "Pandiyan, Dhinakaran" Cc: "Vivi, Rodrigo" List-Id: intel-gfx@lists.freedesktop.org --===============1690596477== Content-Language: en-US Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="=-XPoC6JfoT4v8sNIp4h/r" --=-XPoC6JfoT4v8sNIp4h/r Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Tue, 2018-12-11 at 14:20 -0800, Dhinakaran Pandiyan wrote: > On Tue, 2018-12-04 at 15:00 -0800, Jos=C3=A9 Roberto de Souza wrote: > > The value of this registers will be used to test if PSR2 is doing > > selective update and if the number of blocks match with the > > expected. > >=20 > > Cc: Rodrigo Vivi > > Cc: Dhinakaran Pandiyan > > Signed-off-by: Jos=C3=A9 Roberto de Souza > > --- > > drivers/gpu/drm/i915/i915_debugfs.c | 42 > > ++++++++++++++++++++++++++- > > -- > > 1 file changed, 38 insertions(+), 4 deletions(-) > >=20 > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c > > b/drivers/gpu/drm/i915/i915_debugfs.c > > index 505d93b31eb6..754b33194e09 100644 > > --- a/drivers/gpu/drm/i915/i915_debugfs.c > > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > > @@ -2760,10 +2760,44 @@ static int i915_edp_psr_status(struct > > seq_file *m, void *data) > > seq_printf(m, "Performance counter: %u\n", val); > > } > > =20 > > - if ((psr->debug & I915_PSR_DEBUG_IRQ) && !psr->psr2_enabled) { > > - seq_printf(m, "Last attempted entry at: %lld\n", > > - psr->last_entry_attempt); > > - seq_printf(m, "Last exit at: %lld\n", psr->last_exit); > > + if (!psr->psr2_enabled) { > > + if (psr->debug & I915_PSR_DEBUG_IRQ) { > > + seq_printf(m, "Last attempted entry at: > > %lld\n", > > + psr->last_entry_attempt); > > + seq_printf(m, "Last exit at: %lld\n", psr- > > > last_exit); > > + } > > + } else { > > + u8 i; > > + > > + val =3D I915_READ(EDP_PSR2_SU_STATUS); > > + seq_printf(m, "PSR2 SU status: 0x%08x\n", val); > > + for (i =3D 0; val && i < 3; i++) { > > + u32 num; > > + > > + num =3D val & > > EDP_PSR2_SU_STATUS_NUM_SU_BLOCKS_IN_FRAME_MASK(i); > > + num =3D num >> > > EDP_PSR2_SU_STATUS_NUM_SU_BLOCKS_IN_FRAME_SHIFT(i); > > + seq_printf(m, "\tSU num blocks in frame N-%u: > > %u\n", i, num); > > + } > > + > > + val =3D I915_READ(EDP_PSR2_SU_STATUS2); > > + seq_printf(m, "PSR2 SU status2: 0x%08x\n", val); > > + for (i =3D 0; val && i < 3; i++) { > > + u32 num; > > + > > + num =3D val & > > EDP_PSR2_SU_STATUS_NUM_SU_BLOCKS_IN_FRAME_MASK(i); > > + num =3D num >> > > EDP_PSR2_SU_STATUS_NUM_SU_BLOCKS_IN_FRAME_SHIFT(i); > > + seq_printf(m, "\tSU num blocks in frame N-%u: > > %u\n", i + 3, num); > > + } > > + > > + val =3D I915_READ(EDP_PSR2_SU_STATUS3); > > + seq_printf(m, "PSR2 SU status3: 0x%08x\n", val); > > + for (i =3D 0; val && i < 2; i++) { > > + u32 num; > > + > > + num =3D val & > > EDP_PSR2_SU_STATUS_NUM_SU_BLOCKS_IN_FRAME_MASK(i); > > + num =3D num >> > > EDP_PSR2_SU_STATUS_NUM_SU_BLOCKS_IN_FRAME_SHIFT(i); > > + seq_printf(m, "\tSU num blocks in frame N-%u: > > %u\n", i + 6, num); > nitpick: Have you considered reducing the text that's getting printed > here? I guess we might not need to increase the read buffer size in > IGT > if we do some thing like this.=20 >=20 > Frame SU blocks > 0 f > 1 o > 2 o > .... >=20 > I'll leave it to you if you want to change, but I do prefer making > this > less verbose. Down to this: Sink support: yes [0x03] PSR mode: PSR2 enabled Source PSR ctl: enabled [0xc2000216] Source PSR status: CAPTURE [0x14080030] Busy frontbuffer bits: 0x00000000 Frame: PSR2 SU blocks: 0 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 I will just check if the SU blocks are easy to parse from IGT tests. >=20 > > + } > > } > > =20 > > unlock: --=-XPoC6JfoT4v8sNIp4h/r Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- iQEzBAABCAAdFiEEVNG051EijGa0MiaQVenbO/mOWkkFAlwSn6oACgkQVenbO/mO WklcKgf+Iq/LuekbNLG51UGFnjfcPgH9uXjj1m0ZLhfs63zavRh52M8eW+X5ORr9 2zs17UwPuCZgYKLigfQ4i5/+ZeX6zTVdGNFBMhdyUG2Rm0/dtnU0kssj+TaNiMuH zLgKVe91iYqqkA1ptNJ3OG4zEEPEFlPgCyFWb0nCJEkJjIsufV1+IreI+VaHbCRl IVL3+b2vdK2QDfvEeJn/joQpnkrPENN6XOtJFeS3Hzn42qYkxLq6T09JM/7t2onk K/oP2WlQ8huTnL/ztsKNiOFGdOr4xZ7qaCEqYxadoqn7/UXqeRCsAYHb4/GvcPn9 1rL0BCtxC9gsEC4OQw6Ok6JUdt+lXA== =uC41 -----END PGP SIGNATURE----- --=-XPoC6JfoT4v8sNIp4h/r-- --===============1690596477== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: inline X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4 IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlz dHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4Cg== --===============1690596477==--