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From: Richard Henderson <rth@twiddle.net>
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Date: Tue, 4 Jul 2017 12:38:01 -1000
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Subject: Re: [Qemu-devel] [PATCH RFC v19 00/13] QEMU AVR 8 bit cores
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To: Michael Rolnik <mrolnik@gmail.com>, QEMU Developers <qemu-devel@nongnu.org>
Cc: Anichang <anichang@protonmail.ch>

On 06/21/2017 09:15 PM, Michael Rolnik wrote:
> Hi all,
> 
> are there any action items for me?

What kind of testing are you doing for this?

I just briefly browsed through the code again and happened to see that ROR has 
a critical typo.  Considering that ROR must be used for multi-byte shifts, I'm 
wondering how you wouldn't have found this via even cursory testing.

> +int avr_translate_ROR(CPUAVRState *env, DisasContext *ctx, uint32_t opcode)
> +{
> +    TCGv Rd = cpu_r[ROR_Rd(opcode)];
> +    TCGv t0 = tcg_temp_new_i32();
> +
> +    tcg_gen_shli_tl(t0, cpu_Cf, 7);
> +    tcg_gen_andi_tl(cpu_Cf, Rd, 0);


r~