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From: Manish Jaggi <mjaggi@caviumnetworks.com>
To: "Roger Pau Monné" <roger.pau@citrix.com>,
	"Stefano Stabellini" <sstabellini@kernel.org>
Cc: edgar.iglesias@xilinx.com, punit.agrawal@arm.com,
	Vikram Sethi <vikrams@codeaurora.org>,
	'Wei Chen' <Wei.Chen@arm.com>,
	'Steve Capper' <Steve.Capper@arm.com>,
	'Andre Przywara' <andre.przywara@arm.com>,
	manish.jaggi@caviumnetworks.com,
	'Julien Grall' <julien.grall@linaro.org>,
	'Vikram Sethi' <vikrams@qti.qualcomm.com>,
	'Sinan Kaya' <okaya@qti.qualcomm.com>,
	'Sameer Goel' <sgoel@qti.qualcomm.com>,
	'xen-devel' <xen-devel@lists.xenproject.org>,
	'Dave P Martin' <Dave.Martin@arm.com>,
	'Vijaya Kumar K' <Vijaya.Kumar@caviumnetworks.com>
Subject: Re: [RFC] ARM PCI Passthrough design document
Date: Fri, 19 Jan 2018 16:04:05 +0530	[thread overview]
Message-ID: <714a9a71-ccb7-ae25-7a96-9d43ef2e8d8d@caviumnetworks.com> (raw)
In-Reply-To: <20170708073436.nuje6c7aeyu6nbtt@MacBook-Pro-de-Roger.local>

Hi Roger/Vikram/Stefano,


On 07/08/2017 01:04 PM, Roger Pau Monné wrote:
> On Fri, Jul 07, 2017 at 02:50:01PM -0700, Stefano Stabellini wrote:
>> On Fri, 7 Jul 2017, Roger Pau Monné wrote:
>>> On Thu, Jul 06, 2017 at 03:55:28PM -0500, Vikram Sethi wrote:
>>>>>>> AER: Will PCIe non-fatal and fatal errors (secondary bus reset for fatal)
>>>>>>> be
>>>>> recoverable in Xen?
>>>>>>> Will drivers in doms be notified about fatal errors so they can be
>>>>>>> quiesced
>>>>> before doing secondary bus reset in Xen?
>>>>>>> Will Xen support Firmware First Error handling for AER? i.e When
>>>>>>> platform does Firmware first error handling for AER and/or filtering of
>>>>>>> AER,
>>>>> sends associated ACPI HEST logs to Xen How will AER notification and logs be
>>>>> propagated to the doms: injected ACPI HEST?
>>>>>
>>>>> Hm, I'm not sure I follow here, I don't see AER tied to ACPI. AER is a PCIe
>>>>> capability, and according to the spec can be setup completely independent to
>>>>> ACPI.
>>>>>
>>>> True, it can be independent if not using firmware first AER handling (FFH). But
>>>> Firmware tells the OS whether firmware first is in use.
>>>> If FFH is in use, the AER interrupt goes to firmware and then firmware processes
>>> I'm sorry, but how is the firmware supposed to know which interrupt is
>>> AER using? That's AFAIK setup in the PCI AER capabilities, and
>>> depends on whether the OS configures the device to use MSI or MSI-X.
>>>
>>> Is there some kind of side-band mechanism that delivers the AER
>>> interrupt using a different method?
>>>
>>>> the AER logs, filters errors, and sends a ACPI HEST log with the filtered AER
>>>> regs to OS along with an ACPI event/interrupt. Kernel is not supposed to touch
>>>> the AER registers directly in this case, but act on the register values in the
>>>> HEST log.
>>>> http://elixir.free-electrons.com/linux/latest/source/drivers/pci/pcie/aer/aerdrv_acpi.c#L94
>>> That's not a problem IMHO, Xen could even mask the AER capability from
>>> the Dom0/guest completely if needed.
>>>
>>>> If Firmware is using FFH, Xen will get a HEST log with AER registers, and must
>>>> parse those registers instead of reading AER config space.
>>> Xen will not get an event, it's going to be delivered to Dom0 because
>>> when using ACPI Dom0 is the OSPM (not Xen). I assume this event is
>>> going to be notified by triggering an interrupt from the ACPI SCI?
>> It is still possible to get the event in Xen, either by having Dom0 tell
>> Xen about it, or my moving ACPI SCI handling in Xen. If we move ACPI SCI
>> handling in Xen, we could still forward a virtual SCI interrupt to Dom0
>> in cases where Xen decides that Dom0 should be the one handling the
>> event. In other cases, where Xen knows how to handle the event, then
>> nothing would be sent to Dom0. Would that work?
> Maybe that's different on ARM vs x86, but when receiving the SCI
> interrupt the OSPM has to execute some AML in order to figure out
> which event has triggered. Even if Xen can trap the SCI, it has no way
> to execute AML, and that in any case can only be done by one entity,
> the OSPM.
>
> IMHO, for this to be viable Dom0 should notify the event to Xen.
Any further update on this discussion ?
>
> Roger.


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  reply	other threads:[~2018-01-19 10:34 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-26 17:14 [RFC] ARM PCI Passthrough design document Julien Grall
2017-05-29  2:30 ` Manish Jaggi
2017-05-29 18:14   ` Julien Grall
2017-05-30  5:53     ` Manish Jaggi
2017-05-30  9:33       ` Julien Grall
2017-05-30  7:53     ` Roger Pau Monné
2017-05-30  9:42       ` Julien Grall
2017-05-30  7:40 ` Roger Pau Monné
2017-05-30  9:54   ` Julien Grall
2017-06-16  0:31     ` Stefano Stabellini
2017-06-16  0:23 ` Stefano Stabellini
2017-06-20  0:19 ` Vikram Sethi
2017-06-28 15:22   ` Julien Grall
2017-06-29 15:17     ` Vikram Sethi
2017-07-03 14:35       ` Julien Grall
2017-07-04  8:30     ` roger.pau
2017-07-06 20:55       ` Vikram Sethi
2017-07-07  8:49         ` Roger Pau Monné
2017-07-07 21:50           ` Stefano Stabellini
2017-07-07 23:40             ` Vikram Sethi
2017-07-08  7:34             ` Roger Pau Monné
2018-01-19 10:34               ` Manish Jaggi [this message]
2017-07-19 14:41 ` Notes from PCI Passthrough design discussion at Xen Summit Punit Agrawal
2017-07-20  3:54   ` Manish Jaggi
2017-07-20  8:24     ` Roger Pau Monné
2017-07-20  9:32       ` Manish Jaggi
2017-07-20 10:29         ` Roger Pau Monné
2017-07-20 10:47           ` Julien Grall
2017-07-20 11:06             ` Roger Pau Monné
2017-07-20 11:52               ` Julien Grall
2017-07-20 11:02           ` Manish Jaggi
2017-07-20 10:41         ` Julien Grall
2017-07-20 11:00           ` Manish Jaggi
2017-07-20 12:24             ` Julien Grall
2018-01-22 11:10 ` [RFC] ARM PCI Passthrough design document Manish Jaggi

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