All of lore.kernel.org
 help / color / mirror / Atom feed
From: Michal Orzel <michal.orzel@amd.com>
To: Julien Grall <julien@xen.org>, <xen-devel@lists.xenproject.org>
Cc: <Luca.Fancellu@arm.com>, Julien Grall <jgrall@amazon.com>,
	"Stefano Stabellini" <sstabellini@kernel.org>,
	Bertrand Marquis <bertrand.marquis@arm.com>,
	Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>
Subject: Re: [PATCH v4 11/14] xen/arm64: Rework the memory layout
Date: Mon, 16 Jan 2023 09:46:30 +0100	[thread overview]
Message-ID: <72b2be45-d7bc-a94f-1d49-b9fc0b2fd081@amd.com> (raw)
In-Reply-To: <20230113101136.479-12-julien@xen.org>

Hi Julien,

On 13/01/2023 11:11, Julien Grall wrote:
> 
> 
> From: Julien Grall <jgrall@amazon.com>
> 
> Xen is currently not fully compliant with the Arm Arm because it will
> switch the TTBR with the MMU on.
> 
> In order to be compliant, we need to disable the MMU before
> switching the TTBR. The implication is the page-tables should
> contain an identity mapping of the code switching the TTBR.
> 
> In most of the case we expect Xen to be loaded in low memory. I am aware
> of one platform (i.e AMD Seattle) where the memory start above 512GB.
> To give us some slack, consider that Xen may be loaded in the first 2TB
> of the physical address space.
> 
> The memory layout is reshuffled to keep the first two slots of the zeroeth
Should be "four slots" instead of "two".

> level free. Xen will now be loaded at (2TB + 2MB). This requires a slight
> tweak of the boot code because XEN_VIRT_START cannot be used as an
> immediate.
> 
> This reshuffle will make trivial to create a 1:1 mapping when Xen is
> loaded below 2TB.
> 
> Signed-off-by: Julien Grall <jgrall@amazon.com>
> ----
>     Changes in v4:
>         - Correct the documentation
>         - The start address is 2TB, so slot0 is 4 not 2.
> 
>     Changes in v2:
>         - Reword the commit message
>         - Load Xen at 2TB + 2MB
>         - Update the documentation to reflect the new layout
> ---
>  xen/arch/arm/arm64/head.S         |  3 ++-
>  xen/arch/arm/include/asm/config.h | 35 ++++++++++++++++++++-----------
>  xen/arch/arm/mm.c                 | 11 +++++-----
>  3 files changed, 31 insertions(+), 18 deletions(-)
> 
> diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S
> index 4a3f87117c83..663f5813b12e 100644
> --- a/xen/arch/arm/arm64/head.S
> +++ b/xen/arch/arm/arm64/head.S
> @@ -607,7 +607,8 @@ create_page_tables:
>           * need an additional 1:1 mapping, the virtual mapping will
>           * suffice.
>           */
> -        cmp   x19, #XEN_VIRT_START
> +        ldr   x0, =XEN_VIRT_START
> +        cmp   x19, x0
>          bne   1f
>          ret
>  1:
> diff --git a/xen/arch/arm/include/asm/config.h b/xen/arch/arm/include/asm/config.h
> index 6c1b762e976d..c5d407a7495f 100644
> --- a/xen/arch/arm/include/asm/config.h
> +++ b/xen/arch/arm/include/asm/config.h
> @@ -72,15 +72,12 @@
>  #include <xen/page-size.h>
> 
>  /*
> - * Common ARM32 and ARM64 layout:
> + * ARM32 layout:
>   *   0  -   2M   Unmapped
>   *   2M -   4M   Xen text, data, bss
>   *   4M -   6M   Fixmap: special-purpose 4K mapping slots
>   *   6M -  10M   Early boot mapping of FDT
> - *   10M - 12M   Livepatch vmap (if compiled in)
> - *
> - * ARM32 layout:
> - *   0  -  12M   <COMMON>
> + *  10M -  12M   Livepatch vmap (if compiled in)
>   *
>   *  32M - 128M   Frametable: 24 bytes per page for 16GB of RAM
>   * 256M -   1G   VMAP: ioremap and early_ioremap use this virtual address
> @@ -90,14 +87,22 @@
>   *   2G -   4G   Domheap: on-demand-mapped
>   *
>   * ARM64 layout:
> - * 0x0000000000000000 - 0x0000007fffffffff (512GB, L0 slot [0])
> - *   0  -  12M   <COMMON>
> + * 0x0000000000000000 - 0x00001fffffffffff (2TB, L0 slots [0..3])
End address should be 0x1FFFFFFFFFF (one less f).

> + *  Reserved to identity map Xen
> + *
> + * 0x0000020000000000 - 0x000028fffffffff (512GB, L0 slot [4]
End address should be 0x27FFFFFFFFF.

> + *  (Relative offsets)
> + *   0  -   2M   Unmapped
> + *   2M -   4M   Xen text, data, bss
> + *   4M -   6M   Fixmap: special-purpose 4K mapping slots
> + *   6M -  10M   Early boot mapping of FDT
> + *  10M -  12M   Livepatch vmap (if compiled in)
>   *
>   *   1G -   2G   VMAP: ioremap and early_ioremap
>   *
>   *  32G -  64G   Frametable: 24 bytes per page for 5.3TB of RAM
>   *
> - * 0x0000008000000000 - 0x00007fffffffffff (127.5TB, L0 slots [1..255])
> + * 0x0000008000000000 - 0x00007fffffffffff (127.5TB, L0 slots [5..255])
Start address should be 0x28000000000.

Not related to this patch:
I took a look at config.h and spotted two things:
1) DIRECTMAP_SIZE calculation is incorrect. It is defined as (SLOT0_ENTRY_SIZE * (265-256))
but it actually should be (SLOT0_ENTRY_SIZE * (266-256)) i.e. 10 slots and not 9. Due to this
bug we actually support 4.5TB of direct-map and not 5TB.

2) frametable information
struct page_info is no longer 24B but 56B for arm64 and 32B for arm32. It looks like SUPPORT.md
took this into account when stating that we support 12GB for arm32 and 2TB for arm64. However,
this is also wrong as it does not take into account physical address compression. With PDX that
is enabled by default we could fit tens of TB in 32GB frametable. I think we want to get rid of
comments like "Frametable: 24 bytes per page for 16GB of RAM" in favor of just "Frametable".
This is to because the struct page_info size may change again and it is rather difficult to
calculate the max RAM size supported with PDX enabled.

If you want, I can push the patches for these issues.

~Michal



  parent reply	other threads:[~2023-01-16  8:46 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-13 10:11 [PATCH v4 00/14] xen/arm: Don't switch TTBR while the MMU is on Julien Grall
2023-01-13 10:11 ` [PATCH v4 01/14] xen/arm64: flushtlb: Reduce scope of barrier for local TLB flush Julien Grall
2023-01-13 11:36   ` Henry Wang
2023-01-13 10:11 ` [PATCH v4 02/14] xen/arm64: flushtlb: Implement the TLBI repeat workaround for TLB flush by VA Julien Grall
2023-01-13 13:22   ` Henry Wang
2023-01-13 17:56   ` Luca Fancellu
2023-01-16  8:36     ` Julien Grall
2023-01-13 10:11 ` [PATCH v4 03/14] xen/arm32: flushtlb: Reduce scope of barrier for local TLB flush Julien Grall
2023-01-13 13:46   ` Henry Wang
2023-01-13 10:11 ` [PATCH v4 04/14] xen/arm: flushtlb: Reduce scope of barrier for the TLB range flush Julien Grall
2023-01-13 13:53   ` Henry Wang
2023-01-13 10:11 ` [PATCH v4 05/14] xen/arm: Clean-up the memory layout Julien Grall
2023-01-13 13:57   ` Henry Wang
2023-01-24 19:30   ` Julien Grall
2023-01-13 10:11 ` [PATCH v4 06/14] xen/arm32: head: Replace "ldr rX, =<label>" with "mov_w rX, <label>" Julien Grall
2023-01-13 10:45   ` Michal Orzel
2023-01-13 10:47     ` Julien Grall
2023-01-14  0:51   ` Henry Wang
2023-01-13 10:11 ` [PATCH v4 07/14] xen/arm32: head: Jump to the runtime mapping in enable_mmu() Julien Grall
2023-01-14  1:33   ` Henry Wang
2023-01-13 10:11 ` [PATCH v4 08/14] xen/arm32: head: Introduce an helper to flush the TLBs Julien Grall
2023-01-13 10:46   ` Michal Orzel
2023-01-14  2:16   ` Henry Wang
2023-01-13 10:11 ` [PATCH v4 09/14] xen/arm32: head: Remove restriction where to load Xen Julien Grall
2023-01-13 14:58   ` Luca Fancellu
2023-01-16  8:43     ` Julien Grall
2023-01-16  8:14   ` Michal Orzel
2023-01-16  8:55     ` Julien Grall
2023-01-16  9:32       ` Michal Orzel
2023-01-13 10:11 ` [PATCH v4 10/14] xen/arm32: head: Widen the use of the temporary mapping Julien Grall
2023-01-13 15:37   ` Luca Fancellu
2023-01-16  8:20   ` Michal Orzel
2023-01-24 19:43     ` Julien Grall
2023-01-27 19:19       ` Julien Grall
2023-01-13 10:11 ` [PATCH v4 11/14] xen/arm64: Rework the memory layout Julien Grall
2023-01-13 15:58   ` Luca Fancellu
2023-01-16  8:46   ` Michal Orzel [this message]
2023-01-16  9:29     ` Julien Grall
2023-01-16 10:59       ` Michal Orzel
2023-01-13 10:11 ` [PATCH v4 12/14] xen/arm64: mm: Introduce helpers to prepare/enable/disable the identity mapping Julien Grall
2023-01-13 16:26   ` Luca Fancellu
2023-01-16  8:53   ` Michal Orzel
2023-01-27 19:30     ` Julien Grall
2023-01-13 10:11 ` [PATCH v4 13/14] xen/arm64: mm: Rework switch_ttbr() Julien Grall
2023-01-13 16:50   ` Luca Fancellu
2023-01-16  9:23   ` Michal Orzel
2023-01-16  9:32     ` Julien Grall
2023-01-13 10:11 ` [PATCH v4 14/14] xen/arm64: smpboot: Directly switch to the runtime page-tables Julien Grall
2023-01-13 17:42   ` Luca Fancellu
2023-01-16  9:06     ` Luca Fancellu
2023-01-27 19:39       ` Julien Grall
2023-01-24 19:35 ` [PATCH v4 00/14] xen/arm: Don't switch TTBR while the MMU is on Julien Grall

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=72b2be45-d7bc-a94f-1d49-b9fc0b2fd081@amd.com \
    --to=michal.orzel@amd.com \
    --cc=Luca.Fancellu@arm.com \
    --cc=Volodymyr_Babchuk@epam.com \
    --cc=bertrand.marquis@arm.com \
    --cc=jgrall@amazon.com \
    --cc=julien@xen.org \
    --cc=sstabellini@kernel.org \
    --cc=xen-devel@lists.xenproject.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.