From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefano Babic Date: Fri, 17 Mar 2017 12:12:56 +0100 Subject: [U-Boot] [PATCH 12/14] imx: ventana: add GW560x support In-Reply-To: <1489420274-2691-13-git-send-email-tharvey@gateworks.com> References: <1489420274-2691-1-git-send-email-tharvey@gateworks.com> <1489420274-2691-13-git-send-email-tharvey@gateworks.com> Message-ID: <7317d378-c194-1508-005b-4fcfef89255e@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 13/03/2017 16:51, Tim Harvey wrote: > Signed-off-by: Tim Harvey > --- > board/gateworks/gw_ventana/common.c | 181 ++++++++++++++++++++++++---- > board/gateworks/gw_ventana/eeprom.c | 4 + > board/gateworks/gw_ventana/gsc.c | 4 + > board/gateworks/gw_ventana/gw_ventana.c | 4 +- > board/gateworks/gw_ventana/ventana_eeprom.h | 1 + > include/configs/gw_ventana.h | 1 - > 6 files changed, 167 insertions(+), 28 deletions(-) > > diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c > index f7e93e2..69dc8fc 100644 > --- a/board/gateworks/gw_ventana/common.c > +++ b/board/gateworks/gw_ventana/common.c > @@ -51,6 +51,20 @@ static iomux_v3_cfg_t const gw5904_emmc_pads[] = { > IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), > IOMUX_PADS(PAD_SD3_RST__SD3_RESET | MUX_PAD_CTRL(USDHC_PAD_CTRL)), > }; > +/* 8-bit eMMC on SD2/NAND */ > +static iomux_v3_cfg_t const gw560x_emmc_sd2_pads[] = { > + IOMUX_PADS(PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), > + IOMUX_PADS(PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), > + IOMUX_PADS(PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), > + IOMUX_PADS(PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), > + IOMUX_PADS(PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), > + IOMUX_PADS(PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), > + IOMUX_PADS(PAD_NANDF_D4__SD2_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), > + IOMUX_PADS(PAD_NANDF_D5__SD2_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), > + IOMUX_PADS(PAD_NANDF_D6__SD2_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), > + IOMUX_PADS(PAD_NANDF_D7__SD2_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), > +}; > + > static iomux_v3_cfg_t const usdhc3_pads[] = { > IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), > IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), > @@ -365,6 +379,39 @@ static iomux_v3_cfg_t const gw553x_gpio_pads[] = { > IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG), > }; > > +static iomux_v3_cfg_t const gw560x_gpio_pads[] = { > + /* RS232_EN# */ > + IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG), > + /* CAN_STBY */ > + IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG), > + /* USB_HUBRST# */ > + IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG), > + /* PANLEDG# */ > + IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG), > + /* PANLEDR# */ > + IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG), > + /* MX6_LOCLED# */ > + IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG), > + /* IOEXP_PWREN# */ > + IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG), > + /* IOEXP_IRQ# */ > + IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)), > + /* DIOI2C_DIS# */ > + IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG), > + /* VID_EN */ > + IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG), > + /* PCI_RST# */ > + IOMUX_PADS(PAD_DISP0_DAT10__GPIO4_IO31 | DIO_PAD_CFG), > + /* RS485_EN */ > + IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | DIO_PAD_CFG), > + /* PCIESKT_WDIS# */ > + IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG), > + /* USBH2_PEN (OTG) */ > + IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG), > + /* 12V0_PWR_EN */ > + IOMUX_PADS(PAD_DISP0_DAT5__GPIO4_IO26 | DIO_PAD_CFG), > +}; > + > static iomux_v3_cfg_t const gw5904_gpio_pads[] = { > /* USB_HUBRST# */ > IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG), > @@ -614,6 +661,33 @@ struct dio_cfg gw553x_dio[] = { > }, > }; > > +struct dio_cfg gw560x_dio[] = { > + { > + { IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) }, > + IMX_GPIO_NR(1, 16), > + { 0, 0 }, > + 0 > + }, > + { > + { IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) }, > + IMX_GPIO_NR(1, 19), > + { IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) }, > + 2 > + }, > + { > + { IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17) }, > + IMX_GPIO_NR(1, 17), > + { IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) }, > + 3 > + }, > + { > + {IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20) }, > + IMX_GPIO_NR(1, 20), > + { 0, 0 }, > + 0 > + }, > +}; > + > struct dio_cfg gw5904_dio[] = { > { > { IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) }, > @@ -856,6 +930,27 @@ struct ventana gpio_cfg[GW_UNKNOWN] = { > .mmc_cd = IMX_GPIO_NR(7, 0), > }, > > + /* GW560x */ > + { > + .gpio_pads = gw560x_gpio_pads, > + .num_pads = ARRAY_SIZE(gw560x_gpio_pads)/2, > + .dio_cfg = gw560x_dio, > + .dio_num = ARRAY_SIZE(gw560x_dio), > + .leds = { > + IMX_GPIO_NR(4, 6), > + IMX_GPIO_NR(4, 7), > + IMX_GPIO_NR(4, 15), > + }, > + .pcie_rst = IMX_GPIO_NR(4, 31), > + .mezz_pwren = IMX_GPIO_NR(2, 19), > + .mezz_irq = IMX_GPIO_NR(2, 18), > + .rs232_en = GP_RS232_EN, > + .vidin_en = IMX_GPIO_NR(3, 31), > + .wdis = IMX_GPIO_NR(7, 12), > + .otgpwr_en = IMX_GPIO_NR(4, 15), > + .mmc_cd = IMX_GPIO_NR(7, 0), > + }, > + > /* GW5904 */ > { > .gpio_pads = gw5904_gpio_pads, > @@ -982,6 +1077,10 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info) > > /* Anything else board specific */ > switch(board) { > + case GW560x: > + gpio_request(IMX_GPIO_NR(4, 26), "12p0_en"); > + gpio_direction_output(IMX_GPIO_NR(4, 26), 1); > + break; > case GW5904: > gpio_request(IMX_GPIO_NR(5, 11), "skt1_wdis#"); > gpio_direction_output(IMX_GPIO_NR(5, 11), 1); > @@ -1089,6 +1188,8 @@ void setup_board_gpio(int board, struct ventana_board_info *info) > void setup_pmic(void) > { > struct pmic *p; > + struct ventana_board_info ventana_info; > + int board = read_eeprom(CONFIG_I2C_GSC, &ventana_info); > u32 reg; > > i2c_set_bus_num(CONFIG_I2C_PMIC); > @@ -1121,23 +1222,27 @@ void setup_pmic(void) > debug("probed LTC3676 at 0x%x\n", CONFIG_POWER_LTC3676_I2C_ADDR); > power_ltc3676_init(CONFIG_I2C_PMIC); > p = pmic_get("LTC3676_PMIC"); > - if (p && !pmic_probe(p)) { > - puts("PMIC: LTC3676\n"); > - /* > - * set board-specific scalar for max CPU frequency > - * per CPU based on the LDO enabled Operating Ranges > - * defined in the respective IMX6DQ and IMX6SDL > - * datasheets. The voltage resulting from the R1/R2 > - * feedback inputs on Ventana is 1308mV. Note that this > - * is a bit shy of the Vmin of 1350mV in the datasheet > - * for LDO enabled mode but is as high as we can go. > - * > - * We will rely on an OS kernel driver to properly > - * regulate these per CPU operating point and use LDO > - * bypass mode when using the higher frequency > - * operating points to compensate as LDO bypass mode > - * allows the rails be 125mV lower. > - */ > + if (!p || pmic_probe(p)) > + return; > + puts("PMIC: LTC3676\n"); > + /* > + * set board-specific scalar for max CPU frequency > + * per CPU based on the LDO enabled Operating Ranges > + * defined in the respective IMX6DQ and IMX6SDL > + * datasheets. The voltage resulting from the R1/R2 > + * feedback inputs on Ventana is 1308mV. Note that this > + * is a bit shy of the Vmin of 1350mV in the datasheet > + * for LDO enabled mode but is as high as we can go. > + */ > + switch (board) { > + case GW560x: > + /* mask PGOOD during SW3 transition */ > + pmic_reg_write(p, LTC3676_DVB3B, > + 0x1f | LTC3676_PGOOD_MASK); > + /* set SW3 (VDD_ARM) */ > + pmic_reg_write(p, LTC3676_DVB3A, 0x1f); > + break; > + default: > /* mask PGOOD during SW1 transition */ > pmic_reg_write(p, LTC3676_DVB1B, > 0x1f | LTC3676_PGOOD_MASK); > @@ -1154,7 +1259,7 @@ void setup_pmic(void) > } > > #ifdef CONFIG_FSL_ESDHC > -static struct fsl_esdhc_cfg usdhc_cfg = { USDHC3_BASE_ADDR }; > +static struct fsl_esdhc_cfg usdhc_cfg[2]; > > int board_mmc_init(bd_t *bis) > { > @@ -1168,17 +1273,36 @@ int board_mmc_init(bd_t *bis) > case GW54xx: > case GW553x: > SETUP_IOMUX_PADS(usdhc3_pads); > - usdhc_cfg.esdhc_base = USDHC3_BASE_ADDR; > - usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); > - usdhc_cfg.max_bus_width = 4; > - return fsl_esdhc_initialize(bis, &usdhc_cfg); > + usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR; > + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); > + usdhc_cfg[0].max_bus_width = 4; > + return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); > + /* GW560x has 0:SD2 (emmc) and 1:SD3 (microSD) */ > + case GW560x: > + /* usdhc2: 8-bit eMMC */ > + SETUP_IOMUX_PADS(gw560x_emmc_sd2_pads); > + usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR; > + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); > + usdhc_cfg[0].max_bus_width = 8; > + ret = fsl_esdhc_initialize(bis, &usdhc_cfg[0]); > + if (ret) > + printf("failed registering emmc usdhc2\n"); > + /* usdhc3: 4-bit microSD */ > + SETUP_IOMUX_PADS(usdhc3_pads); > + usdhc_cfg[1].esdhc_base = USDHC3_BASE_ADDR; > + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); > + usdhc_cfg[1].max_bus_width = 4; > + ret = fsl_esdhc_initialize(bis, &usdhc_cfg[1]); > + if (ret) > + printf("failed registering microSD usdhc2\n"); > + return 0; > case GW5904: > /* usdhc3: 8bit eMMC */ > SETUP_IOMUX_PADS(gw5904_emmc_pads); > - usdhc_cfg.esdhc_base = USDHC3_BASE_ADDR; > - usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); > - usdhc_cfg.max_bus_width = 8; > - ret = fsl_esdhc_initialize(bis, &usdhc_cfg); > + usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR; > + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); > + usdhc_cfg[0].max_bus_width = 8; > + ret = fsl_esdhc_initialize(bis, &usdhc_cfg[0]); > if (ret) > printf("failed registering emmc usdhc3\n"); > return 0; > @@ -1197,6 +1321,11 @@ int board_mmc_getcd(struct mmc *mmc) > > /* Card Detect */ > switch (board) { > + case GW560x: > + /* emmc is always present */ > + if (cfg->esdhc_base == USDHC2_BASE_ADDR) > + return 1; > + break; > case GW5904: > /* emmc is always present */ > if (cfg->esdhc_base == USDHC3_BASE_ADDR) > diff --git a/board/gateworks/gw_ventana/eeprom.c b/board/gateworks/gw_ventana/eeprom.c > index 9a1033a..cfd96b9 100644 > --- a/board/gateworks/gw_ventana/eeprom.c > +++ b/board/gateworks/gw_ventana/eeprom.c > @@ -93,6 +93,10 @@ read_eeprom(int bus, struct ventana_board_info *info) > break; > } > break; > + case '6': > + if (info->model[4] == '0') > + type = GW560x; > + break; > case '9': > if (info->model[4] == '0' && info->model[5] == '4') > type = GW5904; > diff --git a/board/gateworks/gw_ventana/gsc.c b/board/gateworks/gw_ventana/gsc.c > index 613a275..68b1ddb 100644 > --- a/board/gateworks/gw_ventana/gsc.c > +++ b/board/gateworks/gw_ventana/gsc.c > @@ -137,6 +137,10 @@ int gsc_info(int verbose) > break; > case '5': /* GW55xx */ > break; > + case '6': /* GW560x */ > + read_hwmon("VDD_IO4", GSC_HWMON_VDD_IO4, 3); > + read_hwmon("VDD_GPS", GSC_HWMON_VDD_IO3, 3); > + break; > } > return 0; > } > diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c > index 0768799..5f25d8d 100644 > --- a/board/gateworks/gw_ventana/gw_ventana.c > +++ b/board/gateworks/gw_ventana/gw_ventana.c > @@ -694,6 +694,7 @@ int checkboard(void) > static const struct boot_mode board_boot_modes[] = { > /* NAND: 64pages per block, 3 row addr cycles, 2 copies of FCB/DBBT */ > { "nand", MAKE_CFGVAL(0x80, 0x02, 0x00, 0x00) }, > + { "emmc2", MAKE_CFGVAL(0x60, 0x48, 0x00, 0x00) }, /* GW5600 */ > { NULL, 0 }, > }; > #endif > @@ -745,7 +746,8 @@ int misc_init_r(void) > setenv("fdt_file1", fdt); > if (board_type != GW551x && > board_type != GW552x && > - board_type != GW553x) > + board_type != GW553x && > + board_type != GW560x) > str[4] = 'x'; > str[5] = 'x'; > str[6] = 0; > diff --git a/board/gateworks/gw_ventana/ventana_eeprom.h b/board/gateworks/gw_ventana/ventana_eeprom.h > index bacaf5a..b6daf9b 100644 > --- a/board/gateworks/gw_ventana/ventana_eeprom.h > +++ b/board/gateworks/gw_ventana/ventana_eeprom.h > @@ -112,6 +112,7 @@ enum { > GW551x, > GW552x, > GW553x, > + GW560x, > GW5904, > GW_UNKNOWN, > GW_BADCRC, > diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h > index 1606f20..9c08fe3 100644 > --- a/include/configs/gw_ventana.h > +++ b/include/configs/gw_ventana.h > @@ -100,7 +100,6 @@ > > /* MMC Configs */ > #define CONFIG_SYS_FSL_ESDHC_ADDR 0 > -#define CONFIG_SYS_FSL_USDHC_NUM 1 > > /* Filesystem support */ > #define CONFIG_CMD_UBIFS > Reviewed-by: Stefano Babic Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================