From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1E21AC433E0 for ; Tue, 2 Jun 2020 13:24:58 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DFAAD206E2 for ; Tue, 2 Jun 2020 13:24:57 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="W4aFvNSz" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DFAAD206E2 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=RKs9rPkT4si17EJxcDoJYD7LF3G92xHhkVBkmflMpHA=; b=W4aFvNSzp2/p/+v4EOzQ0biWB rsELBpsDdHnqOmyVLL5hAr1mClNv5+X5VOUDqBGV4xs0oX8E22n17us799QQEFNEG7Dqlzd4jWr6u nL5Tm4buV7NLxPbaEouiPgqv5G0AF6FzeMrNlLZjUYq4CUvMRJAFYzH9gozwa8oWXu9Ahr97vriXt es7sCJUDdRoT4aOpq8r5MyDN8OQGBCuEMKkEJh92uyyANouqiCi0srsGjlX+Ezwo9JbTHkG2H7Ted VI6xBm+4Gtt419cjLHKaP/SrvWn4mk/H+R8wzwI4g6iXqOos3JSi8Sr100TIFs69nqw6y1cuBd9Tg bZrqpzEqA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jg6uN-0007bZ-1f; Tue, 02 Jun 2020 13:24:47 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jg6uJ-0007bB-RW for linux-arm-kernel@lists.infradead.org; Tue, 02 Jun 2020 13:24:45 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 58DB41FB; Tue, 2 Jun 2020 06:24:42 -0700 (PDT) Received: from [10.37.12.77] (unknown [10.37.12.77]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DA5DD3F305; Tue, 2 Jun 2020 06:24:37 -0700 (PDT) Subject: Re: [PATCH v4 4/5] coresight: etm: perf: Add default sink selection to etm perf To: mike.leach@linaro.org References: <20200526104642.9526-1-mike.leach@linaro.org> <20200526104642.9526-5-mike.leach@linaro.org> <51fcc1b5-a4ab-04d1-e395-95df9f4745f7@arm.com> From: Suzuki K Poulose Message-ID: <73ce6741-0361-7443-6714-56e8d64d49e1@arm.com> Date: Tue, 2 Jun 2020 14:29:30 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200602_062443_976716_A25F4DAF X-CRM114-Status: GOOD ( 31.05 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: coresight@lists.linaro.org, acme@kernel.org, mathieu.poirier@linaro.org, linux-arm-kernel@lists.infradead.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 06/02/2020 02:12 PM, Mike Leach wrote: > Hi Suzuki, > > On Tue, 2 Jun 2020 at 12:40, Suzuki K Poulose wrote: >> >> On 05/26/2020 11:46 AM, Mike Leach wrote: >>> Add default sink selection to the perf trace handling in the etm driver. >>> Uses the select default sink infrastructure to select a sink for the perf >>> session, if no other sink is specified. >>> >>> Signed-off-by: Mike Leach >> >> This patch looks fine to me as such. But please see below for some >> discussion on the future support for other configurations. >> >> >>> --- >>> .../hwtracing/coresight/coresight-etm-perf.c | 17 ++++++++++++++--- >>> 1 file changed, 14 insertions(+), 3 deletions(-) >>> >>> diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c >>> index 84f1dcb69827..1a3169e69bb1 100644 >>> --- a/drivers/hwtracing/coresight/coresight-etm-perf.c >>> +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c >>> @@ -226,9 +226,6 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, >>> sink = coresight_get_enabled_sink(true); >>> } >>> >>> - if (!sink) >>> - goto err; >>> - >>> mask = &event_data->mask; >>> >>> /* >>> @@ -253,6 +250,16 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, >>> continue; >>> } >>> >>> + /* >>> + * No sink provided - look for a default sink for one of the >>> + * devices. At present we only support topology where all CPUs >>> + * use the same sink [N:1], so only need to find one sink. The >>> + * coresight_build_path later will remove any CPU that does not >>> + * attach to the sink, or if we have not found a sink. >>> + */ >>> + if (!sink) >>> + sink = coresight_find_default_sink(csdev); >>> + >> >> While we are here, should we remove the "find enabled sink" if the csink >> is not specified via config. ? That step is problematic, as the user may >> not remember which sinks were enabled. Also, we can't hit that with >> perf tool as it prevents any invocation without sink (until this change). >> >> So may be this is a good time to get rid of that ? >> > > You are correct - the 'sink = coresight_get_enabled_sink(true);' was > dead code until this patch. > However - if someone has set up their system using sysfs to enable > sinks, then should we not respect that rather than assume they made a > mistake? If someone really wants to use a specific sink, then they could always specify it via the config attribute and it will be honoured. We need not carry along this non-intuitive hinting. > > Thinking about N:M topologies mentioned below - one method of handling > this is to enable relevant sinks and then let perf trace on any cores > that might use them. > >> Also, we may need to do special handling for cases where there multiple >> sinks (ETRS) and the cpus in the event mask has different preferred >> sink. We can defer it for now as we don't claim to support such >> configurations yet. > > Yes - the newer topologies will need some changes - beyond what we are > handling here. > However - especially for 1:1 - the best way may be to always use the > default sink - as specifying multiple sinks on the perf command line > may be problematical. > >> When we do, we could either : >> >> 1) Make sure the event is bound to a single CPU, in which case >> the sink remains the same for the event. >> >> OR >> >> 2) All the different "preferred" sinks (ETRs selected by the ETM) have >> the same capabilitiy. i.e, we can move around the "sink" specific >> buffers and use them where we end up using. > > If here by "capabilities" we are talking about buffer vs system memory > type sinks then I agree. We may need in future to limit the search Not necessarily. e.g, if we ever get two different types of system memory sinks, (e.g, a global ETR and a dedicate "new" sink for a cluster), we can't keep switching between the two sinks depending on how they use the buffers. (i.e, direct buffer vs double copy) Suzuki _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel