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From: "Verma, Vishal L" <vishal.l.verma@intel.com>
To: "gregory.price@memverge.com" <gregory.price@memverge.com>
Cc: "Williams, Dan J" <dan.j.williams@intel.com>,
	"Jonathan.Cameron@huawei.com" <Jonathan.Cameron@huawei.com>,
	"linux-cxl@vger.kernel.org" <linux-cxl@vger.kernel.org>
Subject: Re: [GIT preview] for-6.3/cxl-ram-region
Date: Tue, 31 Jan 2023 20:24:19 +0000	[thread overview]
Message-ID: <73ef066b15c5551087da3667398f462d427d3204.camel@intel.com> (raw)
In-Reply-To: <5b6cbfda865010219a6cfa79b5d52679cc0b8a4e.camel@intel.com>

On Tue, 2023-01-31 at 19:46 +0000, Verma, Vishal L wrote:
> On Tue, 2023-01-31 at 14:03 -0500, Gregory Price wrote:
> > 
> > 
> > Right now I believe this is failing due to the interleave and size not
> > having default values
> > 
> > ./cxl create-region -m -t ram -d decoder0.0 -w 1 -g 4096 mem0
> > cxl region: create_region: create_region: unable to determine region size
> > cxl region: cmd_create_region: created 0 regions
> > 
> > 
> > appears to be due to this code
> > static int create_region(struct cxl_ctx *ctx, int *count,
> >              struct parsed_params *p)
> > {
> > // ... snip ...
> >     rc = create_region_validate_config(ctx, p);
> >     if (rc)
> >         return rc;
> > 
> >     if (p->size) {
> >         size = p->size;
> >         default_size = false;
> >     } else if (p->ep_min_size) {
> >         size = p->ep_min_size * p->ways;
> > **    } else {
> > **        log_err(&rl, "%s: unable to determine region size\n", __func__);
> > **        return -ENXIO;
> > **    }
> > 
> > So both size and ep_min_size are 0 here
> > 
> > echo region0 > /sys/bus/cxl/devices/decoder0.0/create_ram_region
> > cat /sys/bus/cxl/devices/region0/interleave_ways
> > 0
> > cat /sys/bus/cxl/devices/region0/interleave_granularity
> > 0
> > cat /sys/bus/cxl/devices/region0/size
> > 0
> 
> Ah - this revealed an actual bug in these commits - the size and
> ep_min_size don't refer to the region's size, it is the capacity of the
> component memdevs. Right after create_ram_region, the region size is
> expected to be zero.
> 
> However the bug here was a pmem assumption I had missed. When
> determining sizes, we only look at pmem capacity, which is wrong. It
> happened to work in my testing because the memdevs I used had both pmem
> and ram capacity. I'll update with a fix shortly. Thanks for trying it
> out and reporting this!

I've updated the branch now with a fix for this.

  reply	other threads:[~2023-01-31 20:24 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-26  6:25 [GIT preview] for-6.3/cxl-ram-region Dan Williams
2023-01-26  6:29 ` Dan Williams
2023-01-26 18:50   ` Jonathan Cameron
2023-01-26 19:34     ` Jonathan Cameron
2023-01-30 14:16       ` Gregory Price
2023-01-30 20:10         ` Dan Williams
2023-01-30 20:58           ` Gregory Price
2023-01-30 23:18             ` Dan Williams
2023-01-30 22:00               ` Gregory Price
2023-01-31  2:00               ` Gregory Price
2023-01-31 16:56                 ` Dan Williams
2023-01-31 17:59                 ` Verma, Vishal L
2023-01-31 19:03                   ` Gregory Price
2023-01-31 19:46                     ` Verma, Vishal L
2023-01-31 20:24                       ` Verma, Vishal L [this message]
2023-01-31 23:03                         ` Gregory Price
2023-01-31 23:17                           ` Gregory Price
     [not found]                             ` <CGME20230131235012uscas1p11573de234af67d70a882d4ca0f3ebaab@uscas1p1.samsung.com>
2023-01-31 23:50                               ` Fan Ni
2023-02-01  5:29                                 ` Gregory Price
2023-02-01 21:16                                   ` Gregory Price
2023-02-02  1:06                                     ` Gregory Price
2023-02-02 16:03                                     ` Jonathan Cameron
2023-02-01 22:05                                       ` Gregory Price
2023-02-02 18:13                                         ` Jonathan Cameron
2023-02-02  0:43                                           ` Gregory Price
2023-02-02 18:18                                         ` Dan Williams
2023-02-02  0:44                                           ` Gregory Price
2023-02-07 16:31                                             ` Jonathan Cameron
2023-01-30 14:23       ` Gregory Price
2023-01-31 14:56         ` Jonathan Cameron
2023-01-31 17:34           ` Gregory Price
2023-01-26 22:05 ` Gregory Price
2023-01-26 22:20   ` Dan Williams
2023-02-04  2:36 ` Dan Williams

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