* [PATCH v2 1/2] ARM: dts: socfpga: Add fpga2hps and fpga2sdram bridges
@ 2018-08-22 8:41 Steffen Trumtrar
2018-08-22 8:41 ` [PATCH v2 2/2] ARM: dts: socfgpa: set bridges status to disabled Steffen Trumtrar
2018-09-13 7:27 ` [PATCH v2 1/2] ARM: dts: socfpga: Add fpga2hps and fpga2sdram bridges Steffen Trumtrar
0 siblings, 2 replies; 6+ messages in thread
From: Steffen Trumtrar @ 2018-08-22 8:41 UTC (permalink / raw)
To: linux-arm-kernel
Add the remaining two bridges on the Cyclone-V SoCFPGA SoCs.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
Changes in v2:
- set status to disabled, so there are no accidental users of the bridges
arch/arm/boot/dts/socfpga.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index b38f8c240558..11781f795de2 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -543,6 +543,20 @@
clocks = <&l4_main_clk>;
};
+ fpga_bridge2: fpga-bridge at ff600000 {
+ compatible = "altr,socfpga-fpga2hps-bridge";
+ reg = <0xff600000 0x100000>;
+ resets = <&rst FPGA2HPS_RESET>;
+ clocks = <&l4_main_clk>;
+ status = "disabled";
+ };
+
+ fpga_bridge3: fpga-bridge at ffc25080 {
+ compatible = "altr,socfpga-fpga2sdram-bridge";
+ reg = <0xffc25080 0x4>;
+ status = "disabled";
+ };
+
fpgamgr0: fpgamgr at ff706000 {
compatible = "altr,socfpga-fpga-mgr";
reg = <0xff706000 0x1000
--
2.11.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v2 2/2] ARM: dts: socfgpa: set bridges status to disabled
2018-08-22 8:41 [PATCH v2 1/2] ARM: dts: socfpga: Add fpga2hps and fpga2sdram bridges Steffen Trumtrar
@ 2018-08-22 8:41 ` Steffen Trumtrar
2018-09-13 7:27 ` [PATCH v2 1/2] ARM: dts: socfpga: Add fpga2hps and fpga2sdram bridges Steffen Trumtrar
1 sibling, 0 replies; 6+ messages in thread
From: Steffen Trumtrar @ 2018-08-22 8:41 UTC (permalink / raw)
To: linux-arm-kernel
The hps-to-fpga bridges can't be used, when the FPGA is not programmed.
Set the default state to disabled and leave enabling them to the board-specific
dts files.
Although this changes behavior, there are no in-tree users of the bridges, so
this won't break anything.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
arch/arm/boot/dts/socfpga.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 11781f795de2..d923adf897a1 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -534,6 +534,7 @@
reg = <0xff400000 0x100000>;
resets = <&rst LWHPS2FPGA_RESET>;
clocks = <&l4_main_clk>;
+ status = "disabled";
};
fpga_bridge1: fpga_bridge at ff500000 {
@@ -541,6 +542,7 @@
reg = <0xff500000 0x10000>;
resets = <&rst HPS2FPGA_RESET>;
clocks = <&l4_main_clk>;
+ status = "disabled";
};
fpga_bridge2: fpga-bridge at ff600000 {
--
2.11.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v2 1/2] ARM: dts: socfpga: Add fpga2hps and fpga2sdram bridges
2018-08-22 8:41 [PATCH v2 1/2] ARM: dts: socfpga: Add fpga2hps and fpga2sdram bridges Steffen Trumtrar
2018-08-22 8:41 ` [PATCH v2 2/2] ARM: dts: socfgpa: set bridges status to disabled Steffen Trumtrar
@ 2018-09-13 7:27 ` Steffen Trumtrar
2018-09-13 20:14 ` Alan Tull
1 sibling, 1 reply; 6+ messages in thread
From: Steffen Trumtrar @ 2018-09-13 7:27 UTC (permalink / raw)
To: linux-arm-kernel
Hi!
Steffen Trumtrar <s.trumtrar@pengutronix.de> writes:
> Add the remaining two bridges on the Cyclone-V SoCFPGA SoCs.
>
> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
> ---
> Changes in v2:
> - set status to disabled, so there are no accidental users of
> the bridges
>
> arch/arm/boot/dts/socfpga.dtsi | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm/boot/dts/socfpga.dtsi
> b/arch/arm/boot/dts/socfpga.dtsi
> index b38f8c240558..11781f795de2 100644
> --- a/arch/arm/boot/dts/socfpga.dtsi
> +++ b/arch/arm/boot/dts/socfpga.dtsi
> @@ -543,6 +543,20 @@
> clocks = <&l4_main_clk>;
> };
>
> + fpga_bridge2: fpga-bridge at ff600000 {
> + compatible =
> "altr,socfpga-fpga2hps-bridge";
> + reg = <0xff600000 0x100000>;
> + resets = <&rst FPGA2HPS_RESET>;
> + clocks = <&l4_main_clk>;
> + status = "disabled";
> + };
> +
> + fpga_bridge3: fpga-bridge at ffc25080 {
> + compatible =
> "altr,socfpga-fpga2sdram-bridge";
> + reg = <0xffc25080 0x4>;
> + status = "disabled";
> + };
> +
> fpgamgr0: fpgamgr at ff706000 {
> compatible = "altr,socfpga-fpga-mgr";
> reg = <0xff706000 0x1000
Any opinion on this? There shouldn't be any accidental use of the
bridges now with status=disabled.
Best regards,
Steffen
--
Pengutronix e.K. | Steffen Trumtrar
|
Industrial Linux Solutions |
http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany| Phone:
+49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax:
+49-5121-206917-5555|
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v2 1/2] ARM: dts: socfpga: Add fpga2hps and fpga2sdram bridges
2018-09-13 7:27 ` [PATCH v2 1/2] ARM: dts: socfpga: Add fpga2hps and fpga2sdram bridges Steffen Trumtrar
@ 2018-09-13 20:14 ` Alan Tull
2018-09-14 5:45 ` Steffen Trumtrar
0 siblings, 1 reply; 6+ messages in thread
From: Alan Tull @ 2018-09-13 20:14 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Sep 13, 2018 at 2:27 AM Steffen Trumtrar
<s.trumtrar@pengutronix.de> wrote:
>
>
> Hi!
>
> Steffen Trumtrar <s.trumtrar@pengutronix.de> writes:
>
> > Add the remaining two bridges on the Cyclone-V SoCFPGA SoCs.
> >
> > Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
> > ---
> > Changes in v2:
> > - set status to disabled, so there are no accidental users of
> > the bridges
> >
> > arch/arm/boot/dts/socfpga.dtsi | 14 ++++++++++++++
> > 1 file changed, 14 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/socfpga.dtsi
> > b/arch/arm/boot/dts/socfpga.dtsi
> > index b38f8c240558..11781f795de2 100644
> > --- a/arch/arm/boot/dts/socfpga.dtsi
> > +++ b/arch/arm/boot/dts/socfpga.dtsi
> > @@ -543,6 +543,20 @@
> > clocks = <&l4_main_clk>;
> > };
> >
> > + fpga_bridge2: fpga-bridge at ff600000 {
> > + compatible =
> > "altr,socfpga-fpga2hps-bridge";
> > + reg = <0xff600000 0x100000>;
> > + resets = <&rst FPGA2HPS_RESET>;
> > + clocks = <&l4_main_clk>;
> > + status = "disabled";
> > + };
> > +
> > + fpga_bridge3: fpga-bridge at ffc25080 {
> > + compatible =
> > "altr,socfpga-fpga2sdram-bridge";
> > + reg = <0xffc25080 0x4>;
> > + status = "disabled";
> > + };
> > +
> > fpgamgr0: fpgamgr at ff706000 {
> > compatible = "altr,socfpga-fpga-mgr";
> > reg = <0xff706000 0x1000
>
> Any opinion on this? There shouldn't be any accidental use of the
> bridges now with status=disabled.
Hi Steffen,
Do you have a use case you need this for?
I don't mind leaving it that way it is and letting people who are
actually enabling the bridges in their designs add the whole node.
Alan
>
>
> Best regards,
> Steffen
>
> --
> Pengutronix e.K. | Steffen Trumtrar
> |
> Industrial Linux Solutions |
> http://www.pengutronix.de/ |
> Peiner Str. 6-8, 31137 Hildesheim, Germany| Phone:
> +49-5121-206917-0 |
> Amtsgericht Hildesheim, HRA 2686 | Fax:
> +49-5121-206917-5555|
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v2 1/2] ARM: dts: socfpga: Add fpga2hps and fpga2sdram bridges
2018-09-13 20:14 ` Alan Tull
@ 2018-09-14 5:45 ` Steffen Trumtrar
2018-10-26 12:43 ` Steffen Trumtrar
0 siblings, 1 reply; 6+ messages in thread
From: Steffen Trumtrar @ 2018-09-14 5:45 UTC (permalink / raw)
To: linux-arm-kernel
Hi!
Alan Tull <atull@kernel.org> writes:
> On Thu, Sep 13, 2018 at 2:27 AM Steffen Trumtrar
> <s.trumtrar@pengutronix.de> wrote:
>>
>>
>> Hi!
>>
>> Steffen Trumtrar <s.trumtrar@pengutronix.de> writes:
>>
>> > Add the remaining two bridges on the Cyclone-V SoCFPGA SoCs.
>> >
>> > Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
>> > ---
>> > Changes in v2:
>> > - set status to disabled, so there are no accidental users
>> > of
>> > the bridges
>> >
>> > arch/arm/boot/dts/socfpga.dtsi | 14 ++++++++++++++
>> > 1 file changed, 14 insertions(+)
>> >
>> > diff --git a/arch/arm/boot/dts/socfpga.dtsi
>> > b/arch/arm/boot/dts/socfpga.dtsi
>> > index b38f8c240558..11781f795de2 100644
>> > --- a/arch/arm/boot/dts/socfpga.dtsi
>> > +++ b/arch/arm/boot/dts/socfpga.dtsi
>> > @@ -543,6 +543,20 @@
>> > clocks = <&l4_main_clk>;
>> > };
>> >
>> > + fpga_bridge2: fpga-bridge at ff600000 {
>> > + compatible =
>> > "altr,socfpga-fpga2hps-bridge";
>> > + reg = <0xff600000 0x100000>;
>> > + resets = <&rst FPGA2HPS_RESET>;
>> > + clocks = <&l4_main_clk>;
>> > + status = "disabled";
>> > + };
>> > +
>> > + fpga_bridge3: fpga-bridge at ffc25080 {
>> > + compatible =
>> > "altr,socfpga-fpga2sdram-bridge";
>> > + reg = <0xffc25080 0x4>;
>> > + status = "disabled";
>> > + };
>> > +
>> > fpgamgr0: fpgamgr at ff706000 {
>> > compatible = "altr,socfpga-fpga-mgr";
>> > reg = <0xff706000 0x1000
>>
>> Any opinion on this? There shouldn't be any accidental use of
>> the
>> bridges now with status=disabled.
>
> Hi Steffen,
>
> Do you have a use case you need this for?
>
Yes, of course. I think all our SoCFPGA customers use these
bridges.
> I don't mind leaving it that way it is and letting people who
> are
> actually enabling the bridges in their designs add the whole
> node.
>
Why do you think, that these bridges are different from the other
ones?
Or other IP blocks on the SoCFPGA even?
This is the socfpga.dtsi file, it describes the hardware common to
all
Cyclone5 SoCs. All SoCs have these bridges, so why not add it?
Best regards,
Steffen
--
Pengutronix e.K. | Steffen Trumtrar
|
Industrial Linux Solutions |
http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany| Phone:
+49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax:
+49-5121-206917-5555|
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v2 1/2] ARM: dts: socfpga: Add fpga2hps and fpga2sdram bridges
2018-09-14 5:45 ` Steffen Trumtrar
@ 2018-10-26 12:43 ` Steffen Trumtrar
0 siblings, 0 replies; 6+ messages in thread
From: Steffen Trumtrar @ 2018-10-26 12:43 UTC (permalink / raw)
To: linux-arm-kernel
Hi!
Steffen Trumtrar <s.trumtrar@pengutronix.de> writes:
> Hi!
>
> Alan Tull <atull@kernel.org> writes:
>
>> On Thu, Sep 13, 2018 at 2:27 AM Steffen Trumtrar
>> <s.trumtrar@pengutronix.de> wrote:
>>>
>>>
>>> Hi!
>>>
>>> Steffen Trumtrar <s.trumtrar@pengutronix.de> writes:
>>>
>>> > Add the remaining two bridges on the Cyclone-V SoCFPGA SoCs.
>>> >
>>> > Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
>>> > ---
>>> > Changes in v2:
>>> > - set status to disabled, so there are no accidental users
>>> > > of
>>> > the bridges
>>> >
>>> > arch/arm/boot/dts/socfpga.dtsi | 14 ++++++++++++++
>>> > 1 file changed, 14 insertions(+)
>>> >
>>> > diff --git a/arch/arm/boot/dts/socfpga.dtsi
>>> > b/arch/arm/boot/dts/socfpga.dtsi
>>> > index b38f8c240558..11781f795de2 100644
>>> > --- a/arch/arm/boot/dts/socfpga.dtsi
>>> > +++ b/arch/arm/boot/dts/socfpga.dtsi
>>> > @@ -543,6 +543,20 @@
>>> > clocks = <&l4_main_clk>;
>>> > };
>>> >
>>> > + fpga_bridge2: fpga-bridge at ff600000 {
>>> > + compatible =
>>> > "altr,socfpga-fpga2hps-bridge";
>>> > + reg = <0xff600000 0x100000>;
>>> > + resets = <&rst FPGA2HPS_RESET>;
>>> > + clocks = <&l4_main_clk>;
>>> > + status = "disabled";
>>> > + };
>>> > +
>>> > + fpga_bridge3: fpga-bridge at ffc25080 {
>>> > + compatible =
>>> > "altr,socfpga-fpga2sdram-bridge";
>>> > + reg = <0xffc25080 0x4>;
>>> > + status = "disabled";
>>> > + };
>>> > +
>>> > fpgamgr0: fpgamgr at ff706000 {
>>> > compatible = "altr,socfpga-fpga-mgr";
>>> > reg = <0xff706000 0x1000
>>>
>>> Any opinion on this? There shouldn't be any accidental use of
>>> the
>>> bridges now with status=disabled.
>>
>> Hi Steffen,
>>
>> Do you have a use case you need this for?
>>
>
> Yes, of course. I think all our SoCFPGA customers use these
> bridges.
>
>> I don't mind leaving it that way it is and letting people who
>> are
>> actually enabling the bridges in their designs add the whole
>> node.
>>
>
> Why do you think, that these bridges are different from the
> other ones?
> Or other IP blocks on the SoCFPGA even?
> This is the socfpga.dtsi file, it describes the hardware common
> to all
> Cyclone5 SoCs. All SoCs have these bridges, so why not add it?
>
Any opinion on this? I still don't see why these bridges are
different from the other IP cores.
Best regards,
Steffen
--
Pengutronix e.K. | Steffen Trumtrar
|
Industrial Linux Solutions |
http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany| Phone:
+49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax:
+49-5121-206917-5555|
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2018-10-26 12:43 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-08-22 8:41 [PATCH v2 1/2] ARM: dts: socfpga: Add fpga2hps and fpga2sdram bridges Steffen Trumtrar
2018-08-22 8:41 ` [PATCH v2 2/2] ARM: dts: socfgpa: set bridges status to disabled Steffen Trumtrar
2018-09-13 7:27 ` [PATCH v2 1/2] ARM: dts: socfpga: Add fpga2hps and fpga2sdram bridges Steffen Trumtrar
2018-09-13 20:14 ` Alan Tull
2018-09-14 5:45 ` Steffen Trumtrar
2018-10-26 12:43 ` Steffen Trumtrar
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