From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S938857AbdEXIcJ (ORCPT ); Wed, 24 May 2017 04:32:09 -0400 Received: from foss.arm.com ([217.140.101.70]:33480 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S935912AbdEXIcD (ORCPT ); Wed, 24 May 2017 04:32:03 -0400 Subject: Re: [PATCH v4 6/7] ARM: NOMMU: Set ARM_DMA_MEM_BUFFERABLE for M-class cpus To: Arnd Bergmann , Russell King - ARM Linux References: <1493029017-31382-1-git-send-email-vladimir.murzin@arm.com> <1493029017-31382-7-git-send-email-vladimir.murzin@arm.com> <20170523200142.GD22219@n2100.armlinux.org.uk> Cc: Linux ARM , sza@esh.hu, Robin Murphy , Alexandre Torgue , Andrew Morton , kbuild-all@01.org, Linux Kernel Mailing List , gregkh From: Vladimir Murzin Message-ID: <741c708e-9036-a0e1-46e1-90d82a195dff@arm.com> Date: Wed, 24 May 2017 09:31:54 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.7.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 23/05/17 21:33, Arnd Bergmann wrote: > On Tue, May 23, 2017 at 10:01 PM, Russell King - ARM Linux > wrote: >> On Mon, Apr 24, 2017 at 11:16:56AM +0100, Vladimir Murzin wrote: >>> Now, we have dedicated non-cacheable region for consistent DMA >>> operations. However, that region can still be marked as bufferable by >>> MPU, so it'd be safer to have barriers by default. >> >> What do you actually want here? Your patch doesn't quite make sense, >> the commit description seems to indicate that you require this option >> to be set for V7M, but the patch says otherwise. >> >>> config ARM_DMA_MEM_BUFFERABLE >>> - bool "Use non-cacheable memory for DMA" if (CPU_V6 || CPU_V6K) && !CPU_V7 >>> - default y if CPU_V6 || CPU_V6K || CPU_V7 >>> + bool "Use non-cacheable memory for DMA" if (CPU_V6 || CPU_V6K || CPU_V7M) && !CPU_V7 >> >> This "if" conditional conditionalises the visibility of the option, >> it doesn't conditionalise the value. >> >>> + default y if CPU_V6 || CPU_V6K || CPU_V7 || CPU_V7M >> >> Taking both of these changes together what you end up with is an option >> presented to the user for "Use non-cacheable memory for DMA" which >> they can choose to disable. >> >> If you require this option to be set, that's incorrect - your modification >> to the default line is correct, but the first line is not. To achieve >> that, you want the if condition to evaluate false for V7M, thereby hiding >> the option from the user. In that case, the default value will always be >> assigned to the option. > > I had the opposite comment in the previous version ;-) > https://lkml.org/lkml/2017/4/19/185 > > I think the current patch is correct, but the description could still be > clarified: On some of the beefier ARMv7-M machines (with DMA > and write buffers) we want this enabled, while those that didn't > need it until now also won't need it in the future. Ok. Do you want it go into commit message or option description or maybe both? Thanks Vladimir > > Arnd > From mboxrd@z Thu Jan 1 00:00:00 1970 From: vladimir.murzin@arm.com (Vladimir Murzin) Date: Wed, 24 May 2017 09:31:54 +0100 Subject: [PATCH v4 6/7] ARM: NOMMU: Set ARM_DMA_MEM_BUFFERABLE for M-class cpus In-Reply-To: References: <1493029017-31382-1-git-send-email-vladimir.murzin@arm.com> <1493029017-31382-7-git-send-email-vladimir.murzin@arm.com> <20170523200142.GD22219@n2100.armlinux.org.uk> Message-ID: <741c708e-9036-a0e1-46e1-90d82a195dff@arm.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 23/05/17 21:33, Arnd Bergmann wrote: > On Tue, May 23, 2017 at 10:01 PM, Russell King - ARM Linux > wrote: >> On Mon, Apr 24, 2017 at 11:16:56AM +0100, Vladimir Murzin wrote: >>> Now, we have dedicated non-cacheable region for consistent DMA >>> operations. However, that region can still be marked as bufferable by >>> MPU, so it'd be safer to have barriers by default. >> >> What do you actually want here? Your patch doesn't quite make sense, >> the commit description seems to indicate that you require this option >> to be set for V7M, but the patch says otherwise. >> >>> config ARM_DMA_MEM_BUFFERABLE >>> - bool "Use non-cacheable memory for DMA" if (CPU_V6 || CPU_V6K) && !CPU_V7 >>> - default y if CPU_V6 || CPU_V6K || CPU_V7 >>> + bool "Use non-cacheable memory for DMA" if (CPU_V6 || CPU_V6K || CPU_V7M) && !CPU_V7 >> >> This "if" conditional conditionalises the visibility of the option, >> it doesn't conditionalise the value. >> >>> + default y if CPU_V6 || CPU_V6K || CPU_V7 || CPU_V7M >> >> Taking both of these changes together what you end up with is an option >> presented to the user for "Use non-cacheable memory for DMA" which >> they can choose to disable. >> >> If you require this option to be set, that's incorrect - your modification >> to the default line is correct, but the first line is not. To achieve >> that, you want the if condition to evaluate false for V7M, thereby hiding >> the option from the user. In that case, the default value will always be >> assigned to the option. > > I had the opposite comment in the previous version ;-) > https://lkml.org/lkml/2017/4/19/185 > > I think the current patch is correct, but the description could still be > clarified: On some of the beefier ARMv7-M machines (with DMA > and write buffers) we want this enabled, while those that didn't > need it until now also won't need it in the future. Ok. Do you want it go into commit message or option description or maybe both? Thanks Vladimir > > Arnd >