From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 88686C38142 for ; Tue, 17 Jan 2023 23:17:12 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.479970.744085 (Exim 4.92) (envelope-from ) id 1pHvCF-0005Py-8L; Tue, 17 Jan 2023 23:16:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 479970.744085; Tue, 17 Jan 2023 23:16:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pHvCF-0005Pr-4o; Tue, 17 Jan 2023 23:16:51 +0000 Received: by outflank-mailman (input) for mailman id 479970; Tue, 17 Jan 2023 23:16:50 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pHvCE-0005Pl-2Q for xen-devel@lists.xenproject.org; Tue, 17 Jan 2023 23:16:50 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pHvCD-0006kv-J6; Tue, 17 Jan 2023 23:16:49 +0000 Received: from gw1.octic.net ([88.97.20.152] helo=[10.0.1.102]) by xenbits.xenproject.org with esmtpsa (TLS1.3:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1pHvCD-0002xt-DP; Tue, 17 Jan 2023 23:16:49 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:Content-Type:In-Reply-To:From: References:Cc:To:Subject:MIME-Version:Date:Message-ID; bh=y4y2F/N7XxRFF1gg8TL5NCZE3HwrkgzPAbqv97unP2w=; b=sQey8TmkcwlMBjDh8HdI7kZfKE +9MRyNiObG/gWX8c7mAsd1i7pdOopSqqc3HnEw6VF3C8qT5KW7YAhgzrT3hrLkg+qVVC39TsOghkp V6ERGkQdJ/i0nIimG+9hHmWmeZMr5uhjcxiRS9D1s8LsHX4jGhMkpZ9E2zyRL38tI4Mo=; Message-ID: <759544c9-7783-c61d-75bd-0a9dab364be2@xen.org> Date: Tue, 17 Jan 2023 23:16:47 +0000 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.6.1 Subject: Re: [PATCH v2 03/40] xen/arm: adjust Xen TLB helpers for Armv8-R64 PMSA To: Penny Zheng , xen-devel@lists.xenproject.org Cc: wei.chen@arm.com, Stefano Stabellini , Bertrand Marquis , Volodymyr Babchuk References: <20230113052914.3845596-1-Penny.Zheng@arm.com> <20230113052914.3845596-4-Penny.Zheng@arm.com> From: Julien Grall In-Reply-To: <20230113052914.3845596-4-Penny.Zheng@arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi, On 13/01/2023 05:28, Penny Zheng wrote: > From: Wei Chen > > From Arm ARM Supplement of Armv8-R AArch64 (DDI 0600A) [1], > section D1.6.2 TLB maintenance instructions, we know that > Armv8-R AArch64 permits an implementation to cache stage 1 > VMSAv8-64 and stage 2 PMSAv8-64 attributes as a common entry > for the Secure EL1&0 translation regime. But for Xen itself, > it's running with stage 1 PMSAv8-64 on Armv8-R AArch64. The > EL2 MPU updates for stage 1 PMSAv8-64 will not be cached in > TLB entries. So we don't need any TLB invalidation for Xen > itself in EL2. So I understand the theory here. But I would expect that none of the common code will call any of those helpers. Therefore the #ifdef should be unnecessary. Can you clarify if my understanding is correct? Cheers, -- Julien Grall