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[91.12.101.171]) by smtp.gmail.com with ESMTPSA id g11sm404996edt.85.2021.05.12.11.10.26 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 12 May 2021 11:10:26 -0700 (PDT) Subject: Re: [PATCH 28/72] softfloat: Move return_nan to softfloat-parts.c.inc To: Richard Henderson , qemu-devel@nongnu.org References: <20210508014802.892561-1-richard.henderson@linaro.org> <20210508014802.892561-29-richard.henderson@linaro.org> From: David Hildenbrand Organization: Red Hat Message-ID: <760af95e-5924-92ea-fa7c-40e3eeda8b3f@redhat.com> Date: Wed, 12 May 2021 20:10:25 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: <20210508014802.892561-29-richard.henderson@linaro.org> Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=david@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=216.205.24.124; envelope-from=david@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -34 X-Spam_score: -3.5 X-Spam_bar: --- X-Spam_report: (-3.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.7, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 08.05.21 03:47, Richard Henderson wrote: > At the same time, convert to pointers, rename to return_nan$N > and define a macro for return_nan using QEMU_GENERIC. > > Signed-off-by: Richard Henderson > --- > fpu/softfloat.c | 45 ++++++++++++++++++++++----------------- > fpu/softfloat-parts.c.inc | 37 ++++++++++++++++++++++++++++++++ > 2 files changed, 62 insertions(+), 20 deletions(-) > create mode 100644 fpu/softfloat-parts.c.inc > > diff --git a/fpu/softfloat.c b/fpu/softfloat.c > index 6d5392aeab..5b26696078 100644 > --- a/fpu/softfloat.c > +++ b/fpu/softfloat.c > @@ -708,6 +708,10 @@ static float128 float128_pack_raw(const FloatParts128 *p) > #define parts_default_nan(P, S) PARTS_GENERIC_64_128(default_nan, P)(P, S) > #define parts_silence_nan(P, S) PARTS_GENERIC_64_128(silence_nan, P)(P, S) > > +static void parts64_return_nan(FloatParts64 *a, float_status *s); > +static void parts128_return_nan(FloatParts128 *a, float_status *s); > + > +#define parts_return_nan(P, S) PARTS_GENERIC_64_128(return_nan, P)(P, S) > > /* > * Helper functions for softfloat-parts.c.inc, per-size operations. > @@ -914,22 +918,6 @@ static FloatParts64 round_canonical(FloatParts64 p, float_status *s, > return p; > } > > -static FloatParts64 return_nan(FloatParts64 a, float_status *s) > -{ > - g_assert(is_nan(a.cls)); > - if (is_snan(a.cls)) { > - float_raise(float_flag_invalid, s); > - if (!s->default_nan_mode) { > - parts_silence_nan(&a, s); > - return a; > - } > - } else if (!s->default_nan_mode) { > - return a; > - } > - parts_default_nan(&a, s); > - return a; > -} > - > static FloatParts64 pick_nan(FloatParts64 a, FloatParts64 b, float_status *s) > { > if (is_snan(a.cls) || is_snan(b.cls)) { > @@ -991,6 +979,21 @@ static FloatParts64 pick_nan_muladd(FloatParts64 a, FloatParts64 b, FloatParts64 > return a; > } > > +#define partsN(NAME) parts64_##NAME > +#define FloatPartsN FloatParts64 > + > +#include "softfloat-parts.c.inc" > + > +#undef partsN > +#undef FloatPartsN > +#define partsN(NAME) parts128_##NAME > +#define FloatPartsN FloatParts128 > + > +#include "softfloat-parts.c.inc" > + > +#undef partsN > +#undef FloatPartsN > + > /* > * Pack/unpack routines with a specific FloatFmt. > */ > @@ -2065,7 +2068,7 @@ static FloatParts64 float_to_float(FloatParts64 a, const FloatFmt *dstf, > break; > } > } else if (is_nan(a.cls)) { > - return return_nan(a, s); > + parts_return_nan(&a, s); > } > return a; > } > @@ -2194,7 +2197,8 @@ static FloatParts64 round_to_int(FloatParts64 a, FloatRoundMode rmode, > switch (a.cls) { > case float_class_qnan: > case float_class_snan: > - return return_nan(a, s); > + parts_return_nan(&a, s); > + break; > > case float_class_zero: > case float_class_inf: > @@ -3590,7 +3594,7 @@ FloatRelation bfloat16_compare_quiet(bfloat16 a, bfloat16 b, float_status *s) > static FloatParts64 scalbn_decomposed(FloatParts64 a, int n, float_status *s) > { > if (unlikely(is_nan(a.cls))) { > - return return_nan(a, s); > + parts_return_nan(&a, s); > } > if (a.cls == float_class_normal) { > /* The largest float type (even though not supported by FloatParts64) > @@ -3658,7 +3662,8 @@ static FloatParts64 sqrt_float(FloatParts64 a, float_status *s, const FloatFmt * > int bit, last_bit; > > if (is_nan(a.cls)) { > - return return_nan(a, s); > + parts_return_nan(&a, s); > + return a; > } > if (a.cls == float_class_zero) { > return a; /* sqrt(+-0) = +-0 */ > diff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc > new file mode 100644 > index 0000000000..2a3075d6fe > --- /dev/null > +++ b/fpu/softfloat-parts.c.inc > @@ -0,0 +1,37 @@ > +/* > + * QEMU float support > + * > + * The code in this source file is derived from release 2a of the SoftFloat > + * IEC/IEEE Floating-point Arithmetic Package. Those parts of the code (and > + * some later contributions) are provided under that license, as detailed below. > + * It has subsequently been modified by contributors to the QEMU Project, > + * so some portions are provided under: > + * the SoftFloat-2a license > + * the BSD license > + * GPL-v2-or-later > + * > + * Any future contributions to this file after December 1st 2014 will be > + * taken to be licensed under the Softfloat-2a license unless specifically > + * indicated otherwise. > + */ > + > +static void partsN(return_nan)(FloatPartsN *a, float_status *s) > +{ > + switch (a->cls) { > + case float_class_snan: > + float_raise(float_flag_invalid, s); > + if (s->default_nan_mode) { > + parts_default_nan(a, s); > + } else { > + parts_silence_nan(a, s); > + } > + break; > + case float_class_qnan: > + if (s->default_nan_mode) { > + parts_default_nan(a, s); > + } > + break; > + default: > + g_assert_not_reached(); > + } > +} > Reviewed-by: David Hildenbrand -- Thanks, David / dhildenb