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From: Sean Anderson <sean.anderson@seco.com>
To: u-boot@lists.denx.de, Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@oss.nxp.com>,
	Fabio Estevam <festevam@gmail.com>,
	"NXP i.MX U-Boot Team" <uboot-imx@nxp.com>
Subject: Re: [PATCH] imx: spl: Use FIELD_GET for bitfield access
Date: Thu, 22 Jul 2021 14:40:57 -0400	[thread overview]
Message-ID: <766e2c89-dc30-6613-a666-e7bd84ef7497@seco.com> (raw)
In-Reply-To: <20210331170949.2096645-1-sean.anderson@seco.com>

ping?

On 3/31/21 1:09 PM, Sean Anderson wrote:
> This macro clarifies accesses, and eliminates the need to have a
> separate shift define.
> 
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> ---
> 
>   arch/arm/include/asm/mach-imx/sys_proto.h | 5 +----
>   arch/arm/mach-imx/spl.c                   | 8 ++++----
>   2 files changed, 5 insertions(+), 8 deletions(-)
> 
> diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h
> index 43eae6d796..796c0f8b52 100644
> --- a/arch/arm/include/asm/mach-imx/sys_proto.h
> +++ b/arch/arm/include/asm/mach-imx/sys_proto.h
> @@ -78,12 +78,9 @@ struct bd_info;
>   #define IMX6_SRC_GPR10_BMODE			BIT(28)
>   #define IMX6_SRC_GPR10_PERSIST_SECONDARY_BOOT	BIT(30)
>   
> -#define IMX6_BMODE_MASK			GENMASK(7, 0)
> -#define	IMX6_BMODE_SHIFT		4
> +#define IMX6_BMODE_MASK			GENMASK(7, 4)
>   #define IMX6_BMODE_EMI_MASK		BIT(3)
> -#define IMX6_BMODE_EMI_SHIFT		3
>   #define IMX6_BMODE_SERIAL_ROM_MASK	GENMASK(26, 24)
> -#define IMX6_BMODE_SERIAL_ROM_SHIFT	24
>   
>   enum imx6_bmode_serial_rom {
>   	IMX6_BMODE_ECSPI1,
> diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
> index 36033d611c..2f3c1afbb9 100644
> --- a/arch/arm/mach-imx/spl.c
> +++ b/arch/arm/mach-imx/spl.c
> @@ -18,6 +18,7 @@
>   #include <spl.h>
>   #include <asm/mach-imx/hab.h>
>   #include <asm/mach-imx/boot_mode.h>
> +#include <linux/bitfield.h>
>   #include <g_dnl.h>
>   #include <linux/libfdt.h>
>   
> @@ -55,11 +56,11 @@ u32 spl_boot_device(void)
>   		return BOOT_DEVICE_BOARD;
>   
>   	/* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */
> -	switch ((reg & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) {
> +	switch (FIELD_GET(IMX6_BMODE_MASK, reg)) {
>   	 /* EIM: See 8.5.1, Table 8-9 */
>   	case IMX6_BMODE_EMI:
>   		/* BOOT_CFG1[3]: NOR/OneNAND Selection */
> -		switch ((reg & IMX6_BMODE_EMI_MASK) >> IMX6_BMODE_EMI_SHIFT) {
> +		switch (FIELD_GET(IMX6_BMODE_EMI_MASK, reg)) {
>   		case IMX6_BMODE_ONENAND:
>   			return BOOT_DEVICE_ONENAND;
>   		case IMX6_BMODE_NOR:
> @@ -77,8 +78,7 @@ u32 spl_boot_device(void)
>   	/* Serial ROM: See 8.5.5.1, Table 8-22 */
>   	case IMX6_BMODE_SERIAL_ROM:
>   		/* BOOT_CFG4[2:0] */
> -		switch ((reg & IMX6_BMODE_SERIAL_ROM_MASK) >>
> -			IMX6_BMODE_SERIAL_ROM_SHIFT) {
> +		switch (FIELD_GET(IMX6_BMODE_SERIAL_ROM_MASK, reg)) {
>   		case IMX6_BMODE_ECSPI1:
>   		case IMX6_BMODE_ECSPI2:
>   		case IMX6_BMODE_ECSPI3:
> 

  reply	other threads:[~2021-07-22 18:41 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-31 17:09 [PATCH] imx: spl: Use FIELD_GET for bitfield access Sean Anderson
2021-07-22 18:40 ` Sean Anderson [this message]
2021-07-22 18:44 ` Fabio Estevam
2021-10-28 19:36   ` Sean Anderson

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