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From: "Konduru, Chandra" <chandra.konduru@intel.com>
To: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>,
	"Vetter, Daniel" <daniel.vetter@intel.com>,
	"Lespiau, Damien" <damien.lespiau@intel.com>,
	"Syrjala, Ville" <ville.syrjala@intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 00/11] Skylake display NV12 feature addition
Date: Tue, 19 May 2015 23:21:50 +0000	[thread overview]
Message-ID: <76A9B330A4D78C4D99CB292C4CC06C0E36FE667F@fmsmsx101.amr.corp.intel.com> (raw)
In-Reply-To: <5559C233.80104@linux.intel.com>



> -----Original Message-----
> From: Tvrtko Ursulin [mailto:tvrtko.ursulin@linux.intel.com]
> Sent: Monday, May 18, 2015 3:43 AM
> To: Konduru, Chandra; Vetter, Daniel; Lespiau, Damien; Syrjala, Ville
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 00/11] Skylake display NV12 feature addition
> 
> 
> Hi,
> 
> On 05/18/2015 06:24 AM, Konduru, Chandra wrote:
> >> -----Original Message-----
> >> From: Tvrtko Ursulin [mailto:tvrtko.ursulin@linux.intel.com]
> >> Sent: Thursday, May 14, 2015 5:47 AM
> >> To: Konduru, Chandra; Vetter, Daniel; Lespiau, Damien; Syrjala, Ville
> >> Cc: intel-gfx@lists.freedesktop.org
> >> Subject: Re: [Intel-gfx] [PATCH 00/11] Skylake display NV12 feature
> >> addition
> >>
> >>
> >> On 05/14/2015 06:13 AM, Konduru, Chandra wrote:
> >>> Hi,
> >>> I have seen review comments from you and addressed/responded to them.
> >>> Can you please give R-b tag?
> >>
> >> What about that WARN_ON(fb->pixel_format == DRM_FORMAT_NV12) I am
> >> hitting (and subsequent hard hang)? Were you able to repro that?
> >>
> >> I did rebase your series on latest nightly but it was very trivial if
> >> anything so I don't think I did something wrong there.
> >
> > I was able to reproduce the issue and found the root-cause.
> > The required steps to reproduce this issue requires NV12 as primary
> > plane format via drmModeCrtcSetConfig() and the way you modified
> > kms_rotation_crc is just doing that. In crtc set config flow the way
> > atomic commit planes called without atomic commit call. So, it is missing
> setupscalers required for NV12.
> > And the WARN_ON I added is catching this scenario.
> >
> > Though this may be not common, it requires proper handling in i915.
> > I just send combined NV12 patch series for 0/180 and 90/270 including
> > addressing this issue.
> > Can you please check at your end with updated series?
> >
> > By the way, you need latest drm-intel-nightly, then apply your GEM
> > remapping for NV12 patches (2 to 7 of 8, 8th not required. And 1st one
> > is already merged), then apply my series (12 of 12).
> 
> Warn is gone but my box still locks up hard.
Good.
> 
> I can even reproduce the lockup by running nv12-plane-linear subtest from
> kms_nv12, where it happens perhaps on the second run. May be more easily
> triggerable with drm.debug=0 - but I am not so confident about that.

I have been testing on two boards, and on one board (A step), issue never happens
i.e., no lockups. On the other board (C step), issue happens. I tried chicken bit 
workarounds for C, but still seeing issue. Debugging what is causing lockup.

On another note, when I tested earlier with 400rc3 kernel, I didn't see these lockups
but after moving to 410rc2 started seeing them. So combination of NV12 and
whatever happened in kernel upgrade is causing lockup (at least that' how it appears
now). And this only happens on board (C) not on (A).

> 
> And also with nv12-plane-linear I see FIFO underruns so perhaps wm
> programming is not fully OK for NV12?
Looking at wm programming to rule out that is the case.
> 
> Regards,
> 
> Tvrtko
_______________________________________________
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      reply	other threads:[~2015-05-19 23:21 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-01  3:43 [PATCH 00/11] Skylake display NV12 feature addition Chandra Konduru
2015-05-01  3:43 ` [PATCH 01/11] drm/i915: Add register definitions for NV12 support Chandra Konduru
2015-05-01  3:43 ` [PATCH 02/11] drm/i915: Set scaler mode for NV12 Chandra Konduru
2015-05-01  3:43 ` [PATCH 03/11] drm/i915: Stage scaler request for NV12 as src format Chandra Konduru
2015-05-01  3:43 ` [PATCH 04/11] drm/i915: Update format_is_yuv() to include NV12 Chandra Konduru
2015-05-01  3:43 ` [PATCH 05/11] drm/i915: Upscale scaler max scale for NV12 Chandra Konduru
2015-05-01  3:43 ` [PATCH 06/11] drm/i915: Add NV12 as supported format for primary plane Chandra Konduru
2015-05-07  6:56   ` Daniel Vetter
2015-05-08  2:29     ` Konduru, Chandra
2015-05-08  7:13       ` Daniel Vetter
2015-05-01  3:43 ` [PATCH 07/11] drm/i915: Add NV12 as supported format for sprite plane Chandra Konduru
2015-05-01  3:43 ` [PATCH 08/11] drm/i915: Add NV12 support to intel_framebuffer_init Chandra Konduru
2015-05-11 10:54   ` Tvrtko Ursulin
2015-05-11 11:08     ` Ville Syrjälä
2015-05-01  3:43 ` [PATCH 09/11] drm/i915: Update compute_baseline_bpp for NV12 Chandra Konduru
2015-05-07  6:59   ` Daniel Vetter
2015-05-07 16:01     ` Konduru, Chandra
2015-05-01  3:43 ` [PATCH 10/11] drm/i915: Add NV12 to primary plane programming Chandra Konduru
2015-05-08 20:40   ` Chandra Konduru
2015-05-11 10:24     ` Tvrtko Ursulin
2015-05-01  3:43 ` [PATCH 11/11] drm/i915: Add NV12 to sprite " Chandra Konduru
2015-05-14  5:13 ` [PATCH 00/11] Skylake display NV12 feature addition Konduru, Chandra
2015-05-14 12:46   ` Tvrtko Ursulin
2015-05-18  5:24     ` Konduru, Chandra
2015-05-18 10:42       ` Tvrtko Ursulin
2015-05-19 23:21         ` Konduru, Chandra [this message]

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