From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39192) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bkDDg-0004Nh-QM for qemu-devel@nongnu.org; Wed, 14 Sep 2016 12:39:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bkDDa-0004ji-Rt for qemu-devel@nongnu.org; Wed, 14 Sep 2016 12:39:31 -0400 Received: from mail-yw0-f169.google.com ([209.85.161.169]:36012) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bkDDa-0004eV-Nw for qemu-devel@nongnu.org; Wed, 14 Sep 2016 12:39:26 -0400 Received: by mail-yw0-f169.google.com with SMTP id t67so26338646ywg.3 for ; Wed, 14 Sep 2016 09:39:05 -0700 (PDT) Sender: Richard Henderson References: <1472935202-3342-1-git-send-email-rth@twiddle.net> <1472935202-3342-28-git-send-email-rth@twiddle.net> <87oa3qii3c.fsf@linaro.org> From: Richard Henderson Message-ID: <774df982-5495-cd18-fb7c-16df88903842@twiddle.net> Date: Wed, 14 Sep 2016 09:38:02 -0700 MIME-Version: 1.0 In-Reply-To: <87oa3qii3c.fsf@linaro.org> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH v3 27/34] target-arm: emulate LL/SC using cmpxchg helpers List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?Q?Alex_Benn=c3=a9e?= Cc: "Emilio G. Cota" , qemu-devel@nongnu.org On 09/14/2016 09:03 AM, Alex Bennée wrote: >> > -/* Load/Store exclusive instructions are implemented by remembering >> > - the value/address loaded, and seeing if these are the same >> > - when the store is performed. This should be sufficient to implement >> > - the architecturally mandated semantics, and avoids having to monitor >> > - regular stores. >> > - >> > - In system emulation mode only one CPU will be running at once, so >> > - this sequence is effectively atomic. In user emulation mode we >> > - throw an exception and handle the atomic operation elsewhere. */ > At least half of this comment is still relevant although it could be > tweaked to mention that we use an atomic cmpxchg for the store that will > fail if exlusive_val doesn't match the current state. > Added back /* Load/Store exclusive instructions are implemented by remembering the value/address loaded, and seeing if these are the same when the store is performed. This should be sufficient to implement the architecturally mandated semantics, and avoids having to monitor regular stores. The compare vs the remembered value is done during the cmpxchg operation, but we must compare the addresses manually. */ r~