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From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 2/5] dma-fence: Serialise signal enabling (dma_fence_enable_sw_signaling)
Date: Fri, 4 Oct 2019 09:31:39 +0100	[thread overview]
Message-ID: <77665d18-fdea-a49d-c790-e8936bb462c4@linux.intel.com> (raw)
In-Reply-To: <20191003210100.22250-2-chris@chris-wilson.co.uk>


On 03/10/2019 22:00, Chris Wilson wrote:
> Make dma_fence_enable_sw_signaling() behave like its
> dma_fence_add_callback() and dma_fence_default_wait() counterparts and
> perform the test to enable signaling under the fence->lock, along with
> the action to do so. This ensure that should an implementation be trying
> to flush the cb_list (by signaling) on retirement before freeing the
> fence, it can do so in a race-free manner.
> 
> See also 0fc89b6802ba ("dma-fence: Simply wrap dma_fence_signal_locked
> with dma_fence_signal").
> 
> v2: Refactor all 3 enable_signaling paths to use a common function.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>   drivers/dma-buf/dma-fence.c | 78 +++++++++++++++++--------------------
>   1 file changed, 35 insertions(+), 43 deletions(-)
> 
> diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c
> index 2c136aee3e79..b58528c1cc9d 100644
> --- a/drivers/dma-buf/dma-fence.c
> +++ b/drivers/dma-buf/dma-fence.c
> @@ -273,6 +273,30 @@ void dma_fence_free(struct dma_fence *fence)
>   }
>   EXPORT_SYMBOL(dma_fence_free);
>   
> +static bool __dma_fence_enable_signaling(struct dma_fence *fence)
> +{
> +	bool was_set;
> +
> +	lockdep_assert_held(fence->lock);
> +
> +	was_set = test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT,
> +				   &fence->flags);
> +
> +	if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
> +		return false;
> +
> +	if (!was_set && fence->ops->enable_signaling) {
> +		if (!fence->ops->enable_signaling(fence)) {
> +			dma_fence_signal_locked(fence);
> +			return false;
> +		}
> +
> +		trace_dma_fence_enable_signal(fence);

Tracepoint used to come before the enable_signaling call so probably 
best to keep it like that.

> +	}
> +
> +	return true;
> +}
> +
>   /**
>    * dma_fence_enable_sw_signaling - enable signaling on fence
>    * @fence: the fence to enable
> @@ -285,19 +309,12 @@ void dma_fence_enable_sw_signaling(struct dma_fence *fence)
>   {
>   	unsigned long flags;
>   
> -	if (!test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT,
> -			      &fence->flags) &&
> -	    !test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags) &&
> -	    fence->ops->enable_signaling) {
> -		trace_dma_fence_enable_signal(fence);
> -
> -		spin_lock_irqsave(fence->lock, flags);
> -
> -		if (!fence->ops->enable_signaling(fence))
> -			dma_fence_signal_locked(fence);
> +	if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
> +		return;
>   
> -		spin_unlock_irqrestore(fence->lock, flags);
> -	}
> +	spin_lock_irqsave(fence->lock, flags);
> +	__dma_fence_enable_signaling(fence);
> +	spin_unlock_irqrestore(fence->lock, flags);
>   }
>   EXPORT_SYMBOL(dma_fence_enable_sw_signaling);
>   
> @@ -331,7 +348,6 @@ int dma_fence_add_callback(struct dma_fence *fence, struct dma_fence_cb *cb,
>   {
>   	unsigned long flags;
>   	int ret = 0;
> -	bool was_set;
>   
>   	if (WARN_ON(!fence || !func))
>   		return -EINVAL;
> @@ -343,25 +359,14 @@ int dma_fence_add_callback(struct dma_fence *fence, struct dma_fence_cb *cb,
>   
>   	spin_lock_irqsave(fence->lock, flags);
>   
> -	was_set = test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT,
> -				   &fence->flags);
> -
> -	if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
> -		ret = -ENOENT;
> -	else if (!was_set && fence->ops->enable_signaling) {
> -		trace_dma_fence_enable_signal(fence);
> -
> -		if (!fence->ops->enable_signaling(fence)) {
> -			dma_fence_signal_locked(fence);
> -			ret = -ENOENT;
> -		}
> -	}
> -
> -	if (!ret) {
> +	if (__dma_fence_enable_signaling(fence)) {
>   		cb->func = func;
>   		list_add_tail(&cb->node, &fence->cb_list);
> -	} else
> +	} else {
>   		INIT_LIST_HEAD(&cb->node);
> +		ret = -ENOENT;
> +	}
> +
>   	spin_unlock_irqrestore(fence->lock, flags);
>   
>   	return ret;
> @@ -461,7 +466,6 @@ dma_fence_default_wait(struct dma_fence *fence, bool intr, signed long timeout)
>   	struct default_wait_cb cb;
>   	unsigned long flags;
>   	signed long ret = timeout ? timeout : 1;
> -	bool was_set;
>   
>   	if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
>   		return ret;
> @@ -473,21 +477,9 @@ dma_fence_default_wait(struct dma_fence *fence, bool intr, signed long timeout)
>   		goto out;
>   	}
>   
> -	was_set = test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT,
> -				   &fence->flags);
> -
> -	if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
> +	if (!__dma_fence_enable_signaling(fence))
>   		goto out;
>   
> -	if (!was_set && fence->ops->enable_signaling) {
> -		trace_dma_fence_enable_signal(fence);
> -
> -		if (!fence->ops->enable_signaling(fence)) {
> -			dma_fence_signal_locked(fence);
> -			goto out;
> -		}
> -	}
> -
>   	if (!timeout) {
>   		ret = 0;
>   		goto out;
> 

The rest looks correct to me.

Regards,

Tvrtko
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  reply	other threads:[~2019-10-04  8:31 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-03 21:00 [PATCH 1/5] drm/i915/execlists: Skip redundant resubmission Chris Wilson
2019-10-03 21:00 ` [PATCH 2/5] dma-fence: Serialise signal enabling (dma_fence_enable_sw_signaling) Chris Wilson
2019-10-04  8:31   ` Tvrtko Ursulin [this message]
2019-10-04 10:11   ` [PATCH] " Chris Wilson
2019-10-04 10:18     ` Tvrtko Ursulin
2019-10-03 21:00 ` [PATCH 3/5] drm/mm: Use helpers for drm_mm_node booleans Chris Wilson
2019-10-04  8:33   ` Tvrtko Ursulin
2019-10-03 21:00 ` [PATCH 4/5] drm/mm: Convert drm_mm_node booleans to bitops Chris Wilson
2019-10-04  8:34   ` Tvrtko Ursulin
2019-10-03 21:01 ` [PATCH 5/5] drm/mm: Use clear_bit_unlock() for releasing the drm_mm_node() Chris Wilson
2019-10-04  9:15   ` Tvrtko Ursulin
2019-10-04 11:07     ` Chris Wilson
2019-10-04 11:17       ` Chris Wilson
2019-10-04 12:01         ` [Intel-gfx] " Tvrtko Ursulin
2019-10-09 15:59           ` Daniel Vetter
2019-10-03 22:38 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm/i915/execlists: Skip redundant resubmission Patchwork
2019-10-03 22:58 ` ✓ Fi.CI.BAT: success " Patchwork
2019-10-04 10:08 ` [PATCH 1/5] " Tvrtko Ursulin
2019-10-04 10:25 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm/i915/execlists: Skip redundant resubmission (rev2) Patchwork
2019-10-04 11:36 ` ✓ Fi.CI.BAT: success " Patchwork
2019-10-04 11:53 ` ✗ Fi.CI.IGT: failure for series starting with [1/5] drm/i915/execlists: Skip redundant resubmission Patchwork
2019-10-04 17:01 ` ✗ Fi.CI.IGT: failure for series starting with [1/5] drm/i915/execlists: Skip redundant resubmission (rev2) Patchwork

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