From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, HK_RANDOM_FROM,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B42A6C433DF for ; Tue, 9 Jun 2020 06:59:32 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 86E222074B for ; Tue, 9 Jun 2020 06:59:32 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 86E222074B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2D0866E9EC; Tue, 9 Jun 2020 06:59:32 +0000 (UTC) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id 766E46E9EC for ; Tue, 9 Jun 2020 06:59:31 +0000 (UTC) IronPort-SDR: jJa8dn/wFQGIEbspiTqzcImOex9whe+61WJFTgok1TxdK2FsJPp5DYbszqUeFC5na5CwNBFbx+ K/UawxJw6WkQ== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jun 2020 23:59:31 -0700 IronPort-SDR: cR67WNFE5Vcp/ZyER8R55OY4G2Yx1kJopJznmYkSN3I0ZuKrsEBgOL4LeCCLSjRP0b8mHGJcJL +T16S69bDJFw== X-IronPort-AV: E=Sophos;i="5.73,490,1583222400"; d="scan'208";a="447023014" Received: from unknown (HELO [10.249.32.140]) ([10.249.32.140]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jun 2020 23:59:30 -0700 To: Chris Wilson , intel-gfx@lists.freedesktop.org References: <20200607222108.14401-1-chris@chris-wilson.co.uk> <9f995ee6-5f93-088d-47d6-5431076de596@linux.intel.com> <159160880517.15126.3134918011284478228@build.alporthouse.com> From: Tvrtko Ursulin Organization: Intel Corporation UK Plc Message-ID: <77acd2e3-86cc-7c78-22a0-8d8263510aa2@linux.intel.com> Date: Tue, 9 Jun 2020 07:59:27 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 MIME-Version: 1.0 In-Reply-To: <159160880517.15126.3134918011284478228@build.alporthouse.com> Content-Language: en-US Subject: Re: [Intel-gfx] [PATCH 01/28] drm/i915: Adjust the sentinel assert to match implementation X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" 666 On 08/06/2020 10:33, Chris Wilson wrote: > Quoting Tvrtko Ursulin (2020-06-08 08:44:01) >> >> On 07/06/2020 23:20, Chris Wilson wrote: >>> From: Tvrtko Ursulin >>> >>> Sentinels are supposed to be last reqeusts in the elsp queue, not the >>> only one, so adjust the assert accordingly. >>> >>> Signed-off-by: Tvrtko Ursulin >>> --- >>> drivers/gpu/drm/i915/gt/intel_lrc.c | 14 +++----------- >>> 1 file changed, 3 insertions(+), 11 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c >>> index d55a5e0466e5..db8a170b0e5c 100644 >>> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c >>> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c >>> @@ -1635,9 +1635,9 @@ assert_pending_valid(const struct intel_engine_execlists *execlists, >>> ccid = ce->lrc.ccid; >>> >>> /* >>> - * Sentinels are supposed to be lonely so they flush the >>> - * current exection off the HW. Check that they are the >>> - * only request in the pending submission. >>> + * Sentinels are supposed to be the last request so they flush >>> + * the current exection off the HW. Check that they are the only >>> + * request in the pending submission. >>> */ >>> if (sentinel) { >>> GEM_TRACE_ERR("%s: context:%llx after sentinel in pending[%zd]\n", >>> @@ -1646,15 +1646,7 @@ assert_pending_valid(const struct intel_engine_execlists *execlists, >>> port - execlists->pending); >>> return false; >>> } >>> - >>> sentinel = i915_request_has_sentinel(rq); >> >> FWIW I was changing it to "sentinel |= ..." so it keeps working if we >> decide to use more than 2 elsp ports on Icelake one day. > > But it will always fail on the next port... I don't follow. Sentinel has to be last so if it fails on the next port it is correct to do so, no? Regards, Tvrtko _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx