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[142.114.143.47]) by smtp.gmail.com with ESMTPSA id l190sm4909548qkc.120.2021.07.06.05.46.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Jul 2021 05:46:43 -0700 (PDT) Message-ID: <781518f186454dc31c97b34c088f89577fbb66ab.camel@linaro.org> Subject: Re: [PATCH v5 04/10] hw/intc: GICv3 ITS Command processing From: shashi.mallela@linaro.org To: Peter Maydell Date: Tue, 06 Jul 2021 08:46:42 -0400 In-Reply-To: References: <20210630153156.9421-1-shashi.mallela@linaro.org> <20210630153156.9421-5-shashi.mallela@linaro.org> <287eb50c0b99a3daec986ec29ede33cb2bdfd025.camel@linaro.org> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5 (3.28.5-16.el8) Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::f2c; envelope-from=shashi.mallela@linaro.org; helo=mail-qv1-xf2c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Michael S. Tsirkin" , Radoslaw Biernacki , QEMU Developers , qemu-arm , Igor Mammedov , Leif Lindholm Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Tue, 2021-07-06 at 10:19 +0100, Peter Maydell wrote: > On Tue, 6 Jul 2021 at 04:25, wrote: > > On Mon, 2021-07-05 at 20:47 -0400, shashi.mallela@linaro.org wrote: > > > On Mon, 2021-07-05 at 15:54 +0100, Peter Maydell wrote: > > > > I missed this the first time around, but I don't think this is > > > > right. > > > > Different CPUs could have different GICR_PROPBASER values, so > > > > checking > > > > against just one of them is wrong. The pseudocode only tests > > > > LPIOutOfRange() > > > > which is documented as testing "larger than GICD_TYPER.IDbits > > > > or > > > > not > > > > in > > > > the LPI range and not 1023". So I don't think we should be > > > > looking > > > > at the GICR_PROPBASER field here. > > > > > > > > More generally, "s->gicv3->cpu->something" is usually going to > > > > be > > > > wrong, because it is implicitly looking at CPU 0; often either > > > > there > > > > should be something else telling is which CPU to use (as in > > > > &s->gicv3->cpu[rdbase] where the CTE told us which > > > > redistributor), > > > > or we might need to operate on all CPUs/redistributors. The > > > > only > > > > exception is where we can guarantee that all the CPUs are the > > > > same > > > > (eg when looking at GICR_TYPER.PLPIS.) > > Please ignore my last comment. > > > > To address this scenario,i think the feasible option would be to > > call > > get_cte() to get the rdbase corresponding to icid value passed to > > mapti > > command.Since each icid is mapped to a rdbase(by virtue of calling > > MAPC > > command),if the collection table has a valid mapping for this icid > > we > > continue processing this MAPTI command using &s->gicv3->cpu[rdbase] > > applicable propbaser value to validate idbits, else return without > > further processing. > > But the pseudocode for MAPTI does not say anywhere that we should > be checking the pIntID against any CPU's GICR_PROPBASER field. > It is checked only by the checks in LPIOutOfRange(), which tests: > * is it larger than permitted by GICD_TYPER.IDbits > * is it not in the LPI range and not 1023 > > Checking whether the intID is too big and would cause us to index > off the end of the redistributor's configuration table should be done > later, only when the ITS actually sends the interrupt to a particular > redistributor, I think. > > (You can't rely on the guest having done the MAPC before the MAPTI; > and in any case the guest could choose to do a MAPC to a different > redistributor after it's done the MAPTI.) > > thanks > -- PMM We already have the "intID too big check" in place within the redistributor processing when ITS sends the interrupt trigger. "the LPI range and not 1023" is also handled in this function,but for validating "is it larger than permitted by GICD_TYPER.IDbits",the source of GICD_TYPER.IDbits is GICR_PROPBASER because we pick up min of GICR_PROPBASER.IDbits and GICD_TYPER.IDBits. If we are to not use gicr_propbaser,then are we good to just accept the intID value here since we are validating the same during interrupt processing?