From: Richard Henderson <richard.henderson@linaro.org>
To: matheus.ferst@eldorado.org.br, qemu-devel@nongnu.org,
qemu-ppc@nongnu.org
Cc: lucas.castro@eldorado.org.br, luis.pires@eldorado.org.br,
groug@kaod.org, david@gibson.dropbear.id.au
Subject: Re: [PATCH v2 16/34] target/ppc: Implement Vector Insert Word from GPR using Immediate insns
Date: Sat, 30 Oct 2021 15:27:18 -0700 [thread overview]
Message-ID: <78448d85-7ab9-dc26-dccf-20ae8872f40c@linaro.org> (raw)
In-Reply-To: <20211029202424.175401-17-matheus.ferst@eldorado.org.br>
On 10/29/21 1:24 PM, matheus.ferst@eldorado.org.br wrote:
> From: Matheus Ferst<matheus.ferst@eldorado.org.br>
>
> Implements the following PowerISA v3.1 instructions:
> vinsw: Vector Insert Word from GPR using immediate-specified index
> vinsd: Vector Insert Doubleword from GPR using immediate-specified
> index
>
> Signed-off-by: Matheus Ferst<matheus.ferst@eldorado.org.br>
> ---
> v2:
> - #ifdef TARGET_PPC64 removed from translation code
> - Comments about real hardware behavior
> ---
> target/ppc/insn32.decode | 6 +++++
> target/ppc/translate/vmx-impl.c.inc | 37 +++++++++++++++++++++++++++++
> 2 files changed, 43 insertions(+)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2021-10-30 22:28 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-29 20:23 [PATCH v2 00/34] PowerISA v3.1 instruction batch matheus.ferst
2021-10-29 20:23 ` [PATCH v2 01/34] target/ppc: introduce do_ea_calc matheus.ferst
2021-10-29 20:23 ` [PATCH v2 02/34] target/ppc: move resolve_PLS_D to translate.c matheus.ferst
2021-10-29 20:23 ` [PATCH v2 03/34] target/ppc: Move load and store floating point instructions to decodetree matheus.ferst
2021-11-09 13:43 ` Mark Cave-Ayland
2021-11-09 17:32 ` Matheus K. Ferst
2021-11-09 18:24 ` Mark Cave-Ayland
2021-10-29 20:23 ` [PATCH v2 04/34] target/ppc: Implement PLFS, PLFD, PSTFS and PSTFD instructions matheus.ferst
2021-10-29 20:23 ` [PATCH v2 05/34] target/ppc: Move LQ and STQ to decodetree matheus.ferst
2021-10-29 20:23 ` [PATCH v2 06/34] target/ppc: Implement PLQ and PSTQ matheus.ferst
2021-10-29 20:23 ` [PATCH v2 07/34] target/ppc: Implement cntlzdm matheus.ferst
2021-10-30 21:17 ` Richard Henderson
2021-11-01 0:16 ` David Gibson
2021-11-04 11:37 ` Matheus K. Ferst
2021-10-29 20:23 ` [PATCH v2 08/34] target/ppc: Implement cnttzdm matheus.ferst
2021-10-30 21:17 ` Richard Henderson
2021-10-29 20:23 ` [PATCH v2 09/34] target/ppc: Implement pdepd instruction matheus.ferst
2021-10-29 20:24 ` [PATCH v2 10/34] target/ppc: Implement pextd instruction matheus.ferst
2021-10-29 20:24 ` [PATCH v2 11/34] target/ppc: Move vcfuged to vmx-impl.c.inc matheus.ferst
2021-11-01 0:20 ` David Gibson
2021-10-29 20:24 ` [PATCH v2 12/34] target/ppc: Implement vclzdm/vctzdm instructions matheus.ferst
2021-10-30 21:34 ` Richard Henderson
2021-10-29 20:24 ` [PATCH v2 13/34] target/ppc: Implement vpdepd/vpextd instruction matheus.ferst
2021-10-29 20:24 ` [PATCH v2 14/34] target/ppc: Implement vsldbi/vsrdbi instructions matheus.ferst
2021-10-30 21:42 ` Richard Henderson
2021-10-29 20:24 ` [PATCH v2 15/34] target/ppc: Implement Vector Insert from GPR using GPR index insns matheus.ferst
2021-10-30 22:26 ` Richard Henderson
2021-10-29 20:24 ` [PATCH v2 16/34] target/ppc: Implement Vector Insert Word from GPR using Immediate insns matheus.ferst
2021-10-30 22:27 ` Richard Henderson [this message]
2021-10-29 20:24 ` [PATCH v2 17/34] target/ppc: Implement Vector Insert from VSR using GPR index insns matheus.ferst
2021-10-29 20:24 ` [PATCH v2 18/34] target/ppc: Move vinsertb/vinserth/vinsertw/vinsertd to decodetree matheus.ferst
2021-10-29 20:24 ` [PATCH v2 19/34] target/ppc: Implement Vector Extract Double to VSR using GPR index insns matheus.ferst
2021-10-30 22:29 ` Richard Henderson
2021-10-29 20:24 ` [PATCH v2 20/34] target/ppc: Introduce REQUIRE_VSX macro matheus.ferst
2021-10-29 20:24 ` [PATCH v2 21/34] target/ppc: receive high/low as argument in get/set_cpu_vsr matheus.ferst
2021-10-30 22:31 ` Richard Henderson
2021-10-29 20:24 ` [PATCH v2 22/34] target/ppc: moved stxv and lxv from legacy to decodtree matheus.ferst
2021-10-30 22:32 ` Richard Henderson
2021-10-29 20:24 ` [PATCH v2 23/34] target/ppc: moved stxvx and lxvx " matheus.ferst
2021-10-29 20:24 ` [PATCH v2 24/34] target/ppc: added the instructions LXVP and STXVP matheus.ferst
2021-10-30 23:13 ` Richard Henderson
2021-10-29 20:24 ` [PATCH v2 25/34] target/ppc: added the instructions LXVPX and STXVPX matheus.ferst
2021-10-29 20:24 ` [PATCH v2 26/34] target/ppc: added the instructions PLXV and PSTXV matheus.ferst
2021-10-29 20:24 ` [PATCH v2 27/34] target/ppc: added the instructions PLXVP and PSTXVP matheus.ferst
2021-10-29 20:24 ` [PATCH v2 28/34] target/ppc: moved XXSPLTW to using decodetree matheus.ferst
2021-10-29 20:24 ` [PATCH v2 29/34] target/ppc: moved XXSPLTIB " matheus.ferst
2021-10-29 20:24 ` [PATCH v2 30/34] target/ppc: implemented XXSPLTI32DX matheus.ferst
2021-10-30 23:27 ` Richard Henderson
2021-10-29 20:24 ` [PATCH v2 31/34] target/ppc: Implemented XXSPLTIW using decodetree matheus.ferst
2021-10-29 20:24 ` [PATCH v2 32/34] target/ppc: implemented XXSPLTIDP instruction matheus.ferst
2021-10-29 20:24 ` [PATCH v2 33/34] target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd instructions matheus.ferst
2021-10-29 20:24 ` [PATCH v2 34/34] target/ppc: Implement lxvkq instruction matheus.ferst
2021-11-01 0:13 ` [PATCH v2 00/34] PowerISA v3.1 instruction batch David Gibson
2021-11-01 0:22 ` David Gibson
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