From mboxrd@z Thu Jan  1 00:00:00 1970
From: "Wiles, Keith" <keith.wiles@intel.com>
Subject: Re: [PATCH v2] build: disable compiler AVX512F support
Date: Mon, 5 Nov 2018 14:06:39 +0000
Message-ID: <7879265D-9280-47ED-8987-A332C0A3DBF9@intel.com>
References: <20181023212318.43082-1-yskoh@mellanox.com>
 <20181102210348.28148-1-yskoh@mellanox.com>
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Cc: Thomas Monjalon <thomas@monjalon.net>, "Richardson, Bruce"
 <bruce.richardson@intel.com>, "Yigit, Ferruh" <ferruh.yigit@intel.com>,
 "dev@dpdk.org" <dev@dpdk.org>, Shahaf Shuler <shahafs@mellanox.com>,
 "Ananyev, Konstantin" <konstantin.ananyev@intel.com>, "Burakov, Anatoly"
 <anatoly.burakov@intel.com>, "stable@dpdk.org" <stable@dpdk.org>
To: Yongseok Koh <yskoh@mellanox.com>
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> On Nov 2, 2018, at 9:04 PM, Yongseok Koh <yskoh@mellanox.com> wrote:
>=20
> This is a workaround to prevent a crash, which might be caused by
> optimization of newer gcc (7.3.0) on Intel Skylake.

Should the code below not also test for the gcc version and the Sky Lake pr=
ocessor, maybe I am wrong but it seems it is turning AVX512 for all GCC bui=
lds

Also bug 97 seems a bit obscure reference, maybe you know the bug report, b=
ut more details would be good?
>=20
> Bugzilla ID: 97
>=20
> Cc: stable@dpdk.org
>=20
> Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
> ---
>=20
> v2:
> * disable the flag only in case of gcc
>=20
> config/x86/meson.build | 5 +++++
> mk/rte.cpuflags.mk     | 7 +++++++
> 2 files changed, 12 insertions(+)
>=20
> diff --git a/config/x86/meson.build b/config/x86/meson.build
> index 33efb5e547..8ddca0ea9f 100644
> --- a/config/x86/meson.build
> +++ b/config/x86/meson.build
> @@ -47,6 +47,11 @@ endif
> if cc.get_define('__AVX512F__', args: march_opt) !=3D ''
> 	dpdk_conf.set('RTE_MACHINE_CPUFLAG_AVX512F', 1)
> 	compile_time_cpuflags +=3D ['RTE_CPUFLAG_AVX512F']
> +else
> +# disable AVX512F support of gcc as a workaround for Bug 97
> +	if cc.get_id() =3D=3D 'gcc' and cc.has_argument('-mavx512f')
> +		machine_args +=3D '-mno-avx512f'
> +	endif
> endif
>=20
> dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
> diff --git a/mk/rte.cpuflags.mk b/mk/rte.cpuflags.mk
> index 43ed84155b..a8c26fb011 100644
> --- a/mk/rte.cpuflags.mk
> +++ b/mk/rte.cpuflags.mk
> @@ -68,6 +68,13 @@ endif
> ifneq ($(filter $(AUTO_CPUFLAGS),__AVX512F__),)
> ifeq ($(CONFIG_RTE_ENABLE_AVX512),y)
> CPUFLAGS +=3D AVX512F
> +else
> +# disable AVX512F support of gcc as a workaround for Bug 97
> +ifeq ($(CONFIG_RTE_TOOLCHAIN_GCC),y)
> +	ifeq ($(shell $(CC) --target-help | grep -q mavx512f && echo 1), 1)
> +		MACHINE_CFLAGS +=3D -mno-avx512f
> +	endif
> +endif
> endif
> endif
>=20
> --=20
> 2.11.0
>=20

Regards,
Keith