From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kumar Gala Date: Fri, 16 Sep 2011 09:57:56 -0500 Subject: [U-Boot] [PATCH] powerpc/85xx: refactor common P-Series CoreNet files for FSL boards In-Reply-To: <1314745472-20920-2-git-send-email-galak@kernel.crashing.org> References: <1314745472-20920-1-git-send-email-galak@kernel.crashing.org> <1314745472-20920-2-git-send-email-galak@kernel.crashing.org> Message-ID: <78DE0637-4252-4EC2-A8C1-BCCBD4E09E36@kernel.crashing.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Aug 30, 2011, at 6:04 PM, Kumar Gala wrote: > We currently support 4 SoC/Boards from the P-Series of QorIQ SoCs that > are based on the 'CoreNet' Architecture: P2041RDB, P3041DS, P4080DS, and > P5020DS. There is a significant amount of commonality shared between > these boards that we can refactor into common code: > > * Initial LAW setup > * Initial TLB setup > * PCI setup > > We start by moving the shared code between P3041DS, P4080DS, and P5020DS > into a common directory to be shared with other P-Series CoreNet boards. > > Signed-off-by: Kumar Gala > --- > board/freescale/common/Makefile | 13 +++++++- > board/freescale/common/p_corenet/Makefile | 31 ++++++++++++++++++++ > .../{corenet_ds => common/p_corenet}/law.c | 0 > .../{corenet_ds => common/p_corenet}/pci.c | 0 > .../{corenet_ds => common/p_corenet}/tlb.c | 0 > board/freescale/corenet_ds/Makefile | 3 -- > 6 files changed, 42 insertions(+), 5 deletions(-) > create mode 100644 board/freescale/common/p_corenet/Makefile > rename board/freescale/{corenet_ds => common/p_corenet}/law.c (100%) > rename board/freescale/{corenet_ds => common/p_corenet}/pci.c (100%) > rename board/freescale/{corenet_ds => common/p_corenet}/tlb.c (100%) applied to 85xx 'next' - k