* [v2, PATCH] net: stmmac: add support for hash table size 128/256 in dwmac4
@ 2019-05-14 3:00 ` Biao Huang
0 siblings, 0 replies; 21+ messages in thread
From: Biao Huang @ 2019-05-14 3:00 UTC (permalink / raw)
To: Jose Abreu, davem
Cc: Alexandre Torgue, jianguo.zhang, biao.huang, netdev,
linux-kernel, boon.leong.ong, yt.shen, linux-mediatek,
Maxime Coquelin, Matthias Brugger, Giuseppe Cavallaro,
linux-stm32, linux-arm-kernel
1. get hash table size in hw feature reigster, and add support
for taller hash table(128/256) in dwmac4.
2. only clear PR/HMC/PM bits of GMAC_PACKET_FILTER, to avoid
side effect to functions of other bits.
Signed-off-by: Biao Huang <biao.huang@mediatek.com>
---
drivers/net/ethernet/stmicro/stmmac/common.h | 7 +--
drivers/net/ethernet/stmicro/stmmac/dwmac4.h | 4 +-
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 50 ++++++++++++---------
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c | 1 +
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 4 ++
5 files changed, 40 insertions(+), 26 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/ethernet/stmicro/stmmac/common.h
index 272b9ca6..709dcec 100644
--- a/drivers/net/ethernet/stmicro/stmmac/common.h
+++ b/drivers/net/ethernet/stmicro/stmmac/common.h
@@ -335,6 +335,7 @@ struct dma_features {
/* 802.3az - Energy-Efficient Ethernet (EEE) */
unsigned int eee;
unsigned int av;
+ unsigned int hash_tb_sz;
unsigned int tsoen;
/* TX and RX csum */
unsigned int tx_coe;
@@ -427,9 +428,9 @@ struct mac_device_info {
struct mii_regs mii; /* MII register Addresses */
struct mac_link link;
void __iomem *pcsr; /* vpointer to device CSRs */
- int multicast_filter_bins;
- int unicast_filter_entries;
- int mcast_bits_log2;
+ unsigned int multicast_filter_bins;
+ unsigned int unicast_filter_entries;
+ unsigned int mcast_bits_log2;
unsigned int rx_csum;
unsigned int pcs;
unsigned int pmt;
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
index eb013d5..a5eb7df 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
@@ -18,8 +18,7 @@
/* MAC registers */
#define GMAC_CONFIG 0x00000000
#define GMAC_PACKET_FILTER 0x00000008
-#define GMAC_HASH_TAB_0_31 0x00000010
-#define GMAC_HASH_TAB_32_63 0x00000014
+#define GMAC_HASH_TAB(x) (0x10 + x * 4)
#define GMAC_RX_FLOW_CTRL 0x00000090
#define GMAC_QX_TX_FLOW_CTRL(x) (0x70 + x * 4)
#define GMAC_TXQ_PRTY_MAP0 0x98
@@ -181,6 +180,7 @@ enum power_event {
#define GMAC_HW_FEAT_MIISEL BIT(0)
/* MAC HW features1 bitmap */
+#define GMAC_HW_HASH_TB_SZ GENMASK(25, 24)
#define GMAC_HW_FEAT_AVSEL BIT(20)
#define GMAC_HW_TSOEN BIT(18)
#define GMAC_HW_TXFIFOSIZE GENMASK(10, 6)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
index 7e5d5db..1f682ec 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
@@ -401,41 +401,49 @@ static void dwmac4_set_filter(struct mac_device_info *hw,
struct net_device *dev)
{
void __iomem *ioaddr = (void __iomem *)dev->base_addr;
- unsigned int value = 0;
+ unsigned int value;
+ int numhashregs = (hw->multicast_filter_bins >> 5);
+ int mcbitslog2 = hw->mcast_bits_log2;
+ int i;
+
+ value = readl(ioaddr + GMAC_PACKET_FILTER);
+ value &= ~GMAC_PACKET_FILTER_PR;
+ value &= ~GMAC_PACKET_FILTER_HMC;
+ value &= ~GMAC_PACKET_FILTER_PM;
if (dev->flags & IFF_PROMISC) {
- value = GMAC_PACKET_FILTER_PR;
+ value |= GMAC_PACKET_FILTER_PR;
} else if ((dev->flags & IFF_ALLMULTI) ||
- (netdev_mc_count(dev) > HASH_TABLE_SIZE)) {
+ (netdev_mc_count(dev) > hw->multicast_filter_bins)) {
/* Pass all multi */
- value = GMAC_PACKET_FILTER_PM;
- /* Set the 64 bits of the HASH tab. To be updated if taller
- * hash table is used
- */
- writel(0xffffffff, ioaddr + GMAC_HASH_TAB_0_31);
- writel(0xffffffff, ioaddr + GMAC_HASH_TAB_32_63);
+ value |= GMAC_PACKET_FILTER_PM;
+ /* Set all the bits of the HASH tab */
+ for (i = 0; i < numhashregs; i++)
+ writel(0xffffffff, ioaddr + GMAC_HASH_TAB(i));
} else if (!netdev_mc_empty(dev)) {
- u32 mc_filter[2];
+ u32 mc_filter[8];
struct netdev_hw_addr *ha;
/* Hash filter for multicast */
- value = GMAC_PACKET_FILTER_HMC;
+ value |= GMAC_PACKET_FILTER_HMC;
memset(mc_filter, 0, sizeof(mc_filter));
netdev_for_each_mc_addr(ha, dev) {
- /* The upper 6 bits of the calculated CRC are used to
- * index the content of the Hash Table Reg 0 and 1.
+ /* The upper n bits of the calculated CRC are used to
+ * index the contents of the hash table. The number of
+ * bits used depends on the hardware configuration
+ * selected at core configuration time.
*/
- int bit_nr =
- (bitrev32(~crc32_le(~0, ha->addr, 6)) >> 26);
- /* The most significant bit determines the register
- * to use while the other 5 bits determines the bit
- * within the selected register
+ int bit_nr = bitrev32(~crc32_le(~0, ha->addr,
+ ETH_ALEN)) >> (32 - mcbitslog2);
+ /* The most significant bit determines the register to
+ * use (H/L) while the other 5 bits determine the bit
+ * within the register.
*/
- mc_filter[bit_nr >> 5] |= (1 << (bit_nr & 0x1F));
+ mc_filter[bit_nr >> 5] |= (1 << (bit_nr & 0x1f));
}
- writel(mc_filter[0], ioaddr + GMAC_HASH_TAB_0_31);
- writel(mc_filter[1], ioaddr + GMAC_HASH_TAB_32_63);
+ for (i = 0; i < numhashregs; i++)
+ writel(mc_filter[i], ioaddr + GMAC_HASH_TAB(i));
}
/* Handle multiple unicast addresses */
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
index edb6053..59afb53 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
@@ -354,6 +354,7 @@ static void dwmac4_get_hw_feature(void __iomem *ioaddr,
/* MAC HW feature1 */
hw_cap = readl(ioaddr + GMAC_HW_FEATURE1);
+ dma_cap->hash_tb_sz = (hw_cap & GMAC_HW_HASH_TB_SZ) >> 24;
dma_cap->av = (hw_cap & GMAC_HW_FEAT_AVSEL) >> 20;
dma_cap->tsoen = (hw_cap & GMAC_HW_TSOEN) >> 18;
/* RX and TX FIFO sizes are encoded as log2(n / 128). Undo that by
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 97c5e1a..1971f9f 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -4159,6 +4159,10 @@ static int stmmac_hw_init(struct stmmac_priv *priv)
priv->plat->enh_desc = priv->dma_cap.enh_desc;
priv->plat->pmt = priv->dma_cap.pmt_remote_wake_up;
priv->hw->pmt = priv->plat->pmt;
+ if (priv->dma_cap.hash_tb_sz) {
+ priv->hw->multicast_filter_bins = BIT(priv->dma_cap.hash_tb_sz) * 32;
+ priv->hw->mcast_bits_log2 = ilog2(priv->hw->multicast_filter_bins);
+ }
/* TXCOE doesn't work in thresh DMA mode */
if (priv->plat->force_thresh_dma_mode)
--
1.7.9.5
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^ permalink raw reply related [flat|nested] 21+ messages in thread* [v2, PATCH] net: stmmac: add support for hash table size 128/256 in dwmac4
@ 2019-05-14 3:00 ` Biao Huang
0 siblings, 0 replies; 21+ messages in thread
From: Biao Huang @ 2019-05-14 3:00 UTC (permalink / raw)
To: Jose Abreu, davem
Cc: Giuseppe Cavallaro, Alexandre Torgue, Maxime Coquelin,
Matthias Brugger, netdev, linux-stm32, linux-arm-kernel,
linux-kernel, linux-mediatek, yt.shen, biao.huang, jianguo.zhang,
boon.leong.ong
1. get hash table size in hw feature reigster, and add support
for taller hash table(128/256) in dwmac4.
2. only clear PR/HMC/PM bits of GMAC_PACKET_FILTER, to avoid
side effect to functions of other bits.
Signed-off-by: Biao Huang <biao.huang@mediatek.com>
---
drivers/net/ethernet/stmicro/stmmac/common.h | 7 +--
drivers/net/ethernet/stmicro/stmmac/dwmac4.h | 4 +-
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 50 ++++++++++++---------
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c | 1 +
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 4 ++
5 files changed, 40 insertions(+), 26 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/ethernet/stmicro/stmmac/common.h
index 272b9ca6..709dcec 100644
--- a/drivers/net/ethernet/stmicro/stmmac/common.h
+++ b/drivers/net/ethernet/stmicro/stmmac/common.h
@@ -335,6 +335,7 @@ struct dma_features {
/* 802.3az - Energy-Efficient Ethernet (EEE) */
unsigned int eee;
unsigned int av;
+ unsigned int hash_tb_sz;
unsigned int tsoen;
/* TX and RX csum */
unsigned int tx_coe;
@@ -427,9 +428,9 @@ struct mac_device_info {
struct mii_regs mii; /* MII register Addresses */
struct mac_link link;
void __iomem *pcsr; /* vpointer to device CSRs */
- int multicast_filter_bins;
- int unicast_filter_entries;
- int mcast_bits_log2;
+ unsigned int multicast_filter_bins;
+ unsigned int unicast_filter_entries;
+ unsigned int mcast_bits_log2;
unsigned int rx_csum;
unsigned int pcs;
unsigned int pmt;
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
index eb013d5..a5eb7df 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
@@ -18,8 +18,7 @@
/* MAC registers */
#define GMAC_CONFIG 0x00000000
#define GMAC_PACKET_FILTER 0x00000008
-#define GMAC_HASH_TAB_0_31 0x00000010
-#define GMAC_HASH_TAB_32_63 0x00000014
+#define GMAC_HASH_TAB(x) (0x10 + x * 4)
#define GMAC_RX_FLOW_CTRL 0x00000090
#define GMAC_QX_TX_FLOW_CTRL(x) (0x70 + x * 4)
#define GMAC_TXQ_PRTY_MAP0 0x98
@@ -181,6 +180,7 @@ enum power_event {
#define GMAC_HW_FEAT_MIISEL BIT(0)
/* MAC HW features1 bitmap */
+#define GMAC_HW_HASH_TB_SZ GENMASK(25, 24)
#define GMAC_HW_FEAT_AVSEL BIT(20)
#define GMAC_HW_TSOEN BIT(18)
#define GMAC_HW_TXFIFOSIZE GENMASK(10, 6)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
index 7e5d5db..1f682ec 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
@@ -401,41 +401,49 @@ static void dwmac4_set_filter(struct mac_device_info *hw,
struct net_device *dev)
{
void __iomem *ioaddr = (void __iomem *)dev->base_addr;
- unsigned int value = 0;
+ unsigned int value;
+ int numhashregs = (hw->multicast_filter_bins >> 5);
+ int mcbitslog2 = hw->mcast_bits_log2;
+ int i;
+
+ value = readl(ioaddr + GMAC_PACKET_FILTER);
+ value &= ~GMAC_PACKET_FILTER_PR;
+ value &= ~GMAC_PACKET_FILTER_HMC;
+ value &= ~GMAC_PACKET_FILTER_PM;
if (dev->flags & IFF_PROMISC) {
- value = GMAC_PACKET_FILTER_PR;
+ value |= GMAC_PACKET_FILTER_PR;
} else if ((dev->flags & IFF_ALLMULTI) ||
- (netdev_mc_count(dev) > HASH_TABLE_SIZE)) {
+ (netdev_mc_count(dev) > hw->multicast_filter_bins)) {
/* Pass all multi */
- value = GMAC_PACKET_FILTER_PM;
- /* Set the 64 bits of the HASH tab. To be updated if taller
- * hash table is used
- */
- writel(0xffffffff, ioaddr + GMAC_HASH_TAB_0_31);
- writel(0xffffffff, ioaddr + GMAC_HASH_TAB_32_63);
+ value |= GMAC_PACKET_FILTER_PM;
+ /* Set all the bits of the HASH tab */
+ for (i = 0; i < numhashregs; i++)
+ writel(0xffffffff, ioaddr + GMAC_HASH_TAB(i));
} else if (!netdev_mc_empty(dev)) {
- u32 mc_filter[2];
+ u32 mc_filter[8];
struct netdev_hw_addr *ha;
/* Hash filter for multicast */
- value = GMAC_PACKET_FILTER_HMC;
+ value |= GMAC_PACKET_FILTER_HMC;
memset(mc_filter, 0, sizeof(mc_filter));
netdev_for_each_mc_addr(ha, dev) {
- /* The upper 6 bits of the calculated CRC are used to
- * index the content of the Hash Table Reg 0 and 1.
+ /* The upper n bits of the calculated CRC are used to
+ * index the contents of the hash table. The number of
+ * bits used depends on the hardware configuration
+ * selected at core configuration time.
*/
- int bit_nr =
- (bitrev32(~crc32_le(~0, ha->addr, 6)) >> 26);
- /* The most significant bit determines the register
- * to use while the other 5 bits determines the bit
- * within the selected register
+ int bit_nr = bitrev32(~crc32_le(~0, ha->addr,
+ ETH_ALEN)) >> (32 - mcbitslog2);
+ /* The most significant bit determines the register to
+ * use (H/L) while the other 5 bits determine the bit
+ * within the register.
*/
- mc_filter[bit_nr >> 5] |= (1 << (bit_nr & 0x1F));
+ mc_filter[bit_nr >> 5] |= (1 << (bit_nr & 0x1f));
}
- writel(mc_filter[0], ioaddr + GMAC_HASH_TAB_0_31);
- writel(mc_filter[1], ioaddr + GMAC_HASH_TAB_32_63);
+ for (i = 0; i < numhashregs; i++)
+ writel(mc_filter[i], ioaddr + GMAC_HASH_TAB(i));
}
/* Handle multiple unicast addresses */
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
index edb6053..59afb53 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
@@ -354,6 +354,7 @@ static void dwmac4_get_hw_feature(void __iomem *ioaddr,
/* MAC HW feature1 */
hw_cap = readl(ioaddr + GMAC_HW_FEATURE1);
+ dma_cap->hash_tb_sz = (hw_cap & GMAC_HW_HASH_TB_SZ) >> 24;
dma_cap->av = (hw_cap & GMAC_HW_FEAT_AVSEL) >> 20;
dma_cap->tsoen = (hw_cap & GMAC_HW_TSOEN) >> 18;
/* RX and TX FIFO sizes are encoded as log2(n / 128). Undo that by
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 97c5e1a..1971f9f 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -4159,6 +4159,10 @@ static int stmmac_hw_init(struct stmmac_priv *priv)
priv->plat->enh_desc = priv->dma_cap.enh_desc;
priv->plat->pmt = priv->dma_cap.pmt_remote_wake_up;
priv->hw->pmt = priv->plat->pmt;
+ if (priv->dma_cap.hash_tb_sz) {
+ priv->hw->multicast_filter_bins = BIT(priv->dma_cap.hash_tb_sz) * 32;
+ priv->hw->mcast_bits_log2 = ilog2(priv->hw->multicast_filter_bins);
+ }
/* TXCOE doesn't work in thresh DMA mode */
if (priv->plat->force_thresh_dma_mode)
--
1.7.9.5
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [v2, PATCH] net: stmmac: add support for hash table size 128/256 in dwmac4
2019-05-14 3:00 ` Biao Huang
(?)
@ 2019-05-24 6:33 ` biao huang
-1 siblings, 0 replies; 21+ messages in thread
From: biao huang @ 2019-05-24 6:33 UTC (permalink / raw)
To: Jose Abreu
Cc: davem, Giuseppe Cavallaro, Alexandre Torgue, Maxime Coquelin,
Matthias Brugger, netdev, linux-stm32, linux-arm-kernel,
linux-kernel, linux-mediatek, yt.shen, jianguo.zhang,
boon.leong.ong
Dear All,
any comments about this patch?
Thanks.
On Tue, 2019-05-14 at 11:00 +0800, Biao Huang wrote:
> 1. get hash table size in hw feature reigster, and add support
> for taller hash table(128/256) in dwmac4.
> 2. only clear PR/HMC/PM bits of GMAC_PACKET_FILTER, to avoid
> side effect to functions of other bits.
>
> Signed-off-by: Biao Huang <biao.huang@mediatek.com>
> ---
> drivers/net/ethernet/stmicro/stmmac/common.h | 7 +--
> drivers/net/ethernet/stmicro/stmmac/dwmac4.h | 4 +-
> drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 50 ++++++++++++---------
> drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c | 1 +
> drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 4 ++
> 5 files changed, 40 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/ethernet/stmicro/stmmac/common.h
> index 272b9ca6..709dcec 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/common.h
> +++ b/drivers/net/ethernet/stmicro/stmmac/common.h
> @@ -335,6 +335,7 @@ struct dma_features {
> /* 802.3az - Energy-Efficient Ethernet (EEE) */
> unsigned int eee;
> unsigned int av;
> + unsigned int hash_tb_sz;
> unsigned int tsoen;
> /* TX and RX csum */
> unsigned int tx_coe;
> @@ -427,9 +428,9 @@ struct mac_device_info {
> struct mii_regs mii; /* MII register Addresses */
> struct mac_link link;
> void __iomem *pcsr; /* vpointer to device CSRs */
> - int multicast_filter_bins;
> - int unicast_filter_entries;
> - int mcast_bits_log2;
> + unsigned int multicast_filter_bins;
> + unsigned int unicast_filter_entries;
> + unsigned int mcast_bits_log2;
> unsigned int rx_csum;
> unsigned int pcs;
> unsigned int pmt;
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
> index eb013d5..a5eb7df 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
> @@ -18,8 +18,7 @@
> /* MAC registers */
> #define GMAC_CONFIG 0x00000000
> #define GMAC_PACKET_FILTER 0x00000008
> -#define GMAC_HASH_TAB_0_31 0x00000010
> -#define GMAC_HASH_TAB_32_63 0x00000014
> +#define GMAC_HASH_TAB(x) (0x10 + x * 4)
> #define GMAC_RX_FLOW_CTRL 0x00000090
> #define GMAC_QX_TX_FLOW_CTRL(x) (0x70 + x * 4)
> #define GMAC_TXQ_PRTY_MAP0 0x98
> @@ -181,6 +180,7 @@ enum power_event {
> #define GMAC_HW_FEAT_MIISEL BIT(0)
>
> /* MAC HW features1 bitmap */
> +#define GMAC_HW_HASH_TB_SZ GENMASK(25, 24)
> #define GMAC_HW_FEAT_AVSEL BIT(20)
> #define GMAC_HW_TSOEN BIT(18)
> #define GMAC_HW_TXFIFOSIZE GENMASK(10, 6)
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
> index 7e5d5db..1f682ec 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
> @@ -401,41 +401,49 @@ static void dwmac4_set_filter(struct mac_device_info *hw,
> struct net_device *dev)
> {
> void __iomem *ioaddr = (void __iomem *)dev->base_addr;
> - unsigned int value = 0;
> + unsigned int value;
> + int numhashregs = (hw->multicast_filter_bins >> 5);
> + int mcbitslog2 = hw->mcast_bits_log2;
> + int i;
> +
> + value = readl(ioaddr + GMAC_PACKET_FILTER);
> + value &= ~GMAC_PACKET_FILTER_PR;
> + value &= ~GMAC_PACKET_FILTER_HMC;
> + value &= ~GMAC_PACKET_FILTER_PM;
>
> if (dev->flags & IFF_PROMISC) {
> - value = GMAC_PACKET_FILTER_PR;
> + value |= GMAC_PACKET_FILTER_PR;
> } else if ((dev->flags & IFF_ALLMULTI) ||
> - (netdev_mc_count(dev) > HASH_TABLE_SIZE)) {
> + (netdev_mc_count(dev) > hw->multicast_filter_bins)) {
> /* Pass all multi */
> - value = GMAC_PACKET_FILTER_PM;
> - /* Set the 64 bits of the HASH tab. To be updated if taller
> - * hash table is used
> - */
> - writel(0xffffffff, ioaddr + GMAC_HASH_TAB_0_31);
> - writel(0xffffffff, ioaddr + GMAC_HASH_TAB_32_63);
> + value |= GMAC_PACKET_FILTER_PM;
> + /* Set all the bits of the HASH tab */
> + for (i = 0; i < numhashregs; i++)
> + writel(0xffffffff, ioaddr + GMAC_HASH_TAB(i));
> } else if (!netdev_mc_empty(dev)) {
> - u32 mc_filter[2];
> + u32 mc_filter[8];
> struct netdev_hw_addr *ha;
>
> /* Hash filter for multicast */
> - value = GMAC_PACKET_FILTER_HMC;
> + value |= GMAC_PACKET_FILTER_HMC;
>
> memset(mc_filter, 0, sizeof(mc_filter));
> netdev_for_each_mc_addr(ha, dev) {
> - /* The upper 6 bits of the calculated CRC are used to
> - * index the content of the Hash Table Reg 0 and 1.
> + /* The upper n bits of the calculated CRC are used to
> + * index the contents of the hash table. The number of
> + * bits used depends on the hardware configuration
> + * selected at core configuration time.
> */
> - int bit_nr =
> - (bitrev32(~crc32_le(~0, ha->addr, 6)) >> 26);
> - /* The most significant bit determines the register
> - * to use while the other 5 bits determines the bit
> - * within the selected register
> + int bit_nr = bitrev32(~crc32_le(~0, ha->addr,
> + ETH_ALEN)) >> (32 - mcbitslog2);
> + /* The most significant bit determines the register to
> + * use (H/L) while the other 5 bits determine the bit
> + * within the register.
> */
> - mc_filter[bit_nr >> 5] |= (1 << (bit_nr & 0x1F));
> + mc_filter[bit_nr >> 5] |= (1 << (bit_nr & 0x1f));
> }
> - writel(mc_filter[0], ioaddr + GMAC_HASH_TAB_0_31);
> - writel(mc_filter[1], ioaddr + GMAC_HASH_TAB_32_63);
> + for (i = 0; i < numhashregs; i++)
> + writel(mc_filter[i], ioaddr + GMAC_HASH_TAB(i));
> }
>
> /* Handle multiple unicast addresses */
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
> index edb6053..59afb53 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
> @@ -354,6 +354,7 @@ static void dwmac4_get_hw_feature(void __iomem *ioaddr,
>
> /* MAC HW feature1 */
> hw_cap = readl(ioaddr + GMAC_HW_FEATURE1);
> + dma_cap->hash_tb_sz = (hw_cap & GMAC_HW_HASH_TB_SZ) >> 24;
> dma_cap->av = (hw_cap & GMAC_HW_FEAT_AVSEL) >> 20;
> dma_cap->tsoen = (hw_cap & GMAC_HW_TSOEN) >> 18;
> /* RX and TX FIFO sizes are encoded as log2(n / 128). Undo that by
> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> index 97c5e1a..1971f9f 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> @@ -4159,6 +4159,10 @@ static int stmmac_hw_init(struct stmmac_priv *priv)
> priv->plat->enh_desc = priv->dma_cap.enh_desc;
> priv->plat->pmt = priv->dma_cap.pmt_remote_wake_up;
> priv->hw->pmt = priv->plat->pmt;
> + if (priv->dma_cap.hash_tb_sz) {
> + priv->hw->multicast_filter_bins = BIT(priv->dma_cap.hash_tb_sz) * 32;
> + priv->hw->mcast_bits_log2 = ilog2(priv->hw->multicast_filter_bins);
> + }
>
> /* TXCOE doesn't work in thresh DMA mode */
> if (priv->plat->force_thresh_dma_mode)
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [v2, PATCH] net: stmmac: add support for hash table size 128/256 in dwmac4
@ 2019-05-24 6:33 ` biao huang
0 siblings, 0 replies; 21+ messages in thread
From: biao huang @ 2019-05-24 6:33 UTC (permalink / raw)
To: Jose Abreu
Cc: Alexandre Torgue, jianguo.zhang, netdev, linux-kernel,
linux-stm32, yt.shen, linux-mediatek, boon.leong.ong,
Maxime Coquelin, Matthias Brugger, Giuseppe Cavallaro, davem,
linux-arm-kernel
Dear All,
any comments about this patch?
Thanks.
On Tue, 2019-05-14 at 11:00 +0800, Biao Huang wrote:
> 1. get hash table size in hw feature reigster, and add support
> for taller hash table(128/256) in dwmac4.
> 2. only clear PR/HMC/PM bits of GMAC_PACKET_FILTER, to avoid
> side effect to functions of other bits.
>
> Signed-off-by: Biao Huang <biao.huang@mediatek.com>
> ---
> drivers/net/ethernet/stmicro/stmmac/common.h | 7 +--
> drivers/net/ethernet/stmicro/stmmac/dwmac4.h | 4 +-
> drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 50 ++++++++++++---------
> drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c | 1 +
> drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 4 ++
> 5 files changed, 40 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/ethernet/stmicro/stmmac/common.h
> index 272b9ca6..709dcec 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/common.h
> +++ b/drivers/net/ethernet/stmicro/stmmac/common.h
> @@ -335,6 +335,7 @@ struct dma_features {
> /* 802.3az - Energy-Efficient Ethernet (EEE) */
> unsigned int eee;
> unsigned int av;
> + unsigned int hash_tb_sz;
> unsigned int tsoen;
> /* TX and RX csum */
> unsigned int tx_coe;
> @@ -427,9 +428,9 @@ struct mac_device_info {
> struct mii_regs mii; /* MII register Addresses */
> struct mac_link link;
> void __iomem *pcsr; /* vpointer to device CSRs */
> - int multicast_filter_bins;
> - int unicast_filter_entries;
> - int mcast_bits_log2;
> + unsigned int multicast_filter_bins;
> + unsigned int unicast_filter_entries;
> + unsigned int mcast_bits_log2;
> unsigned int rx_csum;
> unsigned int pcs;
> unsigned int pmt;
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
> index eb013d5..a5eb7df 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
> @@ -18,8 +18,7 @@
> /* MAC registers */
> #define GMAC_CONFIG 0x00000000
> #define GMAC_PACKET_FILTER 0x00000008
> -#define GMAC_HASH_TAB_0_31 0x00000010
> -#define GMAC_HASH_TAB_32_63 0x00000014
> +#define GMAC_HASH_TAB(x) (0x10 + x * 4)
> #define GMAC_RX_FLOW_CTRL 0x00000090
> #define GMAC_QX_TX_FLOW_CTRL(x) (0x70 + x * 4)
> #define GMAC_TXQ_PRTY_MAP0 0x98
> @@ -181,6 +180,7 @@ enum power_event {
> #define GMAC_HW_FEAT_MIISEL BIT(0)
>
> /* MAC HW features1 bitmap */
> +#define GMAC_HW_HASH_TB_SZ GENMASK(25, 24)
> #define GMAC_HW_FEAT_AVSEL BIT(20)
> #define GMAC_HW_TSOEN BIT(18)
> #define GMAC_HW_TXFIFOSIZE GENMASK(10, 6)
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
> index 7e5d5db..1f682ec 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
> @@ -401,41 +401,49 @@ static void dwmac4_set_filter(struct mac_device_info *hw,
> struct net_device *dev)
> {
> void __iomem *ioaddr = (void __iomem *)dev->base_addr;
> - unsigned int value = 0;
> + unsigned int value;
> + int numhashregs = (hw->multicast_filter_bins >> 5);
> + int mcbitslog2 = hw->mcast_bits_log2;
> + int i;
> +
> + value = readl(ioaddr + GMAC_PACKET_FILTER);
> + value &= ~GMAC_PACKET_FILTER_PR;
> + value &= ~GMAC_PACKET_FILTER_HMC;
> + value &= ~GMAC_PACKET_FILTER_PM;
>
> if (dev->flags & IFF_PROMISC) {
> - value = GMAC_PACKET_FILTER_PR;
> + value |= GMAC_PACKET_FILTER_PR;
> } else if ((dev->flags & IFF_ALLMULTI) ||
> - (netdev_mc_count(dev) > HASH_TABLE_SIZE)) {
> + (netdev_mc_count(dev) > hw->multicast_filter_bins)) {
> /* Pass all multi */
> - value = GMAC_PACKET_FILTER_PM;
> - /* Set the 64 bits of the HASH tab. To be updated if taller
> - * hash table is used
> - */
> - writel(0xffffffff, ioaddr + GMAC_HASH_TAB_0_31);
> - writel(0xffffffff, ioaddr + GMAC_HASH_TAB_32_63);
> + value |= GMAC_PACKET_FILTER_PM;
> + /* Set all the bits of the HASH tab */
> + for (i = 0; i < numhashregs; i++)
> + writel(0xffffffff, ioaddr + GMAC_HASH_TAB(i));
> } else if (!netdev_mc_empty(dev)) {
> - u32 mc_filter[2];
> + u32 mc_filter[8];
> struct netdev_hw_addr *ha;
>
> /* Hash filter for multicast */
> - value = GMAC_PACKET_FILTER_HMC;
> + value |= GMAC_PACKET_FILTER_HMC;
>
> memset(mc_filter, 0, sizeof(mc_filter));
> netdev_for_each_mc_addr(ha, dev) {
> - /* The upper 6 bits of the calculated CRC are used to
> - * index the content of the Hash Table Reg 0 and 1.
> + /* The upper n bits of the calculated CRC are used to
> + * index the contents of the hash table. The number of
> + * bits used depends on the hardware configuration
> + * selected at core configuration time.
> */
> - int bit_nr =
> - (bitrev32(~crc32_le(~0, ha->addr, 6)) >> 26);
> - /* The most significant bit determines the register
> - * to use while the other 5 bits determines the bit
> - * within the selected register
> + int bit_nr = bitrev32(~crc32_le(~0, ha->addr,
> + ETH_ALEN)) >> (32 - mcbitslog2);
> + /* The most significant bit determines the register to
> + * use (H/L) while the other 5 bits determine the bit
> + * within the register.
> */
> - mc_filter[bit_nr >> 5] |= (1 << (bit_nr & 0x1F));
> + mc_filter[bit_nr >> 5] |= (1 << (bit_nr & 0x1f));
> }
> - writel(mc_filter[0], ioaddr + GMAC_HASH_TAB_0_31);
> - writel(mc_filter[1], ioaddr + GMAC_HASH_TAB_32_63);
> + for (i = 0; i < numhashregs; i++)
> + writel(mc_filter[i], ioaddr + GMAC_HASH_TAB(i));
> }
>
> /* Handle multiple unicast addresses */
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
> index edb6053..59afb53 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
> @@ -354,6 +354,7 @@ static void dwmac4_get_hw_feature(void __iomem *ioaddr,
>
> /* MAC HW feature1 */
> hw_cap = readl(ioaddr + GMAC_HW_FEATURE1);
> + dma_cap->hash_tb_sz = (hw_cap & GMAC_HW_HASH_TB_SZ) >> 24;
> dma_cap->av = (hw_cap & GMAC_HW_FEAT_AVSEL) >> 20;
> dma_cap->tsoen = (hw_cap & GMAC_HW_TSOEN) >> 18;
> /* RX and TX FIFO sizes are encoded as log2(n / 128). Undo that by
> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> index 97c5e1a..1971f9f 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> @@ -4159,6 +4159,10 @@ static int stmmac_hw_init(struct stmmac_priv *priv)
> priv->plat->enh_desc = priv->dma_cap.enh_desc;
> priv->plat->pmt = priv->dma_cap.pmt_remote_wake_up;
> priv->hw->pmt = priv->plat->pmt;
> + if (priv->dma_cap.hash_tb_sz) {
> + priv->hw->multicast_filter_bins = BIT(priv->dma_cap.hash_tb_sz) * 32;
> + priv->hw->mcast_bits_log2 = ilog2(priv->hw->multicast_filter_bins);
> + }
>
> /* TXCOE doesn't work in thresh DMA mode */
> if (priv->plat->force_thresh_dma_mode)
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [v2, PATCH] net: stmmac: add support for hash table size 128/256 in dwmac4
@ 2019-05-24 6:33 ` biao huang
0 siblings, 0 replies; 21+ messages in thread
From: biao huang @ 2019-05-24 6:33 UTC (permalink / raw)
To: Jose Abreu
Cc: davem, Giuseppe Cavallaro, Alexandre Torgue, Maxime Coquelin,
Matthias Brugger, netdev, linux-stm32, linux-arm-kernel,
linux-kernel, linux-mediatek, yt.shen, jianguo.zhang,
boon.leong.ong
Dear All,
any comments about this patch?
Thanks.
On Tue, 2019-05-14 at 11:00 +0800, Biao Huang wrote:
> 1. get hash table size in hw feature reigster, and add support
> for taller hash table(128/256) in dwmac4.
> 2. only clear PR/HMC/PM bits of GMAC_PACKET_FILTER, to avoid
> side effect to functions of other bits.
>
> Signed-off-by: Biao Huang <biao.huang@mediatek.com>
> ---
> drivers/net/ethernet/stmicro/stmmac/common.h | 7 +--
> drivers/net/ethernet/stmicro/stmmac/dwmac4.h | 4 +-
> drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 50 ++++++++++++---------
> drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c | 1 +
> drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 4 ++
> 5 files changed, 40 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/ethernet/stmicro/stmmac/common.h
> index 272b9ca6..709dcec 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/common.h
> +++ b/drivers/net/ethernet/stmicro/stmmac/common.h
> @@ -335,6 +335,7 @@ struct dma_features {
> /* 802.3az - Energy-Efficient Ethernet (EEE) */
> unsigned int eee;
> unsigned int av;
> + unsigned int hash_tb_sz;
> unsigned int tsoen;
> /* TX and RX csum */
> unsigned int tx_coe;
> @@ -427,9 +428,9 @@ struct mac_device_info {
> struct mii_regs mii; /* MII register Addresses */
> struct mac_link link;
> void __iomem *pcsr; /* vpointer to device CSRs */
> - int multicast_filter_bins;
> - int unicast_filter_entries;
> - int mcast_bits_log2;
> + unsigned int multicast_filter_bins;
> + unsigned int unicast_filter_entries;
> + unsigned int mcast_bits_log2;
> unsigned int rx_csum;
> unsigned int pcs;
> unsigned int pmt;
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
> index eb013d5..a5eb7df 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
> @@ -18,8 +18,7 @@
> /* MAC registers */
> #define GMAC_CONFIG 0x00000000
> #define GMAC_PACKET_FILTER 0x00000008
> -#define GMAC_HASH_TAB_0_31 0x00000010
> -#define GMAC_HASH_TAB_32_63 0x00000014
> +#define GMAC_HASH_TAB(x) (0x10 + x * 4)
> #define GMAC_RX_FLOW_CTRL 0x00000090
> #define GMAC_QX_TX_FLOW_CTRL(x) (0x70 + x * 4)
> #define GMAC_TXQ_PRTY_MAP0 0x98
> @@ -181,6 +180,7 @@ enum power_event {
> #define GMAC_HW_FEAT_MIISEL BIT(0)
>
> /* MAC HW features1 bitmap */
> +#define GMAC_HW_HASH_TB_SZ GENMASK(25, 24)
> #define GMAC_HW_FEAT_AVSEL BIT(20)
> #define GMAC_HW_TSOEN BIT(18)
> #define GMAC_HW_TXFIFOSIZE GENMASK(10, 6)
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
> index 7e5d5db..1f682ec 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
> @@ -401,41 +401,49 @@ static void dwmac4_set_filter(struct mac_device_info *hw,
> struct net_device *dev)
> {
> void __iomem *ioaddr = (void __iomem *)dev->base_addr;
> - unsigned int value = 0;
> + unsigned int value;
> + int numhashregs = (hw->multicast_filter_bins >> 5);
> + int mcbitslog2 = hw->mcast_bits_log2;
> + int i;
> +
> + value = readl(ioaddr + GMAC_PACKET_FILTER);
> + value &= ~GMAC_PACKET_FILTER_PR;
> + value &= ~GMAC_PACKET_FILTER_HMC;
> + value &= ~GMAC_PACKET_FILTER_PM;
>
> if (dev->flags & IFF_PROMISC) {
> - value = GMAC_PACKET_FILTER_PR;
> + value |= GMAC_PACKET_FILTER_PR;
> } else if ((dev->flags & IFF_ALLMULTI) ||
> - (netdev_mc_count(dev) > HASH_TABLE_SIZE)) {
> + (netdev_mc_count(dev) > hw->multicast_filter_bins)) {
> /* Pass all multi */
> - value = GMAC_PACKET_FILTER_PM;
> - /* Set the 64 bits of the HASH tab. To be updated if taller
> - * hash table is used
> - */
> - writel(0xffffffff, ioaddr + GMAC_HASH_TAB_0_31);
> - writel(0xffffffff, ioaddr + GMAC_HASH_TAB_32_63);
> + value |= GMAC_PACKET_FILTER_PM;
> + /* Set all the bits of the HASH tab */
> + for (i = 0; i < numhashregs; i++)
> + writel(0xffffffff, ioaddr + GMAC_HASH_TAB(i));
> } else if (!netdev_mc_empty(dev)) {
> - u32 mc_filter[2];
> + u32 mc_filter[8];
> struct netdev_hw_addr *ha;
>
> /* Hash filter for multicast */
> - value = GMAC_PACKET_FILTER_HMC;
> + value |= GMAC_PACKET_FILTER_HMC;
>
> memset(mc_filter, 0, sizeof(mc_filter));
> netdev_for_each_mc_addr(ha, dev) {
> - /* The upper 6 bits of the calculated CRC are used to
> - * index the content of the Hash Table Reg 0 and 1.
> + /* The upper n bits of the calculated CRC are used to
> + * index the contents of the hash table. The number of
> + * bits used depends on the hardware configuration
> + * selected at core configuration time.
> */
> - int bit_nr =
> - (bitrev32(~crc32_le(~0, ha->addr, 6)) >> 26);
> - /* The most significant bit determines the register
> - * to use while the other 5 bits determines the bit
> - * within the selected register
> + int bit_nr = bitrev32(~crc32_le(~0, ha->addr,
> + ETH_ALEN)) >> (32 - mcbitslog2);
> + /* The most significant bit determines the register to
> + * use (H/L) while the other 5 bits determine the bit
> + * within the register.
> */
> - mc_filter[bit_nr >> 5] |= (1 << (bit_nr & 0x1F));
> + mc_filter[bit_nr >> 5] |= (1 << (bit_nr & 0x1f));
> }
> - writel(mc_filter[0], ioaddr + GMAC_HASH_TAB_0_31);
> - writel(mc_filter[1], ioaddr + GMAC_HASH_TAB_32_63);
> + for (i = 0; i < numhashregs; i++)
> + writel(mc_filter[i], ioaddr + GMAC_HASH_TAB(i));
> }
>
> /* Handle multiple unicast addresses */
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
> index edb6053..59afb53 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
> @@ -354,6 +354,7 @@ static void dwmac4_get_hw_feature(void __iomem *ioaddr,
>
> /* MAC HW feature1 */
> hw_cap = readl(ioaddr + GMAC_HW_FEATURE1);
> + dma_cap->hash_tb_sz = (hw_cap & GMAC_HW_HASH_TB_SZ) >> 24;
> dma_cap->av = (hw_cap & GMAC_HW_FEAT_AVSEL) >> 20;
> dma_cap->tsoen = (hw_cap & GMAC_HW_TSOEN) >> 18;
> /* RX and TX FIFO sizes are encoded as log2(n / 128). Undo that by
> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> index 97c5e1a..1971f9f 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> @@ -4159,6 +4159,10 @@ static int stmmac_hw_init(struct stmmac_priv *priv)
> priv->plat->enh_desc = priv->dma_cap.enh_desc;
> priv->plat->pmt = priv->dma_cap.pmt_remote_wake_up;
> priv->hw->pmt = priv->plat->pmt;
> + if (priv->dma_cap.hash_tb_sz) {
> + priv->hw->multicast_filter_bins = BIT(priv->dma_cap.hash_tb_sz) * 32;
> + priv->hw->mcast_bits_log2 = ilog2(priv->hw->multicast_filter_bins);
> + }
>
> /* TXCOE doesn't work in thresh DMA mode */
> if (priv->plat->force_thresh_dma_mode)
^ permalink raw reply [flat|nested] 21+ messages in thread* RE: [v2, PATCH] net: stmmac: add support for hash table size 128/256 in dwmac4
2019-05-24 6:33 ` biao huang
(?)
@ 2019-05-24 8:24 ` Jose Abreu
-1 siblings, 0 replies; 21+ messages in thread
From: Jose Abreu @ 2019-05-24 8:24 UTC (permalink / raw)
To: biao huang
Cc: davem, Giuseppe Cavallaro, Alexandre Torgue, Maxime Coquelin,
Matthias Brugger, netdev, linux-stm32, linux-arm-kernel,
linux-kernel, linux-mediatek, yt.shen, jianguo.zhang,
boon.leong.ong
From: biao huang <biao.huang@mediatek.com>
Date: Fri, May 24, 2019 at 07:33:37
> any comments about this patch?
Can you please test your series on top of this one [1] and let me know
the output of :
# ethtool -t eth0
Just to make sure that this patch does not introduce any regressions. The
remaining ones of the series look fine by me!
[1]
https://patchwork.ozlabs.org/project/netdev/list/?series=109699
Thanks,
Jose Miguel Abreu
^ permalink raw reply [flat|nested] 21+ messages in thread
* RE: [v2, PATCH] net: stmmac: add support for hash table size 128/256 in dwmac4
@ 2019-05-24 8:24 ` Jose Abreu
0 siblings, 0 replies; 21+ messages in thread
From: Jose Abreu @ 2019-05-24 8:24 UTC (permalink / raw)
To: biao huang
Cc: Alexandre Torgue, jianguo.zhang, netdev, linux-kernel,
linux-stm32, yt.shen, linux-mediatek, boon.leong.ong,
Maxime Coquelin, Matthias Brugger, Giuseppe Cavallaro, davem,
linux-arm-kernel
From: biao huang <biao.huang@mediatek.com>
Date: Fri, May 24, 2019 at 07:33:37
> any comments about this patch?
Can you please test your series on top of this one [1] and let me know
the output of :
# ethtool -t eth0
Just to make sure that this patch does not introduce any regressions. The
remaining ones of the series look fine by me!
[1]
https://patchwork.ozlabs.org/project/netdev/list/?series=109699
Thanks,
Jose Miguel Abreu
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 21+ messages in thread
* RE: [v2, PATCH] net: stmmac: add support for hash table size 128/256 in dwmac4
@ 2019-05-24 8:24 ` Jose Abreu
0 siblings, 0 replies; 21+ messages in thread
From: Jose Abreu @ 2019-05-24 8:24 UTC (permalink / raw)
To: biao huang
Cc: davem, Giuseppe Cavallaro, Alexandre Torgue, Maxime Coquelin,
Matthias Brugger, netdev, linux-stm32, linux-arm-kernel,
linux-kernel, linux-mediatek, yt.shen, jianguo.zhang,
boon.leong.ong
From: biao huang <biao.huang@mediatek.com>
Date: Fri, May 24, 2019 at 07:33:37
> any comments about this patch?
Can you please test your series on top of this one [1] and let me know
the output of :
# ethtool -t eth0
Just to make sure that this patch does not introduce any regressions. The
remaining ones of the series look fine by me!
[1]
https://patchwork.ozlabs.org/project/netdev/list/?series=109699
Thanks,
Jose Miguel Abreu
^ permalink raw reply [flat|nested] 21+ messages in thread
* RE: [v2, PATCH] net: stmmac: add support for hash table size 128/256 in dwmac4
2019-05-24 8:24 ` Jose Abreu
(?)
@ 2019-05-24 8:31 ` biao huang
-1 siblings, 0 replies; 21+ messages in thread
From: biao huang @ 2019-05-24 8:31 UTC (permalink / raw)
To: Jose Abreu
Cc: davem, Giuseppe Cavallaro, Alexandre Torgue, Maxime Coquelin,
Matthias Brugger, netdev, linux-stm32, linux-arm-kernel,
linux-kernel, linux-mediatek, yt.shen, jianguo.zhang,
boon.leong.ong
On Fri, 2019-05-24 at 08:24 +0000, Jose Abreu wrote:
> From: biao huang <biao.huang@mediatek.com>
> Date: Fri, May 24, 2019 at 07:33:37
>
> > any comments about this patch?
>
> Can you please test your series on top of this one [1] and let me know
> the output of :
> # ethtool -t eth0
"ethtol -T eth0"? This patch only affect hash table filter, seems no
relation to timestamp.
>
> Just to make sure that this patch does not introduce any regressions. The
> remaining ones of the series look fine by me!
>
> [1]
which one? Did I miss anything here?
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> https://patchwork.ozlabs.org/project/netdev/list/?series=109699
>
> Thanks,
> Jose Miguel Abreu
^ permalink raw reply [flat|nested] 21+ messages in thread
* RE: [v2, PATCH] net: stmmac: add support for hash table size 128/256 in dwmac4
@ 2019-05-24 8:31 ` biao huang
0 siblings, 0 replies; 21+ messages in thread
From: biao huang @ 2019-05-24 8:31 UTC (permalink / raw)
To: Jose Abreu
Cc: Alexandre Torgue, jianguo.zhang, netdev, linux-kernel,
linux-stm32, yt.shen, linux-mediatek, boon.leong.ong,
Maxime Coquelin, Matthias Brugger, Giuseppe Cavallaro, davem,
linux-arm-kernel
On Fri, 2019-05-24 at 08:24 +0000, Jose Abreu wrote:
> From: biao huang <biao.huang@mediatek.com>
> Date: Fri, May 24, 2019 at 07:33:37
>
> > any comments about this patch?
>
> Can you please test your series on top of this one [1] and let me know
> the output of :
> # ethtool -t eth0
"ethtol -T eth0"? This patch only affect hash table filter, seems no
relation to timestamp.
>
> Just to make sure that this patch does not introduce any regressions. The
> remaining ones of the series look fine by me!
>
> [1]
which one? Did I miss anything here?
>
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>
> https://patchwork.ozlabs.org/project/netdev/list/?series=109699
>
> Thanks,
> Jose Miguel Abreu
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 21+ messages in thread
* RE: [v2, PATCH] net: stmmac: add support for hash table size 128/256 in dwmac4
@ 2019-05-24 8:31 ` biao huang
0 siblings, 0 replies; 21+ messages in thread
From: biao huang @ 2019-05-24 8:31 UTC (permalink / raw)
To: Jose Abreu
Cc: davem, Giuseppe Cavallaro, Alexandre Torgue, Maxime Coquelin,
Matthias Brugger, netdev, linux-stm32, linux-arm-kernel,
linux-kernel, linux-mediatek, yt.shen, jianguo.zhang,
boon.leong.ong
On Fri, 2019-05-24 at 08:24 +0000, Jose Abreu wrote:
> From: biao huang <biao.huang@mediatek.com>
> Date: Fri, May 24, 2019 at 07:33:37
>
> > any comments about this patch?
>
> Can you please test your series on top of this one [1] and let me know
> the output of :
> # ethtool -t eth0
"ethtol -T eth0"? This patch only affect hash table filter, seems no
relation to timestamp.
>
> Just to make sure that this patch does not introduce any regressions. The
> remaining ones of the series look fine by me!
>
> [1]
which one? Did I miss anything here?
>
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> https://patchwork.ozlabs.org/project/netdev/list/?series=109699
>
> Thanks,
> Jose Miguel Abreu
^ permalink raw reply [flat|nested] 21+ messages in thread
* RE: [v2, PATCH] net: stmmac: add support for hash table size 128/256 in dwmac4
2019-05-24 8:31 ` biao huang
(?)
@ 2019-05-24 9:24 ` Jose Abreu
-1 siblings, 0 replies; 21+ messages in thread
From: Jose Abreu @ 2019-05-24 9:24 UTC (permalink / raw)
To: biao huang, Jose Abreu
Cc: davem, Giuseppe Cavallaro, Alexandre Torgue, Maxime Coquelin,
Matthias Brugger, netdev, linux-stm32, linux-arm-kernel,
linux-kernel, linux-mediatek, yt.shen, jianguo.zhang,
boon.leong.ong
From: biao huang <biao.huang@mediatek.com>
Date: Fri, May 24, 2019 at 09:31:44
> On Fri, 2019-05-24 at 08:24 +0000, Jose Abreu wrote:
> > From: biao huang <biao.huang@mediatek.com>
> > Date: Fri, May 24, 2019 at 07:33:37
> >
> > > any comments about this patch?
> >
> > Can you please test your series on top of this one [1] and let me know
> > the output of :
> > # ethtool -t eth0
> "ethtol -T eth0"? This patch only affect hash table filter, seems no
> relation to timestamp.
> >
> > Just to make sure that this patch does not introduce any regressions. The
> > remaining ones of the series look fine by me!
> >
> > [1]
> which one? Did I miss anything here?
Sorry, my mail client tried to wrap the long link and ended up in a
loooong email.
[1] https://patchwork.ozlabs.org/project/netdev/list/?series=109699
Thanks,
Jose Miguel Abreu
^ permalink raw reply [flat|nested] 21+ messages in thread
* RE: [v2, PATCH] net: stmmac: add support for hash table size 128/256 in dwmac4
@ 2019-05-24 9:24 ` Jose Abreu
0 siblings, 0 replies; 21+ messages in thread
From: Jose Abreu @ 2019-05-24 9:24 UTC (permalink / raw)
To: biao huang, Jose Abreu
Cc: Alexandre Torgue, jianguo.zhang, netdev, linux-kernel,
linux-stm32, yt.shen, linux-mediatek, boon.leong.ong,
Maxime Coquelin, Matthias Brugger, Giuseppe Cavallaro, davem,
linux-arm-kernel
From: biao huang <biao.huang@mediatek.com>
Date: Fri, May 24, 2019 at 09:31:44
> On Fri, 2019-05-24 at 08:24 +0000, Jose Abreu wrote:
> > From: biao huang <biao.huang@mediatek.com>
> > Date: Fri, May 24, 2019 at 07:33:37
> >
> > > any comments about this patch?
> >
> > Can you please test your series on top of this one [1] and let me know
> > the output of :
> > # ethtool -t eth0
> "ethtol -T eth0"? This patch only affect hash table filter, seems no
> relation to timestamp.
> >
> > Just to make sure that this patch does not introduce any regressions. The
> > remaining ones of the series look fine by me!
> >
> > [1]
> which one? Did I miss anything here?
Sorry, my mail client tried to wrap the long link and ended up in a
loooong email.
[1] https://patchwork.ozlabs.org/project/netdev/list/?series=109699
Thanks,
Jose Miguel Abreu
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 21+ messages in thread
* RE: [v2, PATCH] net: stmmac: add support for hash table size 128/256 in dwmac4
@ 2019-05-24 9:24 ` Jose Abreu
0 siblings, 0 replies; 21+ messages in thread
From: Jose Abreu @ 2019-05-24 9:24 UTC (permalink / raw)
To: biao huang, Jose Abreu
Cc: davem, Giuseppe Cavallaro, Alexandre Torgue, Maxime Coquelin,
Matthias Brugger, netdev, linux-stm32, linux-arm-kernel,
linux-kernel, linux-mediatek, yt.shen, jianguo.zhang,
boon.leong.ong
From: biao huang <biao.huang@mediatek.com>
Date: Fri, May 24, 2019 at 09:31:44
> On Fri, 2019-05-24 at 08:24 +0000, Jose Abreu wrote:
> > From: biao huang <biao.huang@mediatek.com>
> > Date: Fri, May 24, 2019 at 07:33:37
> >
> > > any comments about this patch?
> >
> > Can you please test your series on top of this one [1] and let me know
> > the output of :
> > # ethtool -t eth0
> "ethtol -T eth0"? This patch only affect hash table filter, seems no
> relation to timestamp.
> >
> > Just to make sure that this patch does not introduce any regressions. The
> > remaining ones of the series look fine by me!
> >
> > [1]
> which one? Did I miss anything here?
Sorry, my mail client tried to wrap the long link and ended up in a
loooong email.
[1] https://patchwork.ozlabs.org/project/netdev/list/?series=109699
Thanks,
Jose Miguel Abreu
^ permalink raw reply [flat|nested] 21+ messages in thread
* RE: [v2, PATCH] net: stmmac: add support for hash table size 128/256 in dwmac4
2019-05-24 9:24 ` Jose Abreu
(?)
@ 2019-05-24 9:44 ` biao huang
-1 siblings, 0 replies; 21+ messages in thread
From: biao huang @ 2019-05-24 9:44 UTC (permalink / raw)
To: Jose Abreu
Cc: davem, Giuseppe Cavallaro, Alexandre Torgue, Maxime Coquelin,
Matthias Brugger, netdev, linux-stm32, linux-arm-kernel,
linux-kernel, linux-mediatek, yt.shen, jianguo.zhang,
boon.leong.ong
Seems I should modify this patch base on
"https://patchwork.ozlabs.org/project/netdev/list/?series=109699"
On Fri, 2019-05-24 at 09:24 +0000, Jose Abreu wrote:
> From: biao huang <biao.huang@mediatek.com>
> Date: Fri, May 24, 2019 at 09:31:44
>
> > On Fri, 2019-05-24 at 08:24 +0000, Jose Abreu wrote:
> > > From: biao huang <biao.huang@mediatek.com>
> > > Date: Fri, May 24, 2019 at 07:33:37
> > >
> > > > any comments about this patch?
> > >
> > > Can you please test your series on top of this one [1] and let me know
> > > the output of :
> > > # ethtool -t eth0
> > "ethtol -T eth0"? This patch only affect hash table filter, seems no
> > relation to timestamp.
> > >
execute "ethtool -t eth0", then we got "Cannot test: Operation not
supported", is there any config should be enabled?
> > > Just to make sure that this patch does not introduce any regressions. The
> > > remaining ones of the series look fine by me!
> > >
> > > [1]
> > which one? Did I miss anything here?
>
> Sorry, my mail client tried to wrap the long link and ended up in a
> loooong email.
>
> [1] https://patchwork.ozlabs.org/project/netdev/list/?series=109699
>
Got it.
> Thanks,
> Jose Miguel Abreu
^ permalink raw reply [flat|nested] 21+ messages in thread
* RE: [v2, PATCH] net: stmmac: add support for hash table size 128/256 in dwmac4
@ 2019-05-24 9:44 ` biao huang
0 siblings, 0 replies; 21+ messages in thread
From: biao huang @ 2019-05-24 9:44 UTC (permalink / raw)
To: Jose Abreu
Cc: Alexandre Torgue, jianguo.zhang, netdev, linux-kernel,
linux-stm32, yt.shen, linux-mediatek, boon.leong.ong,
Maxime Coquelin, Matthias Brugger, Giuseppe Cavallaro, davem,
linux-arm-kernel
Seems I should modify this patch base on
"https://patchwork.ozlabs.org/project/netdev/list/?series=109699"
On Fri, 2019-05-24 at 09:24 +0000, Jose Abreu wrote:
> From: biao huang <biao.huang@mediatek.com>
> Date: Fri, May 24, 2019 at 09:31:44
>
> > On Fri, 2019-05-24 at 08:24 +0000, Jose Abreu wrote:
> > > From: biao huang <biao.huang@mediatek.com>
> > > Date: Fri, May 24, 2019 at 07:33:37
> > >
> > > > any comments about this patch?
> > >
> > > Can you please test your series on top of this one [1] and let me know
> > > the output of :
> > > # ethtool -t eth0
> > "ethtol -T eth0"? This patch only affect hash table filter, seems no
> > relation to timestamp.
> > >
execute "ethtool -t eth0", then we got "Cannot test: Operation not
supported", is there any config should be enabled?
> > > Just to make sure that this patch does not introduce any regressions. The
> > > remaining ones of the series look fine by me!
> > >
> > > [1]
> > which one? Did I miss anything here?
>
> Sorry, my mail client tried to wrap the long link and ended up in a
> loooong email.
>
> [1] https://patchwork.ozlabs.org/project/netdev/list/?series=109699
>
Got it.
> Thanks,
> Jose Miguel Abreu
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 21+ messages in thread
* RE: [v2, PATCH] net: stmmac: add support for hash table size 128/256 in dwmac4
@ 2019-05-24 9:44 ` biao huang
0 siblings, 0 replies; 21+ messages in thread
From: biao huang @ 2019-05-24 9:44 UTC (permalink / raw)
To: Jose Abreu
Cc: davem, Giuseppe Cavallaro, Alexandre Torgue, Maxime Coquelin,
Matthias Brugger, netdev, linux-stm32, linux-arm-kernel,
linux-kernel, linux-mediatek, yt.shen, jianguo.zhang,
boon.leong.ong
Seems I should modify this patch base on
"https://patchwork.ozlabs.org/project/netdev/list/?series=109699"
On Fri, 2019-05-24 at 09:24 +0000, Jose Abreu wrote:
> From: biao huang <biao.huang@mediatek.com>
> Date: Fri, May 24, 2019 at 09:31:44
>
> > On Fri, 2019-05-24 at 08:24 +0000, Jose Abreu wrote:
> > > From: biao huang <biao.huang@mediatek.com>
> > > Date: Fri, May 24, 2019 at 07:33:37
> > >
> > > > any comments about this patch?
> > >
> > > Can you please test your series on top of this one [1] and let me know
> > > the output of :
> > > # ethtool -t eth0
> > "ethtol -T eth0"? This patch only affect hash table filter, seems no
> > relation to timestamp.
> > >
execute "ethtool -t eth0", then we got "Cannot test: Operation not
supported", is there any config should be enabled?
> > > Just to make sure that this patch does not introduce any regressions. The
> > > remaining ones of the series look fine by me!
> > >
> > > [1]
> > which one? Did I miss anything here?
>
> Sorry, my mail client tried to wrap the long link and ended up in a
> loooong email.
>
> [1] https://patchwork.ozlabs.org/project/netdev/list/?series=109699
>
Got it.
> Thanks,
> Jose Miguel Abreu
^ permalink raw reply [flat|nested] 21+ messages in thread