From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.4 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1390FC4740A for ; Mon, 7 Oct 2019 07:31:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id DD85C218AC for ; Mon, 7 Oct 2019 07:31:28 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=st.com header.i=@st.com header.b="qA1R/5ku" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727345AbfJGHb2 (ORCPT ); Mon, 7 Oct 2019 03:31:28 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:37464 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726960AbfJGHb1 (ORCPT ); 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Mon, 07 Oct 2019 09:31:14 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 5D083100038; Mon, 7 Oct 2019 09:31:12 +0200 (CEST) Received: from Webmail-eu.st.com (Safex1hubcas24.st.com [10.75.90.94]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 4717C2AECA9; Mon, 7 Oct 2019 09:31:12 +0200 (CEST) Received: from SAFEX1HUBCAS23.st.com (10.75.90.46) by Safex1hubcas24.st.com (10.75.90.94) with Microsoft SMTP Server (TLS) id 14.3.439.0; Mon, 7 Oct 2019 09:31:12 +0200 Received: from [10.48.0.192] (10.48.0.192) by webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Mon, 7 Oct 2019 09:31:11 +0200 Subject: Re: [PATCH] counter: stm32: clean up indentation issue To: William Breathitt Gray CC: Colin King , Jonathan Cameron , Maxime Coquelin , "Alexandre Torgue" , , , , , References: <20190925095126.20219-1-colin.king@canonical.com> <20191005173004.GA7431@icarus> From: Fabrice Gasnier Message-ID: <792dd11a-ae78-c4a3-834f-b1f67a750a14@st.com> Date: Mon, 7 Oct 2019 09:31:10 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <20191005173004.GA7431@icarus> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.48.0.192] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,1.0.8 definitions=2019-10-07_01:2019-10-03,2019-10-07 signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/5/19 7:30 PM, William Breathitt Gray wrote: > On Wed, Sep 25, 2019 at 10:51:26AM +0100, Colin King wrote: >> From: Colin Ian King >> >> There is an if statement that is indented one level too deeply, >> remove the extraneous tabs. >> >> Signed-off-by: Colin Ian King >> --- >> drivers/counter/stm32-timer-cnt.c | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/counter/stm32-timer-cnt.c b/drivers/counter/stm32-timer-cnt.c >> index 644ba18a72ad..613dcccf79e1 100644 >> --- a/drivers/counter/stm32-timer-cnt.c >> +++ b/drivers/counter/stm32-timer-cnt.c >> @@ -219,8 +219,8 @@ static ssize_t stm32_count_enable_write(struct counter_device *counter, >> >> if (enable) { >> regmap_read(priv->regmap, TIM_CR1, &cr1); >> - if (!(cr1 & TIM_CR1_CEN)) >> - clk_enable(priv->clk); >> + if (!(cr1 & TIM_CR1_CEN)) >> + clk_enable(priv->clk); >> >> regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, >> TIM_CR1_CEN); >> -- >> 2.20.1 > > Acked-by: William Breathitt Gray > > Fabrice, > > I noticed the TIM_CR1_CEN check is happening before the > regmap_update_bits call for the enable path, while the disable path does > the check after. Is this logic is correct. Hi William, In the disable path, things are done in the reverse order, purpose is to: - enable the clock before enabling the counter (CEN) - disable the clock after the counter has been disabled Current code also takes care of balancing clock enable/disable calls. BR, Fabrice > > William Breathitt Gray > From mboxrd@z Thu Jan 1 00:00:00 1970 From: Fabrice Gasnier Date: Mon, 07 Oct 2019 07:31:10 +0000 Subject: Re: [PATCH] counter: stm32: clean up indentation issue Message-Id: <792dd11a-ae78-c4a3-834f-b1f67a750a14@st.com> List-Id: References: <20190925095126.20219-1-colin.king@canonical.com> <20191005173004.GA7431@icarus> In-Reply-To: <20191005173004.GA7431@icarus> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: William Breathitt Gray Cc: Alexandre Torgue , linux-iio@vger.kernel.org, kernel-janitors@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Maxime Coquelin , Colin King , linux-stm32@st-md-mailman.stormreply.com, Jonathan Cameron On 10/5/19 7:30 PM, William Breathitt Gray wrote: > On Wed, Sep 25, 2019 at 10:51:26AM +0100, Colin King wrote: >> From: Colin Ian King >> >> There is an if statement that is indented one level too deeply, >> remove the extraneous tabs. >> >> Signed-off-by: Colin Ian King >> --- >> drivers/counter/stm32-timer-cnt.c | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/counter/stm32-timer-cnt.c b/drivers/counter/stm32-timer-cnt.c >> index 644ba18a72ad..613dcccf79e1 100644 >> --- a/drivers/counter/stm32-timer-cnt.c >> +++ b/drivers/counter/stm32-timer-cnt.c >> @@ -219,8 +219,8 @@ static ssize_t stm32_count_enable_write(struct counter_device *counter, >> >> if (enable) { >> regmap_read(priv->regmap, TIM_CR1, &cr1); >> - if (!(cr1 & TIM_CR1_CEN)) >> - clk_enable(priv->clk); >> + if (!(cr1 & TIM_CR1_CEN)) >> + clk_enable(priv->clk); >> >> regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, >> TIM_CR1_CEN); >> -- >> 2.20.1 > > Acked-by: William Breathitt Gray > > Fabrice, > > I noticed the TIM_CR1_CEN check is happening before the > regmap_update_bits call for the enable path, while the disable path does > the check after. Is this logic is correct. Hi William, In the disable path, things are done in the reverse order, purpose is to: - enable the clock before enabling the counter (CEN) - disable the clock after the counter has been disabled Current code also takes care of balancing clock enable/disable calls. BR, Fabrice > > William Breathitt Gray > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7B0C1C47404 for ; Mon, 7 Oct 2019 07:31:26 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3F2A22084D for ; Mon, 7 Oct 2019 07:31:26 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="cmGKSGTN"; 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Mon, 07 Oct 2019 09:31:14 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 5D083100038; Mon, 7 Oct 2019 09:31:12 +0200 (CEST) Received: from Webmail-eu.st.com (Safex1hubcas24.st.com [10.75.90.94]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 4717C2AECA9; Mon, 7 Oct 2019 09:31:12 +0200 (CEST) Received: from SAFEX1HUBCAS23.st.com (10.75.90.46) by Safex1hubcas24.st.com (10.75.90.94) with Microsoft SMTP Server (TLS) id 14.3.439.0; Mon, 7 Oct 2019 09:31:12 +0200 Received: from [10.48.0.192] (10.48.0.192) by webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Mon, 7 Oct 2019 09:31:11 +0200 Subject: Re: [PATCH] counter: stm32: clean up indentation issue To: William Breathitt Gray References: <20190925095126.20219-1-colin.king@canonical.com> <20191005173004.GA7431@icarus> From: Fabrice Gasnier Message-ID: <792dd11a-ae78-c4a3-834f-b1f67a750a14@st.com> Date: Mon, 7 Oct 2019 09:31:10 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <20191005173004.GA7431@icarus> Content-Language: en-US X-Originating-IP: [10.48.0.192] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,1.0.8 definitions=2019-10-07_01:2019-10-03,2019-10-07 signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191007_003123_160891_F47EC8EA X-CRM114-Status: GOOD ( 17.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexandre Torgue , linux-iio@vger.kernel.org, kernel-janitors@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Maxime Coquelin , Colin King , linux-stm32@st-md-mailman.stormreply.com, Jonathan Cameron Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 10/5/19 7:30 PM, William Breathitt Gray wrote: > On Wed, Sep 25, 2019 at 10:51:26AM +0100, Colin King wrote: >> From: Colin Ian King >> >> There is an if statement that is indented one level too deeply, >> remove the extraneous tabs. >> >> Signed-off-by: Colin Ian King >> --- >> drivers/counter/stm32-timer-cnt.c | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/counter/stm32-timer-cnt.c b/drivers/counter/stm32-timer-cnt.c >> index 644ba18a72ad..613dcccf79e1 100644 >> --- a/drivers/counter/stm32-timer-cnt.c >> +++ b/drivers/counter/stm32-timer-cnt.c >> @@ -219,8 +219,8 @@ static ssize_t stm32_count_enable_write(struct counter_device *counter, >> >> if (enable) { >> regmap_read(priv->regmap, TIM_CR1, &cr1); >> - if (!(cr1 & TIM_CR1_CEN)) >> - clk_enable(priv->clk); >> + if (!(cr1 & TIM_CR1_CEN)) >> + clk_enable(priv->clk); >> >> regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, >> TIM_CR1_CEN); >> -- >> 2.20.1 > > Acked-by: William Breathitt Gray > > Fabrice, > > I noticed the TIM_CR1_CEN check is happening before the > regmap_update_bits call for the enable path, while the disable path does > the check after. Is this logic is correct. Hi William, In the disable path, things are done in the reverse order, purpose is to: - enable the clock before enabling the counter (CEN) - disable the clock after the counter has been disabled Current code also takes care of balancing clock enable/disable calls. BR, Fabrice > > William Breathitt Gray > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel