From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44836) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XLqki-0005I4-QW for qemu-devel@nongnu.org; Mon, 25 Aug 2014 05:39:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XLqkd-0000zZ-PD for qemu-devel@nongnu.org; Mon, 25 Aug 2014 05:39:52 -0400 Received: from edge10.ethz.ch ([82.130.75.186]:21860) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XLqkd-0000zT-FP for qemu-devel@nongnu.org; Mon, 25 Aug 2014 05:39:47 -0400 From: "Aggeler Fabian" Date: Mon, 25 Aug 2014 09:39:43 +0000 Message-ID: <79D27395-F9A7-484C-9274-9291594CD8E1@ethz.ch> References: <1408703392-23893-1-git-send-email-aggelerf@ethz.ch> <1408703392-23893-4-git-send-email-aggelerf@ethz.ch> <53FAFFD2.7070208@gmail.com> In-Reply-To: <53FAFFD2.7070208@gmail.com> Content-Language: en-US Content-Type: text/plain; charset="Windows-1252" Content-ID: <956CCCF6C6488446A4F14C14F479519C@intern.ethz.ch> Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [Qemu-devel] [PATCH 03/15] hw/intc/arm_gic: Add Security Extensions property List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Sergey Fedorov Cc: "peter.maydell@linaro.org" , "edgar.iglesias@gmail.com" , "qemu-devel@nongnu.org" , "christoffer.dall@linaro.org" , "greg.bellows@linaro.org" On 25 Aug 2014, at 11:20, Sergey Fedorov wrote: > On 22.08.2014 14:29, Fabian Aggeler wrote: >> The existing implementation does not support Security Extensions mention= ed >> in the GICv1 and GICv2 architecture specification. Security Extensions a= re >> not available on all GICs. This property makes it possible to enable Sec= urity Extensions. >>=20 >> It also makes GICD_TYPER/ICDICTR.SecurityExtn RAO for GICs which impleme= nt >> Security Extensions. >>=20 >> Signed-off-by: Fabian Aggeler >> --- >> hw/intc/arm_gic.c | 5 ++++- >> hw/intc/arm_gic_common.c | 1 + >> include/hw/intc/arm_gic_common.h | 1 + >> 3 files changed, 6 insertions(+), 1 deletion(-) >>=20 >> diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c >> index b27bd0e..75b5121 100644 >> --- a/hw/intc/arm_gic.c >> +++ b/hw/intc/arm_gic.c >> @@ -297,7 +297,10 @@ static uint32_t gic_dist_readb(void *opaque, hwaddr= offset) >> if (offset =3D=3D 0) >> return s->enabled; >> if (offset =3D=3D 4) >> - return ((s->num_irq / 32) - 1) | ((NUM_CPU(s) - 1) << 5); >> + /* Interrupt Controller Type Register */ >> + return ((s->num_irq / 32) - 1) >> + | ((NUM_CPU(s) - 1) << 5) >> + | (s->security_extn << 10); >> if (offset < 0x08) >> return 0; >> if (offset >=3D 0x80) { >> diff --git a/hw/intc/arm_gic_common.c b/hw/intc/arm_gic_common.c >> index 6d884ec..302a056 100644 >> --- a/hw/intc/arm_gic_common.c >> +++ b/hw/intc/arm_gic_common.c >> @@ -149,6 +149,7 @@ static Property arm_gic_common_properties[] =3D { >> * (Internally, 0xffffffff also indicates "not a GIC but an NVIC".) >> */ >> DEFINE_PROP_UINT32("revision", GICState, revision, 1), >> + DEFINE_PROP_UINT8("security-extn", GICState, security_extn, 0), >=20 > Why don't use bool type and DEFINE_PROP_BOOL for this field? >=20 > Regards, > Sergey. I used an uint8 to be able to shift the security_extn field in the return v= alue of the Interrupt Controller Type Register (see above).=20 @Edgar: how did you add Virtualization Extensions to the GIC implementation= ?=20 Does it make sense to combine the extensions into one QOM property? Best, Fabian >=20 >> DEFINE_PROP_END_OF_LIST(), >> }; >>=20 >> diff --git a/include/hw/intc/arm_gic_common.h b/include/hw/intc/arm_gic_= common.h >> index 01c6f24..4e25017 100644 >> --- a/include/hw/intc/arm_gic_common.h >> +++ b/include/hw/intc/arm_gic_common.h >> @@ -105,6 +105,7 @@ typedef struct GICState { >> MemoryRegion cpuiomem[GIC_NCPU + 1]; /* CPU interfaces */ >> uint32_t num_irq; >> uint32_t revision; >> + uint8_t security_extn; >> int dev_fd; /* kvm device fd if backed by kvm vgic support */ >> } GICState;