All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Souza, Jose" <jose.souza@intel.com>
To: "Mun, Gwan-gyeong" <gwan-gyeong.mun@intel.com>,
	"Manna, Animesh" <animesh.manna@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH v3 3/3] drm/i915/display/psr: Do full fetch when handling biplanar formats
Date: Wed, 22 Sep 2021 14:17:58 +0000	[thread overview]
Message-ID: <79ccb8201e40665cd783f7ea0227788dcd040254.camel@intel.com> (raw)
In-Reply-To: <c07a70bf-44f9-9ba4-61d3-c8b3459937f0@intel.com>

On Wed, 2021-09-22 at 15:08 +0300, Gwan-gyeong Mun wrote:
> 
> On 9/22/21 11:28 AM, Manna, Animesh wrote:
> > 
> > 
> > > -----Original Message-----
> > > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of José
> > > Roberto de Souza
> > > Sent: Tuesday, September 21, 2021 6:11 AM
> > > To: intel-gfx@lists.freedesktop.org
> > > Cc: Mun, Gwan-gyeong <gwan-gyeong.mun@intel.com>; Souza, Jose
> > > <jose.souza@intel.com>
> > > Subject: [Intel-gfx] [PATCH v3 3/3] drm/i915/display/psr: Do full fetch when
> > > handling biplanar formats
> > > 
> > > From: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> > > 
> > > We are still missing the PSR2 selective fetch handling of biplanar formats but
> > > until proper handle is added we can workaround it by doing full frames fetch
> > > when state has biplanar formats.
> > > 
> > > We need the second check because an update in a regular format could
> > > intersect with a biplanar plane that was not initialy part of the atomic commit.
> > > 
> > > Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > > ---
> > >   drivers/gpu/drm/i915/display/intel_psr.c | 11 ++++++++++-
> > >   1 file changed, 10 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > index 8ceb22c5a1a6b..e6a4c27975d8c 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > @@ -1601,9 +1601,13 @@ int intel_psr2_sel_fetch_update(struct
> > > intel_atomic_state *state,
> > >    * TODO: Not clear how to handle planes with negative
> > > position,
> > >    * also planes are not updated if they have a negative X
> > >    * position so for now doing a full update in this cases
> > > + *
> > > + * TODO: We are missing biplanar formats handling, until it is
> > > + * implemented it will send full frame updates.
> > >    */
> > >   if (new_plane_state->uapi.dst.y1 < 0 ||
> > > -    new_plane_state->uapi.dst.x1 < 0) {
> > > +    new_plane_state->uapi.dst.x1 < 0 ||
> > > +    new_plane_state->hw.fb->format->is_yuv) {
> > >   full_update = true;
> > >   break;
> > >   }
> > > @@ -1682,6 +1686,11 @@ int intel_psr2_sel_fetch_update(struct
> > > intel_atomic_state *state,
> > >   if (!drm_rect_intersect(&inter, &new_plane_state->uapi.dst))
> > >   continue;
> > > 
> > 
> > Code comment can be added here why we need this check again in same function.
> > Enabling full frame update is fine for me for planar format but not sure we need the 2nd check.
> > 
> That's right, we don't need to set this code here because we set 
> full_update above when " new_plane_state->hw.fb->format->is_yuv" is true.

We need it, the reason is on the commit description.

> 
> I will update this in the next version.
> 
> Thanks, Animesh.
> 
> > Regards,
> > Animesh
> > 
> > > +if (new_plane_state->hw.fb->format->is_yuv) {
> > > +full_update = true;
> > > +break;
> > > +}
> > > +
> > >   sel_fetch_area = &new_plane_state->psr2_sel_fetch_area;
> > >   sel_fetch_area->y1 = inter.y1 - new_plane_state->uapi.dst.y1;
> > >   sel_fetch_area->y2 = inter.y2 - new_plane_state->uapi.dst.y1;
> > > --
> > > 2.33.0
> > 


  reply	other threads:[~2021-09-22 14:18 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-21  0:41 [Intel-gfx] [PATCH v3 1/3] drm/i915/display: Disable frontbuffer rendering when PSR2 selective fetch is enabled José Roberto de Souza
2021-09-21  0:41 ` [Intel-gfx] [PATCH v3 2/3] drm/i915/display: Only keep PSR enabled if there is active planes José Roberto de Souza
2021-09-22 16:28   ` Gwan-gyeong Mun
2021-09-22 16:28   ` Gwan-gyeong Mun
2021-09-21  0:41 ` [Intel-gfx] [PATCH v3 3/3] drm/i915/display/psr: Do full fetch when handling biplanar formats José Roberto de Souza
2021-09-22  8:28   ` Manna, Animesh
2021-09-22 12:08     ` Gwan-gyeong Mun
2021-09-22 14:17       ` Souza, Jose [this message]
2021-09-21  1:05 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/3] drm/i915/display: Disable frontbuffer rendering when PSR2 selective fetch is enabled Patchwork
2021-09-21  1:06 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-09-21  1:36 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=79ccb8201e40665cd783f7ea0227788dcd040254.camel@intel.com \
    --to=jose.souza@intel.com \
    --cc=animesh.manna@intel.com \
    --cc=gwan-gyeong.mun@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.