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([2a02:810d:15c0:828:9e92:dca6:241d:71b6]) by smtp.gmail.com with ESMTPSA id l22-20020a170906079600b009333288d0ffsm13778637ejc.194.2023.03.28.04.22.27 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 28 Mar 2023 04:22:28 -0700 (PDT) Message-ID: <79d8044f-ce68-463e-66f7-8755e253bc99@linaro.org> Date: Tue, 28 Mar 2023 13:22:26 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.0 Subject: Re: [Patch v4 01/10] dt-bindings: memory: tegra: add bpmp ref in tegra234-mc node Content-Language: en-US To: Thierry Reding Cc: Sumit Gupta , treding@nvidia.com, dmitry.osipenko@collabora.com, viresh.kumar@linaro.org, rafael@kernel.org, jonathanh@nvidia.com, robh+dt@kernel.org, lpieralisi@kernel.org, linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, mmaddireddy@nvidia.com, kw@linux.com, bhelgaas@google.com, vidyas@nvidia.com, sanjayc@nvidia.com, ksitaraman@nvidia.com, ishah@nvidia.com, bbasu@nvidia.com References: <20230327161426.32639-1-sumitg@nvidia.com> <20230327161426.32639-2-sumitg@nvidia.com> <787f656a-223d-5eed-e311-9cc7a6c46452@linaro.org> From: Krzysztof Kozlowski In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org On 28/03/2023 12:48, Thierry Reding wrote: > On Tue, Mar 28, 2023 at 09:23:04AM +0200, Krzysztof Kozlowski wrote: >> On 27/03/2023 18:14, Sumit Gupta wrote: >>> For Tegra234, add the "nvidia,bpmp" property within the Memory >>> Controller (MC) node to reference BPMP node. This is needed in >>> the MC driver to pass the client info to the BPMP-FW when memory >>> interconnect support is available. >>> >>> Signed-off-by: Sumit Gupta >>> --- >>> .../bindings/memory-controllers/nvidia,tegra186-mc.yaml | 7 +++++++ >>> 1 file changed, 7 insertions(+) >>> >>> diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml >>> index 935d63d181d9..398d27bb2373 100644 >>> --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml >>> +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml >>> @@ -58,6 +58,10 @@ properties: >>> "#interconnect-cells": >>> const: 1 >>> >>> + nvidia,bpmp: >>> + $ref: /schemas/types.yaml#/definitions/phandle >>> + description: phandle of the node representing the BPMP >> >> Why do you need this multiple times? Both in parent and all external-mc >> children? > > We've had nvidia,bpmp in the external memory controller node since > basically the beginning because we've always needed it there. For newer > chips we now also need it for the memory controller. > > Ideally I think we would only have this in the MC and have the EMC > driver reference it via the EMC's parent (i.e. MC), but that would break > backwards-compatibility. Reaching into the EMC's DT node from the MC was > another option that we discussed internally, but it didn't look right > given how this is also needed by the MC. > > One thing we could potentially do is deprecate the nvidia,bpmp phandle > in the EMC and only keep it as a fallback in the drivers in case the > parent MC doesn't find it's own in the DT. Yes, deprecation would answer to my question. Best regards, Krzysztof