From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0C9E4C433DB for ; Wed, 24 Mar 2021 09:31:34 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A93A761A05 for ; Wed, 24 Mar 2021 09:31:33 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A93A761A05 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 247F36E998; Wed, 24 Mar 2021 09:31:32 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id A731E6E96F; Wed, 24 Mar 2021 09:31:30 +0000 (UTC) IronPort-SDR: hd/hJc4lFZhqIx7TCKrOsJkfOE38LRhhLKrruHIm4ddJTFg2nGXD50h4unR2s2ro8jjO0SJkJp EG9k/M4xMYbg== X-IronPort-AV: E=McAfee;i="6000,8403,9932"; a="190763690" X-IronPort-AV: E=Sophos;i="5.81,274,1610438400"; d="scan'208";a="190763690" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2021 02:31:29 -0700 IronPort-SDR: osiqi2rKkXCRXZhXogspV95daKSdAijpnuKsZ+nz+s8FyR7oI2YV8z7WIlChCAqAdakOcpkCH1 dPoFmCpsTDvw== X-IronPort-AV: E=Sophos;i="5.81,274,1610438400"; d="scan'208";a="408759122" Received: from gluca-mobl.ger.corp.intel.com (HELO [10.252.39.217]) ([10.252.39.217]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2021 02:31:28 -0700 Subject: Re: [Intel-gfx] [PATCH v9 68/70] drm/i915: Pass ww ctx to pin_map To: Matthew Auld References: <20210323155059.628690-1-maarten.lankhorst@linux.intel.com> <20210323155059.628690-69-maarten.lankhorst@linux.intel.com> From: Maarten Lankhorst Message-ID: <79e6f35b-0df6-0f45-e349-8f49529f7382@linux.intel.com> Date: Wed, 24 Mar 2021 10:31:26 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel Graphics Development , ML dri-devel Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Op 23-03-2021 om 18:30 schreef Matthew Auld: > On Tue, 23 Mar 2021 at 15:51, Maarten Lankhorst > wrote: >> This will allow us to explicitly pass the ww to pin_pages, >> when it starts taking it. >> >> This allows us to finally kill off the explicit passing of ww >> by retrieving it from the obj. >> >> Signed-off-by: Maarten Lankhorst >> --- >> .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 7 ++++--- >> drivers/gpu/drm/i915/gem/i915_gem_mman.c | 2 +- >> drivers/gpu/drm/i915/gem/i915_gem_object.h | 1 + >> .../gpu/drm/i915/gem/i915_gem_object_blt.c | 4 ++-- >> drivers/gpu/drm/i915/gem/i915_gem_pages.c | 21 +++++++++++++++---- >> .../drm/i915/gem/selftests/i915_gem_context.c | 8 ++++--- >> .../drm/i915/gem/selftests/i915_gem_dmabuf.c | 2 +- >> drivers/gpu/drm/i915/gt/gen7_renderclear.c | 2 +- >> drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +- >> drivers/gpu/drm/i915/gt/intel_engine_pm.c | 2 +- >> drivers/gpu/drm/i915/gt/intel_lrc.c | 4 ++-- >> drivers/gpu/drm/i915/gt/intel_renderstate.c | 2 +- >> drivers/gpu/drm/i915/gt/intel_ring.c | 2 +- >> .../gpu/drm/i915/gt/intel_ring_submission.c | 2 +- >> drivers/gpu/drm/i915/gt/intel_timeline.c | 7 ++++--- >> drivers/gpu/drm/i915/gt/intel_timeline.h | 3 ++- >> drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 +- >> drivers/gpu/drm/i915/gt/mock_engine.c | 2 +- >> drivers/gpu/drm/i915/gt/selftest_lrc.c | 2 +- >> drivers/gpu/drm/i915/gt/selftest_rps.c | 10 ++++----- >> .../gpu/drm/i915/gt/selftest_workarounds.c | 6 +++--- >> drivers/gpu/drm/i915/gvt/cmd_parser.c | 4 ++-- >> drivers/gpu/drm/i915/i915_perf.c | 4 ++-- >> drivers/gpu/drm/i915/selftests/igt_spinner.c | 2 +- >> 24 files changed, 60 insertions(+), 43 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c >> index dcfcae9c841b..73dd2a7673f5 100644 >> --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c >> +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c >> @@ -1340,7 +1340,7 @@ static int __reloc_gpu_alloc(struct i915_execbuffer *eb, >> if (err) >> goto err_pool; >> >> - cmd = i915_gem_object_pin_map(pool->obj, pool->type); >> + cmd = i915_gem_object_pin_map(pool->obj, &eb->ww, pool->type); >> if (IS_ERR(cmd)) { >> err = PTR_ERR(cmd); >> goto err_pool; >> @@ -2489,7 +2489,8 @@ static int eb_parse_pipeline(struct i915_execbuffer *eb, >> goto err_shadow; >> } >> >> - pw->shadow_map = i915_gem_object_pin_map(shadow->obj, I915_MAP_WB); >> + pw->shadow_map = i915_gem_object_pin_map(shadow->obj, &eb->ww, >> + I915_MAP_WB); >> if (IS_ERR(pw->shadow_map)) { >> err = PTR_ERR(pw->shadow_map); >> goto err_trampoline; >> @@ -2500,7 +2501,7 @@ static int eb_parse_pipeline(struct i915_execbuffer *eb, >> >> pw->batch_map = ERR_PTR(-ENODEV); >> if (needs_clflush && i915_has_memcpy_from_wc()) >> - pw->batch_map = i915_gem_object_pin_map(batch, I915_MAP_WC); >> + pw->batch_map = i915_gem_object_pin_map(batch, &eb->ww, I915_MAP_WC); >> >> if (IS_ERR(pw->batch_map)) { >> err = i915_gem_object_pin_pages(batch); >> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c >> index 2561a2f1e54f..edac8ee3be9a 100644 >> --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c >> +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c >> @@ -439,7 +439,7 @@ vm_access(struct vm_area_struct *area, unsigned long addr, >> goto out; >> >> /* As this is primarily for debugging, let's focus on simplicity */ >> - vaddr = i915_gem_object_pin_map(obj, I915_MAP_FORCE_WC); >> + vaddr = i915_gem_object_pin_map(obj, &ww, I915_MAP_FORCE_WC); >> if (IS_ERR(vaddr)) { >> err = PTR_ERR(vaddr); >> goto out; >> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h >> index 1a8ec4035112..9bd9b47dcc8d 100644 >> --- a/drivers/gpu/drm/i915/gem/i915_gem_object.h >> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h >> @@ -450,6 +450,7 @@ void i915_gem_object_writeback(struct drm_i915_gem_object *obj); >> * ERR_PTR() on error. >> */ >> void *__must_check i915_gem_object_pin_map(struct drm_i915_gem_object *obj, >> + struct i915_gem_ww_ctx *ww, >> enum i915_map_type type); >> >> void *__must_check i915_gem_object_pin_map_unlocked(struct drm_i915_gem_object *obj, >> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c >> index df8e8c18c6c9..fae18622d2da 100644 >> --- a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c >> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c >> @@ -58,7 +58,7 @@ struct i915_vma *intel_emit_vma_fill_blt(struct intel_context *ce, >> /* we pinned the pool, mark it as such */ >> intel_gt_buffer_pool_mark_used(pool); >> >> - cmd = i915_gem_object_pin_map(pool->obj, pool->type); >> + cmd = i915_gem_object_pin_map(pool->obj, ww, pool->type); >> if (IS_ERR(cmd)) { >> err = PTR_ERR(cmd); >> goto out_unpin; >> @@ -283,7 +283,7 @@ struct i915_vma *intel_emit_vma_copy_blt(struct intel_context *ce, >> /* we pinned the pool, mark it as such */ >> intel_gt_buffer_pool_mark_used(pool); >> >> - cmd = i915_gem_object_pin_map(pool->obj, pool->type); >> + cmd = i915_gem_object_pin_map(pool->obj, ww, pool->type); >> if (IS_ERR(cmd)) { >> err = PTR_ERR(cmd); >> goto out_unpin; >> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c >> index 58e222030e10..232832398457 100644 >> --- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c >> +++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c >> @@ -341,6 +341,7 @@ static void *i915_gem_object_map_pfn(struct drm_i915_gem_object *obj, >> >> /* get, pin, and map the pages of the object into kernel space */ >> void *i915_gem_object_pin_map(struct drm_i915_gem_object *obj, >> + struct i915_gem_ww_ctx *ww, >> enum i915_map_type type) >> { >> enum i915_map_type has_type; >> @@ -408,13 +409,25 @@ void *i915_gem_object_pin_map(struct drm_i915_gem_object *obj, >> void *i915_gem_object_pin_map_unlocked(struct drm_i915_gem_object *obj, >> enum i915_map_type type) >> { >> + struct i915_gem_ww_ctx ww; >> void *ret; >> + int err; >> >> - i915_gem_object_lock(obj, NULL); >> - ret = i915_gem_object_pin_map(obj, type); >> - i915_gem_object_unlock(obj); >> + i915_gem_ww_ctx_init(&ww, true); >> +retry: >> + err = i915_gem_object_lock(obj, &ww); >> + if (!err) >> + ret = i915_gem_object_pin_map(obj, &ww, type); >> + if (IS_ERR(ret)) > This looks a little dodgy, since ret might not be initialized here, > say if we encounter an error when grabbing the lock? > > Also maybe s/ret/ptr/? Seeing ret makes me think it's a plain integer. Ack, good catch! Will send a new version to fix it. ~Maarten _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2B1AFC433C1 for ; Wed, 24 Mar 2021 09:31:32 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CEDEC619FF for ; Wed, 24 Mar 2021 09:31:31 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org CEDEC619FF Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 692BD6E96F; Wed, 24 Mar 2021 09:31:31 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id A731E6E96F; Wed, 24 Mar 2021 09:31:30 +0000 (UTC) IronPort-SDR: hd/hJc4lFZhqIx7TCKrOsJkfOE38LRhhLKrruHIm4ddJTFg2nGXD50h4unR2s2ro8jjO0SJkJp EG9k/M4xMYbg== X-IronPort-AV: E=McAfee;i="6000,8403,9932"; a="190763690" X-IronPort-AV: E=Sophos;i="5.81,274,1610438400"; d="scan'208";a="190763690" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2021 02:31:29 -0700 IronPort-SDR: osiqi2rKkXCRXZhXogspV95daKSdAijpnuKsZ+nz+s8FyR7oI2YV8z7WIlChCAqAdakOcpkCH1 dPoFmCpsTDvw== X-IronPort-AV: E=Sophos;i="5.81,274,1610438400"; d="scan'208";a="408759122" Received: from gluca-mobl.ger.corp.intel.com (HELO [10.252.39.217]) ([10.252.39.217]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2021 02:31:28 -0700 To: Matthew Auld References: <20210323155059.628690-1-maarten.lankhorst@linux.intel.com> <20210323155059.628690-69-maarten.lankhorst@linux.intel.com> From: Maarten Lankhorst Message-ID: <79e6f35b-0df6-0f45-e349-8f49529f7382@linux.intel.com> Date: Wed, 24 Mar 2021 10:31:26 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US Subject: Re: [Intel-gfx] [PATCH v9 68/70] drm/i915: Pass ww ctx to pin_map X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel Graphics Development , ML dri-devel Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Op 23-03-2021 om 18:30 schreef Matthew Auld: > On Tue, 23 Mar 2021 at 15:51, Maarten Lankhorst > wrote: >> This will allow us to explicitly pass the ww to pin_pages, >> when it starts taking it. >> >> This allows us to finally kill off the explicit passing of ww >> by retrieving it from the obj. >> >> Signed-off-by: Maarten Lankhorst >> --- >> .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 7 ++++--- >> drivers/gpu/drm/i915/gem/i915_gem_mman.c | 2 +- >> drivers/gpu/drm/i915/gem/i915_gem_object.h | 1 + >> .../gpu/drm/i915/gem/i915_gem_object_blt.c | 4 ++-- >> drivers/gpu/drm/i915/gem/i915_gem_pages.c | 21 +++++++++++++++---- >> .../drm/i915/gem/selftests/i915_gem_context.c | 8 ++++--- >> .../drm/i915/gem/selftests/i915_gem_dmabuf.c | 2 +- >> drivers/gpu/drm/i915/gt/gen7_renderclear.c | 2 +- >> drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +- >> drivers/gpu/drm/i915/gt/intel_engine_pm.c | 2 +- >> drivers/gpu/drm/i915/gt/intel_lrc.c | 4 ++-- >> drivers/gpu/drm/i915/gt/intel_renderstate.c | 2 +- >> drivers/gpu/drm/i915/gt/intel_ring.c | 2 +- >> .../gpu/drm/i915/gt/intel_ring_submission.c | 2 +- >> drivers/gpu/drm/i915/gt/intel_timeline.c | 7 ++++--- >> drivers/gpu/drm/i915/gt/intel_timeline.h | 3 ++- >> drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 +- >> drivers/gpu/drm/i915/gt/mock_engine.c | 2 +- >> drivers/gpu/drm/i915/gt/selftest_lrc.c | 2 +- >> drivers/gpu/drm/i915/gt/selftest_rps.c | 10 ++++----- >> .../gpu/drm/i915/gt/selftest_workarounds.c | 6 +++--- >> drivers/gpu/drm/i915/gvt/cmd_parser.c | 4 ++-- >> drivers/gpu/drm/i915/i915_perf.c | 4 ++-- >> drivers/gpu/drm/i915/selftests/igt_spinner.c | 2 +- >> 24 files changed, 60 insertions(+), 43 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c >> index dcfcae9c841b..73dd2a7673f5 100644 >> --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c >> +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c >> @@ -1340,7 +1340,7 @@ static int __reloc_gpu_alloc(struct i915_execbuffer *eb, >> if (err) >> goto err_pool; >> >> - cmd = i915_gem_object_pin_map(pool->obj, pool->type); >> + cmd = i915_gem_object_pin_map(pool->obj, &eb->ww, pool->type); >> if (IS_ERR(cmd)) { >> err = PTR_ERR(cmd); >> goto err_pool; >> @@ -2489,7 +2489,8 @@ static int eb_parse_pipeline(struct i915_execbuffer *eb, >> goto err_shadow; >> } >> >> - pw->shadow_map = i915_gem_object_pin_map(shadow->obj, I915_MAP_WB); >> + pw->shadow_map = i915_gem_object_pin_map(shadow->obj, &eb->ww, >> + I915_MAP_WB); >> if (IS_ERR(pw->shadow_map)) { >> err = PTR_ERR(pw->shadow_map); >> goto err_trampoline; >> @@ -2500,7 +2501,7 @@ static int eb_parse_pipeline(struct i915_execbuffer *eb, >> >> pw->batch_map = ERR_PTR(-ENODEV); >> if (needs_clflush && i915_has_memcpy_from_wc()) >> - pw->batch_map = i915_gem_object_pin_map(batch, I915_MAP_WC); >> + pw->batch_map = i915_gem_object_pin_map(batch, &eb->ww, I915_MAP_WC); >> >> if (IS_ERR(pw->batch_map)) { >> err = i915_gem_object_pin_pages(batch); >> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c >> index 2561a2f1e54f..edac8ee3be9a 100644 >> --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c >> +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c >> @@ -439,7 +439,7 @@ vm_access(struct vm_area_struct *area, unsigned long addr, >> goto out; >> >> /* As this is primarily for debugging, let's focus on simplicity */ >> - vaddr = i915_gem_object_pin_map(obj, I915_MAP_FORCE_WC); >> + vaddr = i915_gem_object_pin_map(obj, &ww, I915_MAP_FORCE_WC); >> if (IS_ERR(vaddr)) { >> err = PTR_ERR(vaddr); >> goto out; >> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h >> index 1a8ec4035112..9bd9b47dcc8d 100644 >> --- a/drivers/gpu/drm/i915/gem/i915_gem_object.h >> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h >> @@ -450,6 +450,7 @@ void i915_gem_object_writeback(struct drm_i915_gem_object *obj); >> * ERR_PTR() on error. >> */ >> void *__must_check i915_gem_object_pin_map(struct drm_i915_gem_object *obj, >> + struct i915_gem_ww_ctx *ww, >> enum i915_map_type type); >> >> void *__must_check i915_gem_object_pin_map_unlocked(struct drm_i915_gem_object *obj, >> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c >> index df8e8c18c6c9..fae18622d2da 100644 >> --- a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c >> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c >> @@ -58,7 +58,7 @@ struct i915_vma *intel_emit_vma_fill_blt(struct intel_context *ce, >> /* we pinned the pool, mark it as such */ >> intel_gt_buffer_pool_mark_used(pool); >> >> - cmd = i915_gem_object_pin_map(pool->obj, pool->type); >> + cmd = i915_gem_object_pin_map(pool->obj, ww, pool->type); >> if (IS_ERR(cmd)) { >> err = PTR_ERR(cmd); >> goto out_unpin; >> @@ -283,7 +283,7 @@ struct i915_vma *intel_emit_vma_copy_blt(struct intel_context *ce, >> /* we pinned the pool, mark it as such */ >> intel_gt_buffer_pool_mark_used(pool); >> >> - cmd = i915_gem_object_pin_map(pool->obj, pool->type); >> + cmd = i915_gem_object_pin_map(pool->obj, ww, pool->type); >> if (IS_ERR(cmd)) { >> err = PTR_ERR(cmd); >> goto out_unpin; >> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c >> index 58e222030e10..232832398457 100644 >> --- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c >> +++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c >> @@ -341,6 +341,7 @@ static void *i915_gem_object_map_pfn(struct drm_i915_gem_object *obj, >> >> /* get, pin, and map the pages of the object into kernel space */ >> void *i915_gem_object_pin_map(struct drm_i915_gem_object *obj, >> + struct i915_gem_ww_ctx *ww, >> enum i915_map_type type) >> { >> enum i915_map_type has_type; >> @@ -408,13 +409,25 @@ void *i915_gem_object_pin_map(struct drm_i915_gem_object *obj, >> void *i915_gem_object_pin_map_unlocked(struct drm_i915_gem_object *obj, >> enum i915_map_type type) >> { >> + struct i915_gem_ww_ctx ww; >> void *ret; >> + int err; >> >> - i915_gem_object_lock(obj, NULL); >> - ret = i915_gem_object_pin_map(obj, type); >> - i915_gem_object_unlock(obj); >> + i915_gem_ww_ctx_init(&ww, true); >> +retry: >> + err = i915_gem_object_lock(obj, &ww); >> + if (!err) >> + ret = i915_gem_object_pin_map(obj, &ww, type); >> + if (IS_ERR(ret)) > This looks a little dodgy, since ret might not be initialized here, > say if we encounter an error when grabbing the lock? > > Also maybe s/ret/ptr/? Seeing ret makes me think it's a plain integer. Ack, good catch! Will send a new version to fix it. ~Maarten _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx