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Thread-Topic: system hang on start-up (mlx5?) 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charset="us-ascii" Content-ID: <3E0F35BDEEEDEA4C95C75B81F592DFB6@namprd10.prod.outlook.com> Content-Transfer-Encoding: quoted-printable Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-AntiSpam-ExternalHop-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-ExternalHop-MessageData-0: TUjYXpsIechSX0JK0ZVIePT+tJVKcgNgV+tHnvMsX2e/qWVFSjUWqnKCSSsxbmFYri3gNA8kwkzgCE9ScMwk73oD45zj1mPOULtdKHvqOCAZ8bfUhwDDUgLBjwzxsom6aLGUVQFZ2fMIMieFHoYfTd+l7/sZ/N754FTBPE8SEPKXI4kFEvGXaZkRQGK+wn3OqS8AabJn5kJo3l3YomLvnmkF0y7HS8/E9cvIiTMkYvtsH1jDjA3h8/Hwcg5j9nN+Jbyci6ypoqIlFILaIB5kFz931XmrksIknbA9tV/X92IdcH61ed61tytglKnOnE8yPTDRZRZHM9aJekG9V6gT+/9ORr2HTPHKKq7P9CwJgbnk0FSJ57z32rIGqx8McaCwGeVBSUZHW8v/4oNmc+FzaoMcIfizo88wqjy7syE2AOQ/4b+PxhI/7zA0CxXNgNJnJUF8GEpjvZN5K3OiIU36cX01lbtScJaFE/0a4Yoj0tUmaG38JlPQRlmILyLSxp4MVOQ+d1lDBVIMJqpDQFOX3IF9ouEwBQH6eeALzg8DPqJCrCcOy6f9tfFVP2mdY/iXIS6tmADU2L9FAt93VTA8pW5DyTvalcS9DIM7zKlO1mJIKW8LO5FF2wN4dN06+ps26BHcskZGV38HqsBYRjfUBOxrbdNBoCK8eB+n8bgPP4aAaw1XsisGIP5qvrulDQLGt1P6X6a/0fcqsFOr3YswtZxom8YROr6a9op3nKkVhK3RI9TiLMznSpNe8StrzdfOybLvV0I2hw2l/jZI80puEKtbbQuzXLHzFAbE9SooyE4mPeHHLUDoYiHF0d2So/6Msrfn67JSILTCudcAqG5JKn8e0yGDzlIULZXXCwlFBpf6Xsk5h8/MZrpLw4hA2ViOd7YortwVtGsCg2iMrhwhZg== X-OriginatorOrg: oracle.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BN0PR10MB5128.namprd10.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6ac50602-6cec-42d0-6b67-08db620834f9 X-MS-Exchange-CrossTenant-originalarrivaltime: 31 May 2023 18:52:39.0473 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 4e2c6054-71cb-48f1-bd6c-3a9705aca71b X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: BbrLqHesGfOWyVLzgEcpV4NqiqilHmxr0bqEsyK2Uz/OWpGOu68fnQu69glGPO7YwbqlAzWpl7srOXc4N4KkGQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR10MB7190 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-31_14,2023-05-31_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 spamscore=0 malwarescore=0 phishscore=0 bulkscore=0 adultscore=0 mlxscore=0 suspectscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305310159 X-Proofpoint-ORIG-GUID: kKvEbyRzhFRcbDZOOyPuj0S3YXCnE3o4 X-Proofpoint-GUID: kKvEbyRzhFRcbDZOOyPuj0S3YXCnE3o4 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H5,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net > On May 31, 2023, at 1:11 PM, Thomas Gleixner wrote: >=20 > On Wed, May 31 2023 at 15:06, Chuck Lever III wrote: >>> On May 31, 2023, at 10:43 AM, Thomas Gleixner wrot= e: >>>=20 >>> mlx5_irq_alloc(af_desc) >>> pci_msix_alloc_irq_at(af_desc) >>> msi_domain_alloc_irq_at(af_desc) >>> __msi_domain_alloc_irqs(af_desc) >>> 1) msidesc->affinity =3D kmemdup(af_desc); >>> __irq_domain_alloc_irqs() >>> __irq_domain_alloc_irqs(aff=3Dmsidesc->affinity) >>> irq_domain_alloc_irqs_locked(aff) >>> irq_domain_alloc_irqs_locked(aff) >>> irq_domain_alloc_descs(aff) >>> alloc_desc(mask=3D&aff->mask) >>> desc_smp_init(mask) >>> 2) cpumask_copy(desc->irq_common_data.affinity, mask= ); >>> irq_domain_alloc_irqs_hierarchy() >>> msi_domain_alloc() >>> intel_irq_remapping_alloc() >>> x86_vector_alloc_irqs() >>=20 >> It is x86_vector_alloc_irqs() where the struct irq_data is >> fabricated that ends up in irq_matrix_reserve_managed(). >=20 > Kinda fabricated :) >=20 > irqd =3D irq_domain_get_irq_data(domain, virq + i); >=20 > Thats finding the irqdata which is associated to the vector domain. That > has been allocated earlier. The affinity mask is retrieved via: >=20 > const struct cpumask *affmsk =3D irq_data_get_affinity_mask(irqd); >=20 > which does: >=20 > return irqd->common->affinity; >=20 > irqd->common points to desc->irq_common_data. The affinity there was > copied in #2 above. >=20 >>> This also ends up in the wrong place. That mlx code does: >>>=20 >>> af_desc.is_managed =3D false; >>>=20 >>> but the allocation ends up allocating a managed vector. >>=20 >> That line was changed in 6.4-rc4 to address another bug, >> and it avoids the crash by not calling into the misbehaving >> code. It doesn't address the mlx5_core initialization issue >> though, because as I said before, execution continues and >> crashes in a similar scenario later on. >=20 > Ok. >=20 >> On my system, I've reverted that fix: >>=20 >> - af_desc.is_managed =3D false; >> + af_desc.is_managed =3D 1; >>=20 >> so that we can continue debugging this crash. >=20 > Ah. >=20 >>> Can you please instrument this along the call chain so we can see where >>> or at least when this gets corrupted? Please print the relevant pointer >>> addresses too so we can see whether that's consistent or not. >>=20 >> I will continue working on this today. >>> But that's just the symptom, not the root cause. That code is perfectly >>> fine when all callers use the proper cpumask functions. >>=20 >> Agreed: we're crashing here because of the extra bits >> in the affinity mask, but those bits should not be set >> in the first place. >=20 > Correct. >=20 >> I wasn't sure if for_each_cpu() was supposed to iterate >> into non-present CPUs -- and I guess the answer >> is yes, it will iterate the full length of the mask. >> The caller is responsible for ensuring the mask is valid. >=20 > Yes, that's the assumption of this constant optimization for the small > number of CPUs case. All other cases use nr_cpu_ids as limit and won't > go into non-possible CPUs. I didn't spot it yesterday night either. This addresses the problem for me with both is_managed =3D 1 and is_managed =3D false: diff --git a/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c b/drivers/ne= t/ethernet/mellanox/mlx5/core/pci_irq.c index db5687d9fec9..bcf5df316c8f 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c @@ -570,11 +570,11 @@ int mlx5_irqs_request_vectors(struct mlx5_core_dev *d= ev, u16 *cpus, int nirqs, af_desc.is_managed =3D false; for (i =3D 0; i < nirqs; i++) { + cpumask_clear(&af_desc.mask); cpumask_set_cpu(cpus[i], &af_desc.mask); irq =3D mlx5_irq_request(dev, i + 1, &af_desc, rmap); if (IS_ERR(irq)) break; - cpumask_clear(&af_desc.mask); irqs[i] =3D irq; } If you agree this looks reasonable, I can package it with a proper patch description and send it to Eli and Saeed. -- Chuck Lever