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* [PATCH] powerpc/85xx: add host-pci(e) bridge only for RC
@ 2011-04-27  5:35 Prabhakar Kushwaha
  2011-05-19  6:25 ` Kumar Gala
  0 siblings, 1 reply; 4+ messages in thread
From: Prabhakar Kushwaha @ 2011-04-27  5:35 UTC (permalink / raw)
  To: linuxppc-dev; +Cc: meet2prabhu, Vivek Mahajan, Prabhakar Kushwaha

FSL PCIe controller can act as agent(EP) or host(RC).
Under Agent(EP) mode they are configured via Host. So it is not required to add
with the PCI(e) sub-system.

Add and configure PCIe controller only for RC mode.

Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
---
 Based upon git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git(branch master)

 arch/powerpc/sysdev/fsl_pci.c |   14 ++++++++++++++
 1 files changed, 14 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 68ca929..87ac11b 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -323,6 +323,7 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
 	struct pci_controller *hose;
 	struct resource rsrc;
 	const int *bus_range;
+	u8 is_agent;
 
 	if (!of_device_is_available(dev)) {
 		pr_warning("%s: disabled\n", dev->full_name);
@@ -353,6 +354,19 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
 
 	setup_indirect_pci(hose, rsrc.start, rsrc.start + 0x4,
 		PPC_INDIRECT_TYPE_BIG_ENDIAN);
+
+	early_read_config_byte(hose, 0, 0, PCI_HEADER_TYPE, &is_agent);
+	if ((is_agent & 0x7f) == PCI_HEADER_TYPE_NORMAL) {
+		u32 temp;
+
+		temp = (u32)hose->cfg_data & ~PAGE_MASK;
+		if (((u32)hose->cfg_data & PAGE_MASK) != (u32)hose->cfg_addr)
+			iounmap(hose->cfg_data - temp);
+		iounmap(hose->cfg_addr);
+		pcibios_free_controller(hose);
+		return 0;
+	}
+
 	setup_pci_cmd(hose);
 
 	/* check PCI express link status */
-- 
1.7.3

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH] powerpc/85xx: add host-pci(e) bridge only for RC
  2011-04-27  5:35 [PATCH] powerpc/85xx: add host-pci(e) bridge only for RC Prabhakar Kushwaha
@ 2011-05-19  6:25 ` Kumar Gala
  2011-05-19 11:25   ` Kushwaha Prabhakar-B32579
  0 siblings, 1 reply; 4+ messages in thread
From: Kumar Gala @ 2011-05-19  6:25 UTC (permalink / raw)
  To: Prabhakar Kushwaha; +Cc: meet2prabhu, linuxppc-dev, Vivek Mahajan


On Apr 27, 2011, at 12:35 AM, Prabhakar Kushwaha wrote:

> FSL PCIe controller can act as agent(EP) or host(RC).
> Under Agent(EP) mode they are configured via Host. So it is not =
required to add
> with the PCI(e) sub-system.
>=20
> Add and configure PCIe controller only for RC mode.
>=20
> Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
> ---
> Based upon =
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git(branc=
h master)
>=20
> arch/powerpc/sysdev/fsl_pci.c |   14 ++++++++++++++
> 1 files changed, 14 insertions(+), 0 deletions(-)
>=20
> diff --git a/arch/powerpc/sysdev/fsl_pci.c =
b/arch/powerpc/sysdev/fsl_pci.c
> index 68ca929..87ac11b 100644
> --- a/arch/powerpc/sysdev/fsl_pci.c
> +++ b/arch/powerpc/sysdev/fsl_pci.c
> @@ -323,6 +323,7 @@ int __init fsl_add_bridge(struct device_node *dev, =
int is_primary)
> 	struct pci_controller *hose;
> 	struct resource rsrc;
> 	const int *bus_range;
> +	u8 is_agent;
>=20
> 	if (!of_device_is_available(dev)) {
> 		pr_warning("%s: disabled\n", dev->full_name);
> @@ -353,6 +354,19 @@ int __init fsl_add_bridge(struct device_node =
*dev, int is_primary)
>=20
> 	setup_indirect_pci(hose, rsrc.start, rsrc.start + 0x4,
> 		PPC_INDIRECT_TYPE_BIG_ENDIAN);
> +
> +	early_read_config_byte(hose, 0, 0, PCI_HEADER_TYPE, &is_agent);

Why are we looking at PCI_HEADER_TYPE?  We should look at =
PCI_CLASS_PROG.

> +	if ((is_agent & 0x7f) =3D=3D PCI_HEADER_TYPE_NORMAL) {
> +		u32 temp;
> +
> +		temp =3D (u32)hose->cfg_data & ~PAGE_MASK;
> +		if (((u32)hose->cfg_data & PAGE_MASK) !=3D =
(u32)hose->cfg_addr)
> +			iounmap(hose->cfg_data - temp);
> +		iounmap(hose->cfg_addr);
> +		pcibios_free_controller(hose);
> +		return 0;
> +	}
> +
> 	setup_pci_cmd(hose);
>=20
> 	/* check PCI express link status */
> --=20
> 1.7.3
>=20
>=20
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev

^ permalink raw reply	[flat|nested] 4+ messages in thread

* RE: [PATCH] powerpc/85xx: add host-pci(e) bridge only for RC
  2011-05-19  6:25 ` Kumar Gala
@ 2011-05-19 11:25   ` Kushwaha Prabhakar-B32579
  2011-05-19 13:22     ` Kumar Gala
  0 siblings, 1 reply; 4+ messages in thread
From: Kushwaha Prabhakar-B32579 @ 2011-05-19 11:25 UTC (permalink / raw)
  To: Kumar Gala; +Cc: meet2prabhu, linuxppc-dev, Vivek Mahajan

Hello Kumar,
  Please find my answer in-lined

> -----Original Message-----
> From: Kumar Gala [mailto:galak@kernel.crashing.org]
> Sent: Thursday, May 19, 2011 11:55 AM
> To: Kushwaha Prabhakar-B32579
> Cc: linuxppc-dev@lists.ozlabs.org; meet2prabhu@gmail.com; Vivek Mahajan
> Subject: Re: [PATCH] powerpc/85xx: add host-pci(e) bridge only for RC
>=20
>=20
> On Apr 27, 2011, at 12:35 AM, Prabhakar Kushwaha wrote:
>=20
> > FSL PCIe controller can act as agent(EP) or host(RC).
> > Under Agent(EP) mode they are configured via Host. So it is not
> > required to add with the PCI(e) sub-system.
> >
> > Add and configure PCIe controller only for RC mode.
> >
> > Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
> > Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
> > ---
> > Based upon
> > git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git(b
> > ranch master)
> >
> > arch/powerpc/sysdev/fsl_pci.c |   14 ++++++++++++++
> > 1 files changed, 14 insertions(+), 0 deletions(-)
> >
> > diff --git a/arch/powerpc/sysdev/fsl_pci.c
> > b/arch/powerpc/sysdev/fsl_pci.c index 68ca929..87ac11b 100644
> > --- a/arch/powerpc/sysdev/fsl_pci.c
> > +++ b/arch/powerpc/sysdev/fsl_pci.c
> > @@ -323,6 +323,7 @@ int __init fsl_add_bridge(struct device_node *dev,
> int is_primary)
> > 	struct pci_controller *hose;
> > 	struct resource rsrc;
> > 	const int *bus_range;
> > +	u8 is_agent;
> >
> > 	if (!of_device_is_available(dev)) {
> > 		pr_warning("%s: disabled\n", dev->full_name); @@ -353,6
> +354,19 @@
> > int __init fsl_add_bridge(struct device_node *dev, int is_primary)
> >
> > 	setup_indirect_pci(hose, rsrc.start, rsrc.start + 0x4,
> > 		PPC_INDIRECT_TYPE_BIG_ENDIAN);
> > +
> > +	early_read_config_byte(hose, 0, 0, PCI_HEADER_TYPE, &is_agent);
>=20
> Why are we looking at PCI_HEADER_TYPE?  We should look at PCI_CLASS_PROG.

I think both are OK. We can check for any one.=20
Is there any problem with PCI_HEADER_TYPE?


> > +	if ((is_agent & 0x7f) =3D=3D PCI_HEADER_TYPE_NORMAL) {
> > +		u32 temp;
> > +
> > +		temp =3D (u32)hose->cfg_data & ~PAGE_MASK;
> > +		if (((u32)hose->cfg_data & PAGE_MASK) !=3D (u32)hose->cfg_addr)
> > +			iounmap(hose->cfg_data - temp);
> > +		iounmap(hose->cfg_addr);
> > +		pcibios_free_controller(hose);
> > +		return 0;
> > +	}
> > +
> > 	setup_pci_cmd(hose);
> >
> > 	/* check PCI express link status */
> > --
> > 1.7.3
> >
> >
> > _______________________________________________
> > Linuxppc-dev mailing list
> > Linuxppc-dev@lists.ozlabs.org
> > https://lists.ozlabs.org/listinfo/linuxppc-dev
>=20

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH] powerpc/85xx: add host-pci(e) bridge only for RC
  2011-05-19 11:25   ` Kushwaha Prabhakar-B32579
@ 2011-05-19 13:22     ` Kumar Gala
  0 siblings, 0 replies; 4+ messages in thread
From: Kumar Gala @ 2011-05-19 13:22 UTC (permalink / raw)
  To: Kushwaha Prabhakar-B32579; +Cc: meet2prabhu, linuxppc-dev, Vivek Mahajan


On May 19, 2011, at 6:25 AM, Kushwaha Prabhakar-B32579 wrote:

> Hello Kumar,
>  Please find my answer in-lined
>=20
>> -----Original Message-----
>> From: Kumar Gala [mailto:galak@kernel.crashing.org]
>> Sent: Thursday, May 19, 2011 11:55 AM
>> To: Kushwaha Prabhakar-B32579
>> Cc: linuxppc-dev@lists.ozlabs.org; meet2prabhu@gmail.com; Vivek =
Mahajan
>> Subject: Re: [PATCH] powerpc/85xx: add host-pci(e) bridge only for RC
>>=20
>>=20
>> On Apr 27, 2011, at 12:35 AM, Prabhakar Kushwaha wrote:
>>=20
>>> FSL PCIe controller can act as agent(EP) or host(RC).
>>> Under Agent(EP) mode they are configured via Host. So it is not
>>> required to add with the PCI(e) sub-system.
>>>=20
>>> Add and configure PCIe controller only for RC mode.
>>>=20
>>> Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
>>> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
>>> ---
>>> Based upon
>>> =
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git(b
>>> ranch master)
>>>=20
>>> arch/powerpc/sysdev/fsl_pci.c |   14 ++++++++++++++
>>> 1 files changed, 14 insertions(+), 0 deletions(-)
>>>=20
>>> diff --git a/arch/powerpc/sysdev/fsl_pci.c
>>> b/arch/powerpc/sysdev/fsl_pci.c index 68ca929..87ac11b 100644
>>> --- a/arch/powerpc/sysdev/fsl_pci.c
>>> +++ b/arch/powerpc/sysdev/fsl_pci.c
>>> @@ -323,6 +323,7 @@ int __init fsl_add_bridge(struct device_node =
*dev,
>> int is_primary)
>>> 	struct pci_controller *hose;
>>> 	struct resource rsrc;
>>> 	const int *bus_range;
>>> +	u8 is_agent;
>>>=20
>>> 	if (!of_device_is_available(dev)) {
>>> 		pr_warning("%s: disabled\n", dev->full_name); @@ -353,6
>> +354,19 @@
>>> int __init fsl_add_bridge(struct device_node *dev, int is_primary)
>>>=20
>>> 	setup_indirect_pci(hose, rsrc.start, rsrc.start + 0x4,
>>> 		PPC_INDIRECT_TYPE_BIG_ENDIAN);
>>> +
>>> +	early_read_config_byte(hose, 0, 0, PCI_HEADER_TYPE, &is_agent);
>>=20
>> Why are we looking at PCI_HEADER_TYPE?  We should look at =
PCI_CLASS_PROG.
>=20
> I think both are OK. We can check for any one.=20
> Is there any problem with PCI_HEADER_TYPE?

Let use PCI_CLASS_PROG as its explicit for this purpose of determining =
agent/host across PCI, PCI-X, PCIe

>=20
>=20
>>> +	if ((is_agent & 0x7f) =3D=3D PCI_HEADER_TYPE_NORMAL) {
>>> +		u32 temp;
>>> +
>>> +		temp =3D (u32)hose->cfg_data & ~PAGE_MASK;
>>> +		if (((u32)hose->cfg_data & PAGE_MASK) !=3D =
(u32)hose->cfg_addr)
>>> +			iounmap(hose->cfg_data - temp);
>>> +		iounmap(hose->cfg_addr);
>>> +		pcibios_free_controller(hose);
>>> +		return 0;
>>> +	}
>>> +
>>> 	setup_pci_cmd(hose);
>>>=20
>>> 	/* check PCI express link status */
>>> --
>>> 1.7.3
>>>=20
>>>=20
>>> _______________________________________________
>>> Linuxppc-dev mailing list
>>> Linuxppc-dev@lists.ozlabs.org
>>> https://lists.ozlabs.org/listinfo/linuxppc-dev
>>=20
>=20

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2011-05-19 13:22 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-04-27  5:35 [PATCH] powerpc/85xx: add host-pci(e) bridge only for RC Prabhakar Kushwaha
2011-05-19  6:25 ` Kumar Gala
2011-05-19 11:25   ` Kushwaha Prabhakar-B32579
2011-05-19 13:22     ` Kumar Gala

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