From mboxrd@z Thu Jan  1 00:00:00 1970
From: Ferruh Yigit <ferruh.yigit@intel.com>
Subject: Re: [PATCH v4 02/41] bus/dpaa: introduce NXP DPAA Bus
	driver skeleton
Date: Tue, 19 Sep 2017 14:33:22 +0100
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Cc: dev@dpdk.org, hemant.agrawal@nxp.com
To: Shreyansh Jain <shreyansh.jain@nxp.com>
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On 9/19/2017 2:14 PM, Shreyansh Jain wrote:
> Hello Ferruh,
> 
> On Monday 18 September 2017 08:17 PM, Ferruh Yigit wrote:
>> On 9/9/2017 12:20 PM, Shreyansh Jain wrote:
>>> Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
>>> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>

<...>

>>> +struct rte_dpaa_device {
>>> +	TAILQ_ENTRY(rte_dpaa_device) next;
>>> +	struct rte_device device;
>>> +	union {
>>> +		struct rte_eth_dev *eth_dev;
>>> +		struct rte_cryptodev *crypto_dev;
>>> +	};
>>
>> Bus struct should be independt from functionality, this has been done in
>> PCI, can same thing be done for dpaa bus too?
> 
> Sorry, I didn't get your point. This is the rte_dpaa_bus structure:
> 
> struct rte_dpaa_bus {
>          struct rte_bus bus;
>          struct rte_dpaa_device_list device_list;
>          struct rte_dpaa_driver_list driver_list;
>          int device_count;
> };
> 
> If you are referring to unlinking eth/crypto functionality from 
> rte_dpaa_device - that is something which needs investigation. I have 
> seen patches on PCI from Gaetan. Can that be an incremental change over 
> this?

Yes, I was refereeing this. I am OK doing this incremental.

<...>