From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 732C3C433F5 for ; Fri, 6 May 2022 08:17:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1390082AbiEFIU4 (ORCPT ); Fri, 6 May 2022 04:20:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37960 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1390058AbiEFIUr (ORCPT ); Fri, 6 May 2022 04:20:47 -0400 Received: from szxga02-in.huawei.com (szxga02-in.huawei.com [45.249.212.188]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D1C3E689AA for ; Fri, 6 May 2022 01:16:58 -0700 (PDT) Received: from dggpemm500021.china.huawei.com (unknown [172.30.72.56]) by szxga02-in.huawei.com (SkyGuard) with ESMTP id 4Kvk146pqTzhYmL; Fri, 6 May 2022 16:16:24 +0800 (CST) Received: from dggpemm500006.china.huawei.com (7.185.36.236) by dggpemm500021.china.huawei.com (7.185.36.109) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Fri, 6 May 2022 16:16:56 +0800 Received: from [10.174.178.55] (10.174.178.55) by dggpemm500006.china.huawei.com (7.185.36.236) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Fri, 6 May 2022 16:16:56 +0800 Subject: Re: [PATCH v3] arm64: add the printing of tpidr_elx in __show_regs() From: "Leizhen (ThunderTown)" To: Mark Rutland CC: Catalin Marinas , Will Deacon , , References: <20220505095640.312-1-thunder.leizhen@huawei.com> <307e4def-1e4a-1110-e644-d485b9959ab1@huawei.com> Message-ID: <7c1207fa-56aa-1b33-31fd-3ec395b08f2b@huawei.com> Date: Fri, 6 May 2022 16:16:55 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.7.0 MIME-Version: 1.0 In-Reply-To: <307e4def-1e4a-1110-e644-d485b9959ab1@huawei.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.174.178.55] X-ClientProxiedBy: dggems702-chm.china.huawei.com (10.3.19.179) To dggpemm500006.china.huawei.com (7.185.36.236) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2022/5/5 21:34, Leizhen (ThunderTown) wrote: > > > On 2022/5/5 21:26, Leizhen (ThunderTown) wrote: >> >> >> On 2022/5/5 21:04, Mark Rutland wrote: >>> On Thu, May 05, 2022 at 05:56:40PM +0800, Zhen Lei wrote: >>>> Commit 7158627686f0 ("arm64: percpu: implement optimised pcpu access >>>> using tpidr_el1") and commit 6d99b68933fb ("arm64: alternatives: use >>>> tpidr_el2 on VHE hosts") use tpidr_elx to cache my_cpu_offset to optimize >>>> pcpu access. However, when performing reverse execution based on the >>>> registers and the memory contents in kdump, this information is sometimes >>>> required if there is a pcpu access. >>>> >>>> Signed-off-by: Zhen Lei >>>> --- >>>> arch/arm64/kernel/process.c | 5 +++++ >>>> 1 file changed, 5 insertions(+) >>>> >>>> v2 --> v3: >>>> 1) Relace "switch (read_sysreg(CurrentEL))" statement with >>>> "if (is_kernel_in_hyp_mode())" statement. >>>> 2) Change the register name to lowercase. >>>> >>>> v1 --> v2: >>>> Directly print the tpidr_elx register of the current exception level. >>>> Avoid coupling with the implementation of 'my_cpu_offset'. >>>> >>>> diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c >>>> index 7fa97df55e3ad3f..7b6bccce9721c36 100644 >>>> --- a/arch/arm64/kernel/process.c >>>> +++ b/arch/arm64/kernel/process.c >>>> @@ -216,6 +216,11 @@ void __show_regs(struct pt_regs *regs) >>>> show_regs_print_info(KERN_DEFAULT); >>>> print_pstate(regs); >>>> >>>> + if (is_kernel_in_hyp_mode()) >>>> + printk("tpidr_el2 : %016llx\n", read_sysreg(tpidr_el2)); >>>> + else >>>> + printk("tpidr_el1 : %016llx\n", read_sysreg(tpidr_el1)); >>> >>> If we care about the offset specifically, this would be simpler as: >>> >>> printk("cpu offset : 0x%016lx\n", __my_cpu_offset()); >> >> The function name is __show_regs(), so not using register name may not be good. >> In fact, some other architectures may also have this problem. If we use my_cpu_offset, >> we may need to put it in a public. > > The other idea is to back up each my_cpu_offset in an array. In this way, the offset can > be queried through vmcore even if it is not printed. Sorry, __per_cpu_offset[NR_CPUS] is always defined. > >> >>> >>> ... which should do the right thing even if we repurpose the TPIDRs and move the offset elsewhere. >>> >>> As Will says, we should only log this for !user_mode(regs), so it could >>> be placed in the block below, immediately before we print the kernel PC, i.e. >>> >>> if (!user_mode_regs) { >>> printk("cpu offset : %016lx\n", __my_cpu_offset()); >>> printk("pc : %pS\n", (void *)regs->pc); >>> printk("lr : %pS\n", (void *)ptrauth_strip_insn_pac(lr)); >>> ... >>> } >>> >>> ... or in a separate block which checks the same condition. >>> >>> Thanks, >>> Mark. >>> >>>> + >>>> if (!user_mode(regs)) { >>>> printk("pc : %pS\n", (void *)regs->pc); >>>> printk("lr : %pS\n", (void *)ptrauth_strip_insn_pac(lr)); >>>> -- >>>> 2.25.1 >>>> >>> . >>> >> > -- Regards, Zhen Lei From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B394FC433EF for ; Fri, 6 May 2022 08:24:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date: Message-ID:References:CC:To:From:Subject:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=3eqz+joLyzijcIL8tP8frBoa8Km72jvr711a7VoU1+Q=; b=dG6h0+tw3Imn3oB+HF5ppjRPRO PuFVs2jSA5b2B6i0slevVhJyt1jzk2GAW/IqqDl7A+stVJIHbtK63a0E87brQNrQJ6688DMNnLfoX +jwmyJJI6gfphx+AVLTCTkHtTtJxjxCdjfuzCLdDLfSty/4hTzbsA4cMltZmJBU8uwahm5xUqnBrf Ba3FUnY/yNHRH2nV9jibRUSiBaMzin+bZ1LexUnEYRGa12TubAv5wGlTGONXLpoVczMikJ0Qu0eDq WhmaIZMbQBnKGLRZNkMHIWsHl/lQIe3WDnv1CmSn3u+/1bKCKHcRFixAUolxEOSMeEA3irfdiGK0+ NowwU32g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmtFF-0023RI-8v; Fri, 06 May 2022 08:23:26 +0000 Received: from szxga02-in.huawei.com ([45.249.212.188]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmt93-00216p-0u for linux-arm-kernel@lists.infradead.org; Fri, 06 May 2022 08:17:04 +0000 Received: from dggpemm500021.china.huawei.com (unknown [172.30.72.56]) by szxga02-in.huawei.com (SkyGuard) with ESMTP id 4Kvk146pqTzhYmL; Fri, 6 May 2022 16:16:24 +0800 (CST) Received: from dggpemm500006.china.huawei.com (7.185.36.236) by dggpemm500021.china.huawei.com (7.185.36.109) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Fri, 6 May 2022 16:16:56 +0800 Received: from [10.174.178.55] (10.174.178.55) by dggpemm500006.china.huawei.com (7.185.36.236) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Fri, 6 May 2022 16:16:56 +0800 Subject: Re: [PATCH v3] arm64: add the printing of tpidr_elx in __show_regs() From: "Leizhen (ThunderTown)" To: Mark Rutland CC: Catalin Marinas , Will Deacon , , References: <20220505095640.312-1-thunder.leizhen@huawei.com> <307e4def-1e4a-1110-e644-d485b9959ab1@huawei.com> Message-ID: <7c1207fa-56aa-1b33-31fd-3ec395b08f2b@huawei.com> Date: Fri, 6 May 2022 16:16:55 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.7.0 MIME-Version: 1.0 In-Reply-To: <307e4def-1e4a-1110-e644-d485b9959ab1@huawei.com> Content-Language: en-US X-Originating-IP: [10.174.178.55] X-ClientProxiedBy: dggems702-chm.china.huawei.com (10.3.19.179) To dggpemm500006.china.huawei.com (7.185.36.236) X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220506_011701_493060_433E1B63 X-CRM114-Status: GOOD ( 17.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2022/5/5 21:34, Leizhen (ThunderTown) wrote: > > > On 2022/5/5 21:26, Leizhen (ThunderTown) wrote: >> >> >> On 2022/5/5 21:04, Mark Rutland wrote: >>> On Thu, May 05, 2022 at 05:56:40PM +0800, Zhen Lei wrote: >>>> Commit 7158627686f0 ("arm64: percpu: implement optimised pcpu access >>>> using tpidr_el1") and commit 6d99b68933fb ("arm64: alternatives: use >>>> tpidr_el2 on VHE hosts") use tpidr_elx to cache my_cpu_offset to optimize >>>> pcpu access. However, when performing reverse execution based on the >>>> registers and the memory contents in kdump, this information is sometimes >>>> required if there is a pcpu access. >>>> >>>> Signed-off-by: Zhen Lei >>>> --- >>>> arch/arm64/kernel/process.c | 5 +++++ >>>> 1 file changed, 5 insertions(+) >>>> >>>> v2 --> v3: >>>> 1) Relace "switch (read_sysreg(CurrentEL))" statement with >>>> "if (is_kernel_in_hyp_mode())" statement. >>>> 2) Change the register name to lowercase. >>>> >>>> v1 --> v2: >>>> Directly print the tpidr_elx register of the current exception level. >>>> Avoid coupling with the implementation of 'my_cpu_offset'. >>>> >>>> diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c >>>> index 7fa97df55e3ad3f..7b6bccce9721c36 100644 >>>> --- a/arch/arm64/kernel/process.c >>>> +++ b/arch/arm64/kernel/process.c >>>> @@ -216,6 +216,11 @@ void __show_regs(struct pt_regs *regs) >>>> show_regs_print_info(KERN_DEFAULT); >>>> print_pstate(regs); >>>> >>>> + if (is_kernel_in_hyp_mode()) >>>> + printk("tpidr_el2 : %016llx\n", read_sysreg(tpidr_el2)); >>>> + else >>>> + printk("tpidr_el1 : %016llx\n", read_sysreg(tpidr_el1)); >>> >>> If we care about the offset specifically, this would be simpler as: >>> >>> printk("cpu offset : 0x%016lx\n", __my_cpu_offset()); >> >> The function name is __show_regs(), so not using register name may not be good. >> In fact, some other architectures may also have this problem. If we use my_cpu_offset, >> we may need to put it in a public. > > The other idea is to back up each my_cpu_offset in an array. In this way, the offset can > be queried through vmcore even if it is not printed. Sorry, __per_cpu_offset[NR_CPUS] is always defined. > >> >>> >>> ... which should do the right thing even if we repurpose the TPIDRs and move the offset elsewhere. >>> >>> As Will says, we should only log this for !user_mode(regs), so it could >>> be placed in the block below, immediately before we print the kernel PC, i.e. >>> >>> if (!user_mode_regs) { >>> printk("cpu offset : %016lx\n", __my_cpu_offset()); >>> printk("pc : %pS\n", (void *)regs->pc); >>> printk("lr : %pS\n", (void *)ptrauth_strip_insn_pac(lr)); >>> ... >>> } >>> >>> ... or in a separate block which checks the same condition. >>> >>> Thanks, >>> Mark. >>> >>>> + >>>> if (!user_mode(regs)) { >>>> printk("pc : %pS\n", (void *)regs->pc); >>>> printk("lr : %pS\n", (void *)ptrauth_strip_insn_pac(lr)); >>>> -- >>>> 2.25.1 >>>> >>> . >>> >> > -- Regards, Zhen Lei _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel