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From: Jeremy Linton <jeremy.linton@arm.com>
To: "Rafael J. Wysocki" <rafael@kernel.org>
Cc: ACPI Devel Maling List <linux-acpi@vger.kernel.org>,
	Sudeep Holla <Sudeep.Holla@arm.com>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>,
	Hanjun Guo <hanjun.guo@linaro.org>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	Will Deacon <Will.Deacon@arm.com>,
	Catalin Marinas <Catalin.Marinas@arm.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Mark Rutland <Mark.Rutland@arm.com>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	linux-riscv@lists.infradead.org, wangxiongfeng2@huawei.com,
	vkilari@codeaurora.org, Al Stone <ahs3@redhat.com>,
	Dietmar Eggemann <Dietmar.Eggemann@arm.com>,
	Morten Rasmussen <Morten.Rasmussen@arm.com>,
	palmer@sifive.com, Len Brown <lenb@kernel.org>,
	John Garry <john.garry@huawei.co>
Subject: Re: [PATCH v9 05/12] ACPI/PPTT: Add Processor Properties Topology Table parsing
Date: Tue, 15 May 2018 16:42:32 -0500	[thread overview]
Message-ID: <7cefb087-f41a-0a73-ef77-b560d338be4b@arm.com> (raw)
In-Reply-To: <CAJZ5v0h4OeTaG2h0Q1c8zX93tici_nfLftpEyKWSkXoztHuUDg@mail.gmail.com>

Hi,

On 05/12/2018 05:09 AM, Rafael J. Wysocki wrote:
> On Sat, May 12, 2018 at 1:58 AM, Jeremy Linton <jeremy.linton@arm.com> wrote:
>> ACPI 6.2 adds a new table, which describes how processing units
>> are related to each other in tree like fashion. Caches are
>> also sprinkled throughout the tree and describe the properties
>> of the caches in relation to other caches and processing units.
>>
>> Add the code to parse the cache hierarchy and report the total
>> number of levels of cache for a given core using
>> acpi_find_last_cache_level() as well as fill out the individual
>> cores cache information with cache_setup_acpi() once the
>> cpu_cacheinfo structure has been populated by the arch specific
>> code.
>>
>> An additional patch later in the set adds the ability to report
>> peers in the topology using find_acpi_cpu_topology()
>> to report a unique ID for each processing unit at a given level
>> in the tree. These unique id's can then be used to match related
>> processing units which exist as threads, within a given
>> package, etc.
>>
>> Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
>> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>> Tested-by: Vijaya Kumar K <vkilari@codeaurora.org>
>> Tested-by: Xiongfeng Wang <wangxiongfeng2@huawei.com>
>> Tested-by: Tomasz Nowicki <Tomasz.Nowicki@cavium.com>
>> Acked-by: Sudeep Holla <sudeep.holla@arm.com>
>> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>> ---
>>   drivers/acpi/pptt.c  | 655 +++++++++++++++++++++++++++++++++++++++++++++++++++
>>   include/linux/acpi.h |   4 +
>>   2 files changed, 659 insertions(+)
>>   create mode 100644 drivers/acpi/pptt.c
>>
>> diff --git a/drivers/acpi/pptt.c b/drivers/acpi/pptt.c
>> new file mode 100644
>> index 000000000000..e5ea1974d1e3
>> --- /dev/null
>> +++ b/drivers/acpi/pptt.c
>> @@ -0,0 +1,655 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * pptt.c - parsing of Processor Properties Topology Table (PPTT)
>> + *
>> + * Copyright (C) 2018, ARM
>> + *
>> + * This file implements parsing of the Processor Properties Topology Table
>> + * which is optionally used to describe the processor and cache topology.
>> + * Due to the relative pointers used throughout the table, this doesn't
>> + * leverage the existing subtable parsing in the kernel.
>> + *
>> + * The PPTT structure is an inverted tree, with each node potentially
>> + * holding one or two inverted tree data structures describing
>> + * the caches available at that level. Each cache structure optionally
>> + * contains properties describing the cache at a given level which can be
>> + * used to override hardware probed values.
>> + */
>> +#define pr_fmt(fmt) "ACPI PPTT: " fmt
>> +
>> +#include <linux/acpi.h>
>> +#include <linux/cacheinfo.h>
>> +#include <acpi/processor.h>
>> +
>> +static struct acpi_subtable_header *fetch_pptt_subtable(struct acpi_table_header *table_hdr,
>> +                                                       u32 pptt_ref)
>> +{
>> +       struct acpi_subtable_header *entry;
>> +
>> +       /* there isn't a subtable at reference 0 */
>> +       if (pptt_ref < sizeof(struct acpi_subtable_header))
>> +               return NULL;
>> +
>> +       if (pptt_ref + sizeof(struct acpi_subtable_header) > table_hdr->length)
>> +               return NULL;
>> +
>> +       entry = ACPI_ADD_PTR(struct acpi_subtable_header, table_hdr, pptt_ref);
>> +
>> +       if (entry->length == 0)
>> +               return NULL;
>> +
>> +       if (pptt_ref + entry->length > table_hdr->length)
>> +               return NULL;
>> +
>> +       return entry;
>> +}
>> +
>> +static struct acpi_pptt_processor *fetch_pptt_node(struct acpi_table_header *table_hdr,
>> +                                                  u32 pptt_ref)
>> +{
>> +       return (struct acpi_pptt_processor *)fetch_pptt_subtable(table_hdr, pptt_ref);
>> +}
>> +
>> +static struct acpi_pptt_cache *fetch_pptt_cache(struct acpi_table_header *table_hdr,
>> +                                               u32 pptt_ref)
>> +{
>> +       return (struct acpi_pptt_cache *)fetch_pptt_subtable(table_hdr, pptt_ref);
> 
> I don't think you really need the explicit type cast here and above,
> but that's very minor.
> 
>> +}
> 
> Please feel free to add
> 
> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
> 
> to the patch and route it through the arch tree as needed.

Thanks for looking at this (and the ack of course)!

As an FYI, the in my build without the type cast, the 
-Werror=incompatible-pointer-types (sourced from the root Makefile) 
triggers an error.



thanks again.

WARNING: multiple messages have this Message-ID (diff)
From: Jeremy Linton <jeremy.linton@arm.com>
To: "Rafael J. Wysocki" <rafael@kernel.org>
Cc: ACPI Devel Maling List <linux-acpi@vger.kernel.org>,
	Sudeep Holla <Sudeep.Holla@arm.com>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>,
	Hanjun Guo <hanjun.guo@linaro.org>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	Will Deacon <Will.Deacon@arm.com>,
	Catalin Marinas <Catalin.Marinas@arm.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Mark Rutland <Mark.Rutland@arm.com>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	linux-riscv@lists.infradead.org, wangxiongfeng2@huawei.com,
	vkilari@codeaurora.org, Al Stone <ahs3@redhat.com>,
	Dietmar Eggemann <Dietmar.Eggemann@arm.com>,
	Morten Rasmussen <Morten.Rasmussen@arm.com>,
	palmer@sifive.com, Len Brown <lenb@kernel.org>,
	John Garry <john.garry@huawei.com>,
	austinwc@codeaurora.org, tnowicki@caviumnetworks.com,
	jhugo@codeaurora.org, Ard Biesheuvel <ard.biesheuvel@linaro.org>
Subject: Re: [PATCH v9 05/12] ACPI/PPTT: Add Processor Properties Topology Table parsing
Date: Tue, 15 May 2018 16:42:32 -0500	[thread overview]
Message-ID: <7cefb087-f41a-0a73-ef77-b560d338be4b@arm.com> (raw)
In-Reply-To: <CAJZ5v0h4OeTaG2h0Q1c8zX93tici_nfLftpEyKWSkXoztHuUDg@mail.gmail.com>

Hi,

On 05/12/2018 05:09 AM, Rafael J. Wysocki wrote:
> On Sat, May 12, 2018 at 1:58 AM, Jeremy Linton <jeremy.linton@arm.com> wrote:
>> ACPI 6.2 adds a new table, which describes how processing units
>> are related to each other in tree like fashion. Caches are
>> also sprinkled throughout the tree and describe the properties
>> of the caches in relation to other caches and processing units.
>>
>> Add the code to parse the cache hierarchy and report the total
>> number of levels of cache for a given core using
>> acpi_find_last_cache_level() as well as fill out the individual
>> cores cache information with cache_setup_acpi() once the
>> cpu_cacheinfo structure has been populated by the arch specific
>> code.
>>
>> An additional patch later in the set adds the ability to report
>> peers in the topology using find_acpi_cpu_topology()
>> to report a unique ID for each processing unit at a given level
>> in the tree. These unique id's can then be used to match related
>> processing units which exist as threads, within a given
>> package, etc.
>>
>> Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
>> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>> Tested-by: Vijaya Kumar K <vkilari@codeaurora.org>
>> Tested-by: Xiongfeng Wang <wangxiongfeng2@huawei.com>
>> Tested-by: Tomasz Nowicki <Tomasz.Nowicki@cavium.com>
>> Acked-by: Sudeep Holla <sudeep.holla@arm.com>
>> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>> ---
>>   drivers/acpi/pptt.c  | 655 +++++++++++++++++++++++++++++++++++++++++++++++++++
>>   include/linux/acpi.h |   4 +
>>   2 files changed, 659 insertions(+)
>>   create mode 100644 drivers/acpi/pptt.c
>>
>> diff --git a/drivers/acpi/pptt.c b/drivers/acpi/pptt.c
>> new file mode 100644
>> index 000000000000..e5ea1974d1e3
>> --- /dev/null
>> +++ b/drivers/acpi/pptt.c
>> @@ -0,0 +1,655 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * pptt.c - parsing of Processor Properties Topology Table (PPTT)
>> + *
>> + * Copyright (C) 2018, ARM
>> + *
>> + * This file implements parsing of the Processor Properties Topology Table
>> + * which is optionally used to describe the processor and cache topology.
>> + * Due to the relative pointers used throughout the table, this doesn't
>> + * leverage the existing subtable parsing in the kernel.
>> + *
>> + * The PPTT structure is an inverted tree, with each node potentially
>> + * holding one or two inverted tree data structures describing
>> + * the caches available at that level. Each cache structure optionally
>> + * contains properties describing the cache at a given level which can be
>> + * used to override hardware probed values.
>> + */
>> +#define pr_fmt(fmt) "ACPI PPTT: " fmt
>> +
>> +#include <linux/acpi.h>
>> +#include <linux/cacheinfo.h>
>> +#include <acpi/processor.h>
>> +
>> +static struct acpi_subtable_header *fetch_pptt_subtable(struct acpi_table_header *table_hdr,
>> +                                                       u32 pptt_ref)
>> +{
>> +       struct acpi_subtable_header *entry;
>> +
>> +       /* there isn't a subtable at reference 0 */
>> +       if (pptt_ref < sizeof(struct acpi_subtable_header))
>> +               return NULL;
>> +
>> +       if (pptt_ref + sizeof(struct acpi_subtable_header) > table_hdr->length)
>> +               return NULL;
>> +
>> +       entry = ACPI_ADD_PTR(struct acpi_subtable_header, table_hdr, pptt_ref);
>> +
>> +       if (entry->length == 0)
>> +               return NULL;
>> +
>> +       if (pptt_ref + entry->length > table_hdr->length)
>> +               return NULL;
>> +
>> +       return entry;
>> +}
>> +
>> +static struct acpi_pptt_processor *fetch_pptt_node(struct acpi_table_header *table_hdr,
>> +                                                  u32 pptt_ref)
>> +{
>> +       return (struct acpi_pptt_processor *)fetch_pptt_subtable(table_hdr, pptt_ref);
>> +}
>> +
>> +static struct acpi_pptt_cache *fetch_pptt_cache(struct acpi_table_header *table_hdr,
>> +                                               u32 pptt_ref)
>> +{
>> +       return (struct acpi_pptt_cache *)fetch_pptt_subtable(table_hdr, pptt_ref);
> 
> I don't think you really need the explicit type cast here and above,
> but that's very minor.
> 
>> +}
> 
> Please feel free to add
> 
> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
> 
> to the patch and route it through the arch tree as needed.

Thanks for looking at this (and the ack of course)!

As an FYI, the in my build without the type cast, the 
-Werror=incompatible-pointer-types (sourced from the root Makefile) 
triggers an error.



thanks again.

WARNING: multiple messages have this Message-ID (diff)
From: jeremy.linton@arm.com (Jeremy Linton)
To: linux-riscv@lists.infradead.org
Subject: [PATCH v9 05/12] ACPI/PPTT: Add Processor Properties Topology Table parsing
Date: Tue, 15 May 2018 16:42:32 -0500	[thread overview]
Message-ID: <7cefb087-f41a-0a73-ef77-b560d338be4b@arm.com> (raw)
In-Reply-To: <CAJZ5v0h4OeTaG2h0Q1c8zX93tici_nfLftpEyKWSkXoztHuUDg@mail.gmail.com>

Hi,

On 05/12/2018 05:09 AM, Rafael J. Wysocki wrote:
> On Sat, May 12, 2018 at 1:58 AM, Jeremy Linton <jeremy.linton@arm.com> wrote:
>> ACPI 6.2 adds a new table, which describes how processing units
>> are related to each other in tree like fashion. Caches are
>> also sprinkled throughout the tree and describe the properties
>> of the caches in relation to other caches and processing units.
>>
>> Add the code to parse the cache hierarchy and report the total
>> number of levels of cache for a given core using
>> acpi_find_last_cache_level() as well as fill out the individual
>> cores cache information with cache_setup_acpi() once the
>> cpu_cacheinfo structure has been populated by the arch specific
>> code.
>>
>> An additional patch later in the set adds the ability to report
>> peers in the topology using find_acpi_cpu_topology()
>> to report a unique ID for each processing unit at a given level
>> in the tree. These unique id's can then be used to match related
>> processing units which exist as threads, within a given
>> package, etc.
>>
>> Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
>> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>> Tested-by: Vijaya Kumar K <vkilari@codeaurora.org>
>> Tested-by: Xiongfeng Wang <wangxiongfeng2@huawei.com>
>> Tested-by: Tomasz Nowicki <Tomasz.Nowicki@cavium.com>
>> Acked-by: Sudeep Holla <sudeep.holla@arm.com>
>> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>> ---
>>   drivers/acpi/pptt.c  | 655 +++++++++++++++++++++++++++++++++++++++++++++++++++
>>   include/linux/acpi.h |   4 +
>>   2 files changed, 659 insertions(+)
>>   create mode 100644 drivers/acpi/pptt.c
>>
>> diff --git a/drivers/acpi/pptt.c b/drivers/acpi/pptt.c
>> new file mode 100644
>> index 000000000000..e5ea1974d1e3
>> --- /dev/null
>> +++ b/drivers/acpi/pptt.c
>> @@ -0,0 +1,655 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * pptt.c - parsing of Processor Properties Topology Table (PPTT)
>> + *
>> + * Copyright (C) 2018, ARM
>> + *
>> + * This file implements parsing of the Processor Properties Topology Table
>> + * which is optionally used to describe the processor and cache topology.
>> + * Due to the relative pointers used throughout the table, this doesn't
>> + * leverage the existing subtable parsing in the kernel.
>> + *
>> + * The PPTT structure is an inverted tree, with each node potentially
>> + * holding one or two inverted tree data structures describing
>> + * the caches available at that level. Each cache structure optionally
>> + * contains properties describing the cache at a given level which can be
>> + * used to override hardware probed values.
>> + */
>> +#define pr_fmt(fmt) "ACPI PPTT: " fmt
>> +
>> +#include <linux/acpi.h>
>> +#include <linux/cacheinfo.h>
>> +#include <acpi/processor.h>
>> +
>> +static struct acpi_subtable_header *fetch_pptt_subtable(struct acpi_table_header *table_hdr,
>> +                                                       u32 pptt_ref)
>> +{
>> +       struct acpi_subtable_header *entry;
>> +
>> +       /* there isn't a subtable at reference 0 */
>> +       if (pptt_ref < sizeof(struct acpi_subtable_header))
>> +               return NULL;
>> +
>> +       if (pptt_ref + sizeof(struct acpi_subtable_header) > table_hdr->length)
>> +               return NULL;
>> +
>> +       entry = ACPI_ADD_PTR(struct acpi_subtable_header, table_hdr, pptt_ref);
>> +
>> +       if (entry->length == 0)
>> +               return NULL;
>> +
>> +       if (pptt_ref + entry->length > table_hdr->length)
>> +               return NULL;
>> +
>> +       return entry;
>> +}
>> +
>> +static struct acpi_pptt_processor *fetch_pptt_node(struct acpi_table_header *table_hdr,
>> +                                                  u32 pptt_ref)
>> +{
>> +       return (struct acpi_pptt_processor *)fetch_pptt_subtable(table_hdr, pptt_ref);
>> +}
>> +
>> +static struct acpi_pptt_cache *fetch_pptt_cache(struct acpi_table_header *table_hdr,
>> +                                               u32 pptt_ref)
>> +{
>> +       return (struct acpi_pptt_cache *)fetch_pptt_subtable(table_hdr, pptt_ref);
> 
> I don't think you really need the explicit type cast here and above,
> but that's very minor.
> 
>> +}
> 
> Please feel free to add
> 
> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
> 
> to the patch and route it through the arch tree as needed.

Thanks for looking at this (and the ack of course)!

As an FYI, the in my build without the type cast, the 
-Werror=incompatible-pointer-types (sourced from the root Makefile) 
triggers an error.



thanks again.

WARNING: multiple messages have this Message-ID (diff)
From: jeremy.linton@arm.com (Jeremy Linton)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v9 05/12] ACPI/PPTT: Add Processor Properties Topology Table parsing
Date: Tue, 15 May 2018 16:42:32 -0500	[thread overview]
Message-ID: <7cefb087-f41a-0a73-ef77-b560d338be4b@arm.com> (raw)
In-Reply-To: <CAJZ5v0h4OeTaG2h0Q1c8zX93tici_nfLftpEyKWSkXoztHuUDg@mail.gmail.com>

Hi,

On 05/12/2018 05:09 AM, Rafael J. Wysocki wrote:
> On Sat, May 12, 2018 at 1:58 AM, Jeremy Linton <jeremy.linton@arm.com> wrote:
>> ACPI 6.2 adds a new table, which describes how processing units
>> are related to each other in tree like fashion. Caches are
>> also sprinkled throughout the tree and describe the properties
>> of the caches in relation to other caches and processing units.
>>
>> Add the code to parse the cache hierarchy and report the total
>> number of levels of cache for a given core using
>> acpi_find_last_cache_level() as well as fill out the individual
>> cores cache information with cache_setup_acpi() once the
>> cpu_cacheinfo structure has been populated by the arch specific
>> code.
>>
>> An additional patch later in the set adds the ability to report
>> peers in the topology using find_acpi_cpu_topology()
>> to report a unique ID for each processing unit at a given level
>> in the tree. These unique id's can then be used to match related
>> processing units which exist as threads, within a given
>> package, etc.
>>
>> Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
>> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>> Tested-by: Vijaya Kumar K <vkilari@codeaurora.org>
>> Tested-by: Xiongfeng Wang <wangxiongfeng2@huawei.com>
>> Tested-by: Tomasz Nowicki <Tomasz.Nowicki@cavium.com>
>> Acked-by: Sudeep Holla <sudeep.holla@arm.com>
>> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>> ---
>>   drivers/acpi/pptt.c  | 655 +++++++++++++++++++++++++++++++++++++++++++++++++++
>>   include/linux/acpi.h |   4 +
>>   2 files changed, 659 insertions(+)
>>   create mode 100644 drivers/acpi/pptt.c
>>
>> diff --git a/drivers/acpi/pptt.c b/drivers/acpi/pptt.c
>> new file mode 100644
>> index 000000000000..e5ea1974d1e3
>> --- /dev/null
>> +++ b/drivers/acpi/pptt.c
>> @@ -0,0 +1,655 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * pptt.c - parsing of Processor Properties Topology Table (PPTT)
>> + *
>> + * Copyright (C) 2018, ARM
>> + *
>> + * This file implements parsing of the Processor Properties Topology Table
>> + * which is optionally used to describe the processor and cache topology.
>> + * Due to the relative pointers used throughout the table, this doesn't
>> + * leverage the existing subtable parsing in the kernel.
>> + *
>> + * The PPTT structure is an inverted tree, with each node potentially
>> + * holding one or two inverted tree data structures describing
>> + * the caches available at that level. Each cache structure optionally
>> + * contains properties describing the cache at a given level which can be
>> + * used to override hardware probed values.
>> + */
>> +#define pr_fmt(fmt) "ACPI PPTT: " fmt
>> +
>> +#include <linux/acpi.h>
>> +#include <linux/cacheinfo.h>
>> +#include <acpi/processor.h>
>> +
>> +static struct acpi_subtable_header *fetch_pptt_subtable(struct acpi_table_header *table_hdr,
>> +                                                       u32 pptt_ref)
>> +{
>> +       struct acpi_subtable_header *entry;
>> +
>> +       /* there isn't a subtable at reference 0 */
>> +       if (pptt_ref < sizeof(struct acpi_subtable_header))
>> +               return NULL;
>> +
>> +       if (pptt_ref + sizeof(struct acpi_subtable_header) > table_hdr->length)
>> +               return NULL;
>> +
>> +       entry = ACPI_ADD_PTR(struct acpi_subtable_header, table_hdr, pptt_ref);
>> +
>> +       if (entry->length == 0)
>> +               return NULL;
>> +
>> +       if (pptt_ref + entry->length > table_hdr->length)
>> +               return NULL;
>> +
>> +       return entry;
>> +}
>> +
>> +static struct acpi_pptt_processor *fetch_pptt_node(struct acpi_table_header *table_hdr,
>> +                                                  u32 pptt_ref)
>> +{
>> +       return (struct acpi_pptt_processor *)fetch_pptt_subtable(table_hdr, pptt_ref);
>> +}
>> +
>> +static struct acpi_pptt_cache *fetch_pptt_cache(struct acpi_table_header *table_hdr,
>> +                                               u32 pptt_ref)
>> +{
>> +       return (struct acpi_pptt_cache *)fetch_pptt_subtable(table_hdr, pptt_ref);
> 
> I don't think you really need the explicit type cast here and above,
> but that's very minor.
> 
>> +}
> 
> Please feel free to add
> 
> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
> 
> to the patch and route it through the arch tree as needed.

Thanks for looking at this (and the ack of course)!

As an FYI, the in my build without the type cast, the 
-Werror=incompatible-pointer-types (sourced from the root Makefile) 
triggers an error.



thanks again.

  reply	other threads:[~2018-05-15 21:42 UTC|newest]

Thread overview: 185+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-11 23:57 [PATCH v9 00/12] Support PPTT for ARM64 Jeremy Linton
2018-05-11 23:57 ` Jeremy Linton
2018-05-11 23:57 ` Jeremy Linton
2018-05-11 23:57 ` [PATCH v9 01/12] drivers: base: cacheinfo: move cache_setup_of_node() Jeremy Linton
2018-05-11 23:57   ` Jeremy Linton
2018-05-11 23:57   ` Jeremy Linton
2018-05-11 23:57 ` [PATCH v9 02/12] drivers: base: cacheinfo: setup DT cache properties early Jeremy Linton
2018-05-11 23:57   ` Jeremy Linton
2018-05-11 23:57   ` Jeremy Linton
2018-05-11 23:57   ` Jeremy Linton
2018-05-15 17:15   ` Jeremy Linton
2018-05-15 17:15     ` Jeremy Linton
2018-05-15 17:15     ` Jeremy Linton
2018-05-15 19:32     ` Andy Shevchenko
2018-05-15 19:32       ` Andy Shevchenko
2018-05-15 19:32       ` Andy Shevchenko
2018-05-15 19:32       ` Andy Shevchenko
2018-05-16 10:56       ` Sudeep Holla
2018-05-16 10:56         ` Sudeep Holla
2018-05-16 10:56         ` Sudeep Holla
2018-05-16 10:56         ` Sudeep Holla
2018-05-17 15:47         ` Sudeep Holla
2018-05-17 15:47           ` Sudeep Holla
2018-05-17 15:47           ` Sudeep Holla
2018-05-17 15:47           ` Sudeep Holla
2018-05-18 21:50           ` Andy Shevchenko
2018-05-18 21:50             ` Andy Shevchenko
2018-05-18 21:50             ` Andy Shevchenko
2018-05-18 21:50             ` Andy Shevchenko
2018-05-21  9:27             ` Sudeep Holla
2018-05-21  9:27               ` Sudeep Holla
2018-05-21  9:27               ` Sudeep Holla
2018-05-21  9:27               ` Sudeep Holla
2018-05-21 10:15               ` Sudeep Holla
2018-05-21 10:15                 ` Sudeep Holla
2018-05-21 10:15                 ` Sudeep Holla
2018-05-21 10:15                 ` Sudeep Holla
2018-05-21 10:32       ` [PATCH] drivers: base: cacheinfo: use OF property_read_u64 instead of get_property,read_number Sudeep Holla
2018-05-21 10:32         ` [PATCH] drivers: base: cacheinfo: use OF property_read_u64 instead of get_property, read_number Sudeep Holla
2018-05-21 12:53         ` [PATCH v2] drivers: base: cacheinfo: use OF property_read_u32 instead of get_property,read_number Sudeep Holla
2018-05-21 12:53           ` [PATCH v2] drivers: base: cacheinfo: use OF property_read_u32 instead of get_property, read_number Sudeep Holla
2018-06-05 16:21           ` [PATCH v2] drivers: base: cacheinfo: use OF property_read_u32 instead of get_property,read_number Andy Shevchenko
2018-06-05 16:21             ` Andy Shevchenko
2018-06-05 16:26             ` Sudeep Holla
2018-06-05 16:26               ` Sudeep Holla
2018-06-05 16:34               ` Andy Shevchenko
2018-06-05 16:34                 ` Andy Shevchenko
2018-05-17  6:54     ` [PATCH v9 02/12] drivers: base: cacheinfo: setup DT cache properties early Greg KH
2018-05-17  6:54       ` Greg KH
2018-05-17  6:54       ` Greg KH
2018-05-17  9:08       ` Sudeep Holla
2018-05-17  9:08         ` Sudeep Holla
2018-05-17  9:08         ` Sudeep Holla
2018-05-17  9:35         ` Greg KH
2018-05-17  9:35           ` Greg KH
2018-05-17  9:35           ` Greg KH
2018-05-11 23:57 ` [PATCH v9 03/12] cacheinfo: rename of_node to fw_token Jeremy Linton
2018-05-11 23:57   ` Jeremy Linton
2018-05-11 23:57   ` Jeremy Linton
2018-05-11 23:57 ` [PATCH v9 04/12] arm64/acpi: Create arch specific cpu to acpi id helper Jeremy Linton
2018-05-11 23:57   ` Jeremy Linton
2018-05-11 23:57   ` Jeremy Linton
2018-05-14 14:41   ` Sudeep Holla
2018-05-14 14:41     ` Sudeep Holla
2018-05-14 14:41     ` Sudeep Holla
2018-05-11 23:58 ` [PATCH v9 05/12] ACPI/PPTT: Add Processor Properties Topology Table parsing Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-12 10:09   ` Rafael J. Wysocki
2018-05-12 10:09     ` Rafael J. Wysocki
2018-05-12 10:09     ` Rafael J. Wysocki
2018-05-12 10:09     ` Rafael J. Wysocki
2018-05-15 21:42     ` Jeremy Linton [this message]
2018-05-15 21:42       ` Jeremy Linton
2018-05-15 21:42       ` Jeremy Linton
2018-05-15 21:42       ` Jeremy Linton
2018-05-16  8:24       ` Rafael J. Wysocki
2018-05-16  8:24         ` Rafael J. Wysocki
2018-05-16  8:24         ` Rafael J. Wysocki
2018-05-16  8:24         ` Rafael J. Wysocki
2018-05-11 23:58 ` [PATCH v9 06/12] ACPI: Enable PPTT support on ARM64 Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-11 23:58 ` [PATCH v9 07/12] drivers: base cacheinfo: Add support for ACPI based firmware tables Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-11 23:58 ` [PATCH v9 08/12] arm64: " Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-11 23:58 ` [PATCH v9 09/12] arm64: topology: rename cluster_id Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-11 23:58 ` [PATCH v9 10/12] arm64: topology: enable ACPI/PPTT based CPU topology Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-11 23:58 ` [PATCH v9 11/12] ACPI: Add PPTT to injectable table list Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-12 10:10   ` Rafael J. Wysocki
2018-05-12 10:10     ` Rafael J. Wysocki
2018-05-12 10:10     ` Rafael J. Wysocki
2018-05-12 10:10     ` Rafael J. Wysocki
2018-05-11 23:58 ` [PATCH v9 12/12] arm64: topology: divorce MC scheduling domain from core_siblings Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-11 23:58   ` Jeremy Linton
2018-05-17 17:05 ` [PATCH v9 00/12] Support PPTT for ARM64 Catalin Marinas
2018-05-17 17:05   ` Catalin Marinas
2018-05-17 17:05   ` Catalin Marinas
2018-05-29 10:48   ` Geert Uytterhoeven
2018-05-29 10:48     ` Geert Uytterhoeven
2018-05-29 10:48     ` Geert Uytterhoeven
2018-05-29 10:48     ` Geert Uytterhoeven
2018-05-29 11:14     ` Sudeep Holla
2018-05-29 11:14       ` Sudeep Holla
2018-05-29 11:14       ` Sudeep Holla
2018-05-29 11:14       ` Sudeep Holla
2018-05-29 11:56       ` Geert Uytterhoeven
2018-05-29 11:56         ` Geert Uytterhoeven
2018-05-29 11:56         ` Geert Uytterhoeven
2018-05-29 11:56         ` Geert Uytterhoeven
2018-05-29 13:18         ` Sudeep Holla
2018-05-29 13:18           ` Sudeep Holla
2018-05-29 13:18           ` Sudeep Holla
2018-05-29 13:18           ` Sudeep Holla
2018-05-29 15:08           ` Will Deacon
2018-05-29 15:08             ` Will Deacon
2018-05-29 15:08             ` Will Deacon
2018-05-29 15:08             ` Will Deacon
2018-05-29 15:51             ` Geert Uytterhoeven
2018-05-29 15:51               ` Geert Uytterhoeven
2018-05-29 15:51               ` Geert Uytterhoeven
2018-05-29 15:51               ` Geert Uytterhoeven
2018-05-29 17:08               ` Robin Murphy
2018-05-29 17:08                 ` Robin Murphy
2018-05-29 17:08                 ` Robin Murphy
2018-05-29 17:08                 ` Robin Murphy
2018-05-29 17:18                 ` Geert Uytterhoeven
2018-05-29 17:18                   ` Geert Uytterhoeven
2018-05-29 17:18                   ` Geert Uytterhoeven
2018-05-29 17:18                   ` Geert Uytterhoeven
2018-05-29 17:31                 ` Sudeep Holla
2018-05-29 17:31                   ` Sudeep Holla
2018-05-29 17:31                   ` Sudeep Holla
2018-05-29 17:31                   ` Sudeep Holla
2018-05-29 20:16               ` Will Deacon
2018-05-29 20:16                 ` Will Deacon
2018-05-29 20:16                 ` Will Deacon
2018-05-29 20:16                 ` Will Deacon
2018-05-29 20:48                 ` Jeremy Linton
2018-05-29 20:48                   ` Jeremy Linton
2018-05-29 20:48                   ` Jeremy Linton
2018-05-29 20:48                   ` Jeremy Linton
2018-05-29 21:52               ` Jeremy Linton
2018-05-29 21:52                 ` Jeremy Linton
2018-05-29 21:52                 ` Jeremy Linton
2018-05-29 21:52                 ` Jeremy Linton
2018-05-30 13:24                 ` Sudeep Holla
2018-05-30 13:24                   ` Sudeep Holla
2018-05-30 13:24                   ` Sudeep Holla
2018-05-30 13:24                   ` Sudeep Holla
2018-05-29 15:23           ` Jeremy Linton
2018-05-29 15:23             ` Jeremy Linton
2018-05-29 15:23             ` Jeremy Linton
2018-05-29 15:23             ` Jeremy Linton
2018-05-29 15:50           ` Geert Uytterhoeven
2018-05-29 15:50             ` Geert Uytterhoeven
2018-05-29 15:50             ` Geert Uytterhoeven
2018-05-29 15:50             ` Geert Uytterhoeven
2018-05-30  8:52             ` Morten Rasmussen
2018-05-30  8:52               ` Morten Rasmussen
2018-05-30  8:52               ` Morten Rasmussen
2018-05-30  8:52               ` Morten Rasmussen
2018-06-05 13:55     ` [PATCH 1/3] Revert "arm64: topology: divorce MC scheduling domain from core_siblings" Sudeep Holla
2018-06-05 13:55       ` Sudeep Holla
2018-06-05 13:55       ` [PATCH 2/3] ACPI / PPTT: fix build when CONFIG_ACPI_PPTT is not enabled Sudeep Holla
2018-06-05 13:55         ` Sudeep Holla
2018-06-05 13:55       ` [PATCH 3/3] arm64: disable ACPI PPTT support temporarily Sudeep Holla
2018-06-05 13:55         ` Sudeep Holla
2018-06-05 14:09       ` [PATCH 1/3] Revert "arm64: topology: divorce MC scheduling domain from core_siblings" Geert Uytterhoeven
2018-06-05 14:09         ` Geert Uytterhoeven
2018-06-05 14:12         ` Sudeep Holla
2018-06-05 14:12           ` Sudeep Holla
2018-06-04 15:12   ` [PATCH v9 00/12] Support PPTT for ARM64 Catalin Marinas
2018-06-04 15:12     ` Catalin Marinas
2018-06-04 15:12     ` Catalin Marinas

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