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From: Richard Henderson <rth@twiddle.net>
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Subject: Re: [Qemu-devel] [PATCH v4 30/35] target-arm: emulate aarch64's
 LL/SC using cmpxchg helpers
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To: "Emilio G. Cota" <cota@braap.org>
Cc: qemu-devel@nongnu.org

On 09/16/2016 05:16 PM, Emilio G. Cota wrote:
>> > +        uint64_t *haddr = g2h(addr);
>> > +        o0 = ldq_le_p(haddr + 0);
>> > +        o1 = ldq_le_p(haddr + 1);
>> > +        oldv = int128_make128(o0, o1);
>> > +
>> > +        success = int128_eq(oldv, cmpv);
>> > +        if (success) {
>> > +            stq_le_p(haddr + 0, int128_getlo(newv));
>> > +            stq_le_p(haddr + 8, int128_gethi(newv));
> Shouldn't this be + 1 instead, just like the above load?
>
> If so, the same applies to the store in the _be function.

Yep, good catch.


r~