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Date: Thu, 24 Feb 2022 14:03:48 -0700
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Subject: Re: [PATCH 1/2] pinctrl: aspeed: Enable pass-through on GPIOE1 and
 GPIOE3 free
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To: Joel Stanley <joel@jms.id.au>, Andrew Jeffery <andrew@aj.id.au>
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On 2/6/2022 11:45 PM, Joel Stanley wrote:
> On Wed, 2 Feb 2022 at 22:49, Andrew Jeffery <andrew@aj.id.au> wrote:
>>
>>
>>
>> On Thu, 3 Feb 2022, at 06:29, Bills, Jason M wrote:
>>> This change adds a gpio_disable_free() implementation that checks
>>> if the GPIO being freed is GPIOE1 (33) or GPIOE3 (35) and will
>>> re-enable the pass-through mux.
>>
>> Okay. So trying to pull back from the implementation for a moment:
>>
>> Perhaps we can view pass-through as a property on a pair of GPIOs, rather than a mux state? I think it would be better if we could, for instance, annotate this in the devicetree?
>>
>> If we did that I don't think we're require this awkward and pin-specific implementation of the free callback for GPIOs.
>>
>> If pass-through is enabled it puts constraints on how the pins are used if they're requested as GPIOs, but we can add those dynamic checks in the GPIO driver.
>>
>> Let me think about it some more.
>>
>> Thanks for surfacing the patch.
> 
> This is for the kernel, I assume.
> 
> Jason, you should send the patch to the upstream lists (use
> get_maintainers.pl) for review.
Sorry for the delay.  I found the right lists with get_maintainers.pl. 
Should I send these patches to the upstream lists as they are, or do 
they need to be tweaked?

Thanks!
-Jason

> 
> Cheers,
> 
> Joel