From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 056F0C433DB for ; Tue, 19 Jan 2021 15:10:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C6BC923110 for ; Tue, 19 Jan 2021 15:10:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389102AbhASPJk (ORCPT ); Tue, 19 Jan 2021 10:09:40 -0500 Received: from foss.arm.com ([217.140.110.172]:34008 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2404575AbhASOm4 (ORCPT ); Tue, 19 Jan 2021 09:42:56 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 871D3D6E; Tue, 19 Jan 2021 06:42:06 -0800 (PST) Received: from [10.37.8.29] (unknown [10.37.8.29]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E8A2A3F719; Tue, 19 Jan 2021 06:42:03 -0800 (PST) Subject: Re: [PATCH v4 4/5] arm64: mte: Enable async tag check fault To: Catalin Marinas Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com, Will Deacon , Dmitry Vyukov , Andrey Ryabinin , Alexander Potapenko , Marco Elver , Evgenii Stepanov , Branislav Rankov , Andrey Konovalov References: <20210118183033.41764-1-vincenzo.frascino@arm.com> <20210118183033.41764-5-vincenzo.frascino@arm.com> <20210119143412.GD17369@gaia> From: Vincenzo Frascino Message-ID: <7db77f90-d595-c094-2f71-8ef1b05f1c7f@arm.com> Date: Tue, 19 Jan 2021 14:45:52 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20210119143412.GD17369@gaia> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 1/19/21 2:34 PM, Catalin Marinas wrote: > On Mon, Jan 18, 2021 at 06:30:32PM +0000, Vincenzo Frascino wrote: >> static void update_sctlr_el1_tcf0(u64 tcf0) >> { >> /* ISB required for the kernel uaccess routines */ >> @@ -235,6 +273,15 @@ void mte_thread_switch(struct task_struct *next) >> /* avoid expensive SCTLR_EL1 accesses if no change */ >> if (current->thread.sctlr_tcf0 != next->thread.sctlr_tcf0) >> update_sctlr_el1_tcf0(next->thread.sctlr_tcf0); >> + >> + /* >> + * Check if an async tag exception occurred at EL1. >> + * >> + * Note: On the context switch path we rely on the dsb() present >> + * in __switch_to() to guarantee that the indirect writes to TFSR_EL1 >> + * are synchronized before this point. >> + */ >> + mte_check_tfsr_el1(); >> } > > We need an isb() before mte_check_tfsr_el1() here as well, we only have > a dsb() in __switch_to(). We do have an isb() in update_sctlr_el1_tcf0() > but only if the check passed. Now, it's worth benchmarking how expensive > update_sctlr_el1_tcf0() is (i.e. an SCTLR_EL1 access + isb with > something like hackbench) and we could probably remove the check > altogether. In the meantime, you can add an isb() on the "else" path of > the above check. > Good catch, I saw the isb() in update_sctlr_el1_tcf0() and for some reasons that it is not escaping me I thought it was sufficient, but clearly it is not. I am happy to benchmark what you are suggesting and provide some data after this series is merged (if it works for you) so that we can decide. In the meantime as you suggested I will fix the "else" for v5. -- Regards, Vincenzo From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 339BFC433DB for ; Tue, 19 Jan 2021 14:43:29 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DB88320DD4 for ; Tue, 19 Jan 2021 14:43:28 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DB88320DD4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=ZBX/1goEQg3bQ924ZO2CGHrxtET4mE5zEDfQCNxSu/c=; b=oaO6dd1u/sMMy0Nci2/cE09aP L7qHjF1ApmbjrDiZ1h69TGIzbBAPxh0NHUGCvebiMZ1y5zX6d9mChKkXXFjrNDcpRmDZX+ubcrnEj Ir2zXdti+ph6JDeB/8uzYP1aOT130dEybY6x33DVFUJo6Rz3+pqCus4gKMr7f9fKGzk/4eV8LeznN IIAza4OYLHIoe3uFCKzUXw6xGePUU+5CJPCKUA7I17nU3pCs0BfpOvNmWqOJdNfILmXfdwp0QzjcI FgyKAFCapXtpLqY0MwsS4pgtH8NI8qPkXbI9683EEyWAZ/SajvevyJRJYbha868B0D/o80lZOLj73 D1ASCGsxg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l1sD0-0005KO-1P; Tue, 19 Jan 2021 14:42:14 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l1sCx-0005Ji-4H for linux-arm-kernel@lists.infradead.org; Tue, 19 Jan 2021 14:42:12 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 871D3D6E; Tue, 19 Jan 2021 06:42:06 -0800 (PST) Received: from [10.37.8.29] (unknown [10.37.8.29]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E8A2A3F719; Tue, 19 Jan 2021 06:42:03 -0800 (PST) Subject: Re: [PATCH v4 4/5] arm64: mte: Enable async tag check fault To: Catalin Marinas References: <20210118183033.41764-1-vincenzo.frascino@arm.com> <20210118183033.41764-5-vincenzo.frascino@arm.com> <20210119143412.GD17369@gaia> From: Vincenzo Frascino Message-ID: <7db77f90-d595-c094-2f71-8ef1b05f1c7f@arm.com> Date: Tue, 19 Jan 2021 14:45:52 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20210119143412.GD17369@gaia> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210119_094211_250627_D62D8876 X-CRM114-Status: GOOD ( 20.97 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Branislav Rankov , Marco Elver , Andrey Konovalov , Evgenii Stepanov , linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com, Alexander Potapenko , linux-arm-kernel@lists.infradead.org, Andrey Ryabinin , Will Deacon , Dmitry Vyukov Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 1/19/21 2:34 PM, Catalin Marinas wrote: > On Mon, Jan 18, 2021 at 06:30:32PM +0000, Vincenzo Frascino wrote: >> static void update_sctlr_el1_tcf0(u64 tcf0) >> { >> /* ISB required for the kernel uaccess routines */ >> @@ -235,6 +273,15 @@ void mte_thread_switch(struct task_struct *next) >> /* avoid expensive SCTLR_EL1 accesses if no change */ >> if (current->thread.sctlr_tcf0 != next->thread.sctlr_tcf0) >> update_sctlr_el1_tcf0(next->thread.sctlr_tcf0); >> + >> + /* >> + * Check if an async tag exception occurred at EL1. >> + * >> + * Note: On the context switch path we rely on the dsb() present >> + * in __switch_to() to guarantee that the indirect writes to TFSR_EL1 >> + * are synchronized before this point. >> + */ >> + mte_check_tfsr_el1(); >> } > > We need an isb() before mte_check_tfsr_el1() here as well, we only have > a dsb() in __switch_to(). We do have an isb() in update_sctlr_el1_tcf0() > but only if the check passed. Now, it's worth benchmarking how expensive > update_sctlr_el1_tcf0() is (i.e. an SCTLR_EL1 access + isb with > something like hackbench) and we could probably remove the check > altogether. In the meantime, you can add an isb() on the "else" path of > the above check. > Good catch, I saw the isb() in update_sctlr_el1_tcf0() and for some reasons that it is not escaping me I thought it was sufficient, but clearly it is not. I am happy to benchmark what you are suggesting and provide some data after this series is merged (if it works for you) so that we can decide. In the meantime as you suggested I will fix the "else" for v5. -- Regards, Vincenzo _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel