From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ED3EFEB64DA for ; Wed, 5 Jul 2023 15:27:39 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.559305.874195 (Exim 4.92) (envelope-from ) id 1qH4PW-0001k0-SW; Wed, 05 Jul 2023 15:27:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 559305.874195; Wed, 05 Jul 2023 15:27:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qH4PW-0001jt-Pk; Wed, 05 Jul 2023 15:27:18 +0000 Received: by outflank-mailman (input) for mailman id 559305; Wed, 05 Jul 2023 15:27:15 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qH4PT-0001UO-SK for xen-devel@lists.xenproject.org; Wed, 05 Jul 2023 15:27:15 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 6b61d52b-1b48-11ee-b237-6b7b168915f2; Wed, 05 Jul 2023 17:27:15 +0200 (CEST) Received: from beta.bugseng.com (unknown [37.163.248.64]) by support.bugseng.com (Postfix) with ESMTPSA id B058F4EE0C81; Wed, 5 Jul 2023 17:27:13 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 6b61d52b-1b48-11ee-b237-6b7b168915f2 From: Simone Ballarin To: xen-devel@lists.xenproject.org Cc: consulting@bugseng.com, Gianluca Luparini , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Wei Liu , Stefano Stabellini , Michal Orzel , Xenia Ragiadakou , Ayan Kumar Halder , Simone Ballarin Subject: [XEN PATCH v2 01/13] x86/cpufreq: fix violations of MISRA C:2012 Rule 7.2 Date: Wed, 5 Jul 2023 17:26:23 +0200 Message-Id: <7df9377d4cb218dd54646c2cb1b70327c8b44c96.1688559115.git.gianluca.luparini@bugseng.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Gianluca Luparini The xen sources contains violations of MISRA C:2012 Rule 7.2 whose headline states: "A 'u' or 'U' suffix shall be applied to all integer constants that are represented in an unsigned type". Add the 'U' suffix to integers literals with unsigned type and also to other literals used in the same contexts or near violations, when their positive nature is immediately clear. The latter changes are done for the sake of uniformity. Signed-off-by: Simone Ballarin Signed-off-by: Gianluca Luparini --- Changes in v2: - change commit title to make it unique - change commit message --- xen/arch/x86/acpi/cpufreq/powernow.c | 14 +++++++------- xen/include/acpi/cpufreq/processor_perf.h | 2 +- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/xen/arch/x86/acpi/cpufreq/powernow.c b/xen/arch/x86/acpi/cpufreq/powernow.c index d4c7dcd5d9..8e0784b69c 100644 --- a/xen/arch/x86/acpi/cpufreq/powernow.c +++ b/xen/arch/x86/acpi/cpufreq/powernow.c @@ -32,14 +32,14 @@ #include #include -#define HW_PSTATE_MASK 0x00000007 -#define HW_PSTATE_VALID_MASK 0x80000000 -#define HW_PSTATE_MAX_MASK 0x000000f0 +#define HW_PSTATE_MASK 0x00000007U +#define HW_PSTATE_VALID_MASK 0x80000000U +#define HW_PSTATE_MAX_MASK 0x000000f0U #define HW_PSTATE_MAX_SHIFT 4 -#define MSR_PSTATE_DEF_BASE 0xc0010064 /* base of Pstate MSRs */ -#define MSR_PSTATE_STATUS 0xc0010063 /* Pstate Status MSR */ -#define MSR_PSTATE_CTRL 0xc0010062 /* Pstate control MSR */ -#define MSR_PSTATE_CUR_LIMIT 0xc0010061 /* pstate current limit MSR */ +#define MSR_PSTATE_DEF_BASE 0xc0010064U /* base of Pstate MSRs */ +#define MSR_PSTATE_STATUS 0xc0010063U /* Pstate Status MSR */ +#define MSR_PSTATE_CTRL 0xc0010062U /* Pstate control MSR */ +#define MSR_PSTATE_CUR_LIMIT 0xc0010061U /* pstate current limit MSR */ #define MSR_HWCR_CPBDIS_MASK 0x02000000ULL #define ARCH_CPU_FLAG_RESUME 1 diff --git a/xen/include/acpi/cpufreq/processor_perf.h b/xen/include/acpi/cpufreq/processor_perf.h index d8a1ba68a6..8b5a1b9bde 100644 --- a/xen/include/acpi/cpufreq/processor_perf.h +++ b/xen/include/acpi/cpufreq/processor_perf.h @@ -5,7 +5,7 @@ #include #include -#define XEN_PX_INIT 0x80000000 +#define XEN_PX_INIT 0x80000000U int powernow_cpufreq_init(void); unsigned int powernow_register_driver(void); -- 2.41.0