From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Pu Wen <puwen@hygon.cn>, <JBeulich@suse.com>
Cc: xen-devel@lists.xenproject.org
Subject: Re: [Xen-devel] [PATCH v5 00/15] Add support for Hygon Dhyana Family 18h processor
Date: Wed, 12 Jun 2019 16:58:35 +0100 [thread overview]
Message-ID: <7ed89d38-9ba7-fa0f-6fcd-c514c52667d2@citrix.com> (raw)
In-Reply-To: <1f85709e-ebec-5372-aac4-d567f51a9427@hygon.cn>
On 12/06/2019 16:10, Pu Wen wrote:
> On 2019/6/7 0:31, Andrew Cooper wrote:
>> I've rebased the patches over my CPUID work, and pushed the ones which
>> still apply cleanly to staging. However, some don't apply cleanly any
>> more, so I left those alone.
>>
>> Please could you check the current staging build (and in particular,
>> that I didn't accidentally break anything with the rebase), and rebase
>> the remainder of the series onto staging.
>
> I rebased the patches x86/acpi and x86/pv over 0cd07414 "x86/cpu:
> Renumber X86_VENDOR_* to form a bitmap", and sent them out with version
> v6. I dropped the patch x86/iommu for Hygon because it's no needed any
> more since the commit 1b3cc800 "x86/IOMMU: introduce init-ops structure"
> removed the vendor check.
>
> I still hold Jan's Acked-by tags however the code is changed. Are the
> tags still valid?
Yes. The tags were still valid, because you're not fundamentally
changing the patch from how it was before.
I've committed the patches now.
~Andrew
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prev parent reply other threads:[~2019-06-12 15:58 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-04 13:44 [PATCH v5 00/15] Add support for Hygon Dhyana Family 18h processor Pu Wen
2019-04-04 13:45 ` [PATCH v5 01/15] x86/cpu: Create Hygon Dhyana architecture support file Pu Wen
2019-04-04 14:02 ` Andrew Cooper
2019-04-04 16:39 ` Pu Wen
2019-04-05 7:49 ` Jan Beulich
2019-04-05 7:49 ` [Xen-devel] " Jan Beulich
2019-04-12 16:14 ` Pu Wen
2019-04-12 16:14 ` [Xen-devel] " Pu Wen
2019-04-17 15:03 ` Wei Liu
2019-04-17 15:03 ` [Xen-devel] " Wei Liu
2019-04-18 2:15 ` Pu Wen
2019-04-18 2:15 ` [Xen-devel] " Pu Wen
2019-04-18 9:14 ` Wei Liu
2019-04-18 9:14 ` [Xen-devel] " Wei Liu
2019-04-04 13:45 ` [PATCH v5 02/15] x86/cpu: Fix common cpuid faulting probing for AMD and Hygon Pu Wen
2019-04-04 13:45 ` [PATCH v5 03/15] x86/cpu/mtrr: Add Hygon Dhyana support to get TOP_MEM2 Pu Wen
2019-04-04 13:46 ` [PATCH v5 04/15] x86/cpu/vpmu: Add Hygon Dhyana and AMD Zen support for vPMU Pu Wen
2019-04-04 13:46 ` [PATCH v5 05/15] x86/cpu/mce: Add Hygon Dhyana support to the MCA infrastructure Pu Wen
2019-04-04 13:46 ` [PATCH v5 06/15] x86/spec_ctrl: Add Hygon Dhyana to the respective mitigation machinery Pu Wen
2019-04-04 13:46 ` [PATCH v5 07/15] x86/apic: Add Hygon Dhyana support Pu Wen
2019-04-04 13:46 ` [PATCH v5 08/15] x86/acpi: " Pu Wen
2019-04-04 13:47 ` [PATCH v5 09/15] x86/iommu: " Pu Wen
2019-04-04 13:47 ` [PATCH v5 10/15] x86/pv: Add Hygon Dhyana support to emulate MSRs access Pu Wen
2019-04-04 13:47 ` [PATCH v5 11/15] x86/domain: Add Hygon Dhyana support Pu Wen
2019-04-04 13:47 ` [PATCH v5 12/15] x86/domctl: " Pu Wen
2019-04-04 13:47 ` [PATCH v5 13/15] x86/traps: " Pu Wen
2019-04-04 13:48 ` [PATCH v5 14/15] x86/cpuid: " Pu Wen
2019-04-04 13:48 ` [PATCH v5 15/15] tools/libxc: " Pu Wen
2019-04-04 16:26 ` Wei Liu
2019-04-04 16:40 ` Pu Wen
2019-04-04 13:53 ` [PATCH v5 00/15] Add support for Hygon Dhyana Family 18h processor Julien Grall
2019-04-04 16:47 ` Pu Wen
2019-04-04 17:00 ` Julien Grall
2019-06-06 16:31 ` [Xen-devel] " Andrew Cooper
[not found] ` <201906070115.x571Fd9j014046@spam1.hygon.cn>
2019-06-07 15:54 ` Pu Wen
2019-06-12 15:10 ` Pu Wen
2019-06-12 15:58 ` Andrew Cooper [this message]
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