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bh=bnl6Rkw7pmF8EnuHKARCkFojaVD5wSxh0m5pQ8CvcQY=; b=Dg6B5ZhEb0/tHV9hi6U7bKnwxCHeIvZxFxIDN8aGXfZs8wdeLZVtWIrd9EfPl2I1YNNx5A Ev67sUQPOL3JZlCQuM0Z6NW/fSycg7BxFrITGGUElwZJ74k7XeWlXx8IiWzpiawUlPcnYy PGXfWvFe9vwaD7XmrYZP2rBW8jrrtwQo0KZECqKaDmtxrIgf83XkLd8YGz7PobguFWvMXz BXK+2P+/hA5x3VhQjRiatBA40Qbuy83Nt3aS+jXzzysqwodSw76UA+7AFcIcFWX8CWO6t2 b/WUGHOcjhY48iatn72Z42B4IML36LbtvupiP3CfgR44/X7O+UVRv2crHB6RCg== Message-ID: <7fbf5592-f85d-24d6-878a-bf96480ec668@mailbox.org> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1685615939; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=bnl6Rkw7pmF8EnuHKARCkFojaVD5wSxh0m5pQ8CvcQY=; b=ua5aquNP3HoVoUVg3Y1FONXvBO0IwyHxMW0KpBdMc65KPUCzD+y4/WVnvwZWz282ju8XXM UZJRP4LtfNbq6UQ6L2V+dem1mkwJm6Q6S0QfgJolcztxbz8bzxB89/987W2YSqdXC8JgBP 1I6d9XTsn0lSXbO8Ty/02D/AwZeZcuo/YwNJhdQ9Ca8hVHhAhuuYAuRpWwKA0pfzAiaYrh JeMo7M5ETDukl6qFarxIQVRCC/cz51OwLh4EXtLAlHeky12FMJFVHxW4ZraUT4CcK8DXs8 A01f0rpDIwl1Vca1DupZKmFigchdqLihJdBRPOq+N/itimhZYRZBOOJ5cFPWMA== Date: Thu, 1 Jun 2023 12:38:57 +0200 MIME-Version: 1.0 Subject: Re: [PATCH v1 6/6] net: mv88e61xx: Reset switch PHYs when bootstrapped to !NO_CPU Content-Language: en-US To: Lukasz Majewski , u-boot@lists.denx.de, Tom Rini Cc: Anatolij Gustschin , Ramon Fried , Joe Hershberger , Marek Vasut , Michal Simek References: <20230601100005.2216345-1-lukma@denx.de> <20230601100005.2216345-7-lukma@denx.de> From: Marek Vasut In-Reply-To: <20230601100005.2216345-7-lukma@denx.de> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-MBO-RS-ID: 3a6c2bc9406869332b5 X-MBO-RS-META: j541dwn4f6mt6nwpgfg4zt5d7hgzsda3 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On 6/1/23 12:00, Lukasz Majewski wrote: > Some devices, when configured in bootstrap to 'no cpu' mode require PHY > manual reset to get them operational and responding to reading their ID > registers. > > Without this step - the PHYLIB probing will fail. > > In more details - the bootstrap configuration from switch must be read. > The value of CONFIG Data1 (0x71) of Scratch and Misc register is read > to check if 'no_cpu' and 'addr4' bits were set. > > Signed-off-by: Lukasz Majewski > Reviewed-by: Ramon Fried > > --- > > drivers/net/phy/mv88e61xx.c | 63 +++++++++++++++++++++++++++++++++++-- > 1 file changed, 61 insertions(+), 2 deletions(-) > > diff --git a/drivers/net/phy/mv88e61xx.c b/drivers/net/phy/mv88e61xx.c > index 69a87bead469..cf8f5e833e82 100644 > --- a/drivers/net/phy/mv88e61xx.c > +++ b/drivers/net/phy/mv88e61xx.c > @@ -194,6 +194,17 @@ struct mv88e61xx_phy_priv { > u8 phy_ctrl1_en_det_width; /* Width of 'EDet' bit field */ > u8 phy_ctrl1_en_det_ctrl; /* 'EDet' control value */ > u8 direct_access; /* Access switch device directly */ > + /* > + * Bootstrap configuration: > + * > + * If addr4 = 1 device is accessible from 0x10 address on MDIO bus. > + */ > + u8 addr4; > + /* > + * If no_cpu = 1 switch is automatically setup, otherwise PHY reset is > + * required from CPU for normal operation. > + */ > + u8 no_cpu; > }; > > static inline int smi_cmd(int cmd, int addr, int reg) > @@ -1218,6 +1229,33 @@ U_BOOT_PHY_DRIVER(mv88e6071) = { > .shutdown = &genphy_shutdown, > }; > > +static int mv88e61xx_read_bootstrap(struct phy_device *phydev) > +{ > + struct mv88e61xx_phy_priv *priv = phydev->priv; > + struct mii_dev *mdio_bus = priv->mdio_bus; > + int val; > + > + /* mv88e6020 - ID = 0x0200 (REG 3 on non PHY port) */ > + if (priv->id == PORT_SWITCH_ID_6020) { > + /* Prepare to read scratch and misc register */ > + mdio_bus->write(mdio_bus, priv->global2, 0, > + 0x1a /*MV_SCRATCH_MISC*/, > + (0x71 /*MV_CONFIG_DATA1*/ << 8)); Introduce macros for these magic values. > + val = mdio_bus->read(mdio_bus, priv->global2, 0, > + 0x1a /*MV_SCRATCH_MISC*/); > + > + if (val & (1 << 0)) > + priv->no_cpu = 1; > + if (val & (1 << 4)) Macros, and also BIT() [..]