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From: Itaru Kitayama <itaru.kitayama@riken.jp>
To: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>,
	"kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>
Subject: Re: [PATCH] KVM: arm64: Check GICV address is placed at a 4Kb boundary
Date: Thu, 30 Jun 2016 12:23:17 +0900	[thread overview]
Message-ID: <7fc8cf5d-0df2-f585-9384-9282f58287a2@riken.jp> (raw)
In-Reply-To: <20160629124342.GV26498@cbox>

Christoffer,

On 6/29/16 9:43 PM, Christoffer Dall wrote:
> Doesn't this change carry the risk of KVM mapping a page (larger than
> 4K) containing other things than the GICV interface into the guest,
> potentially breaking isolation of the VM from host hardware resources?

I still suspect the 64Kb long region is filled with 16 copies of first 
4Kb of GICV, as Joel said in a thread two years ago when Marc introduced 
sub-page alignment patch:

https://patches.linaro.org/patch/32191/

. So with that patch applied, a VM always boots on a 64Kb page granular 
host, thanks to the multiple copies of the first part of GICV, but it'll 
have a problem accessing the GICV_DIR register that is
placed at the second 4Kb of region mapped for GICV.

For the ACPI enabled systems, the check of physical address of the 
virtual cpu interface is page aligned only works for 4Kb page granular 
kernels, so the patch is still required, though I need to come up with 
another patch that does map GICV to guest's physical address space 
taking care of the offset in the presence of the new VGIC code.

      reply	other threads:[~2016-06-30  3:18 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-29  6:22 Itaru Kitayama
2016-06-29 12:43 ` Christoffer Dall
2016-06-30  3:23   ` Itaru Kitayama [this message]

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