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[149.14.88.106]) by smtp.gmail.com with ESMTPSA id c13-20020adfa70d000000b0020c5253d8e8sm6712293wrd.52.2022.05.02.02.35.13 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 02 May 2022 02:35:13 -0700 (PDT) Message-ID: <7fd57a63-25eb-214a-da31-011d2d0469d6@redhat.com> Date: Mon, 2 May 2022 11:35:12 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.8.0 Subject: Re: [PATCH v6 13/13] tests/tcg/s390x: Tests for Vector Enhancements Facility 2 Content-Language: en-US To: David Hildenbrand , qemu-devel@nongnu.org References: <20220428094708.84835-1-david@redhat.com> <20220428094708.84835-14-david@redhat.com> From: Thomas Huth In-Reply-To: <20220428094708.84835-14-david@redhat.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=thuth@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eric Farman , Cornelia Huck , Richard Henderson , David Miller , Halil Pasic , qemu-s390x@nongnu.org, Christian Borntraeger Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 28/04/2022 11.47, David Hildenbrand wrote: > From: David Miller > > Signed-off-by: David Miller > Signed-off-by: Richard Henderson > Tested-by: Thomas Huth > Signed-off-by: David Hildenbrand > --- [...] > diff --git a/tests/tcg/s390x/vxeh2_vlstr.c b/tests/tcg/s390x/vxeh2_vlstr.c > new file mode 100644 > index 0000000000..5677bf7c29 > --- /dev/null > +++ b/tests/tcg/s390x/vxeh2_vlstr.c > @@ -0,0 +1,139 @@ > +/* > + * vxeh2_vlstr: vector-enhancements facility 2 vector load/store reversed * > + */ > +#include > +#include "vx.h" > + > +#define vtst(v1, v2) \ > + if (v1.d[0] != v2.d[0] || v1.d[1] != v2.d[1]) { \ > + return 1; \ > + } > + > +static inline void vler(S390Vector *v1, const void *va, uint8_t m3) > +{ > + asm volatile("vler %[v1], 0(%[va]), %[m3]\n" > + : [v1] "+v" (v1->v) > + : [va] "d" (va) > + , [m3] "i" (m3) > + : "memory"); > +} The vxeh2_vlstr test fails when compiling with Clang instead of GCC ... seems like it enjoys using register r0 in the spots that use the "d" constraints in the inline assembly in here. The fix is easy: diff a/tests/tcg/s390x/vxeh2_vlstr.c b/tests/tcg/s390x/vxeh2_vlstr.c --- a/tests/tcg/s390x/vxeh2_vlstr.c +++ b/tests/tcg/s390x/vxeh2_vlstr.c @@ -13,7 +13,7 @@ static inline void vler(S390Vector *v1, const void *va, uint8_t m3) { asm volatile("vler %[v1], 0(%[va]), %[m3]\n" : [v1] "+v" (v1->v) - : [va] "d" (va) + : [va] "a" (va) , [m3] "i" (m3) : "memory"); } @@ -21,7 +21,7 @@ static inline void vler(S390Vector *v1, const void *va, uint8_t m3) static inline void vster(S390Vector *v1, const void *va, uint8_t m3) { asm volatile("vster %[v1], 0(%[va]), %[m3]\n" - : [va] "+d" (va) + : [va] "+a" (va) : [v1] "v" (v1->v) , [m3] "i" (m3) : "memory"); @@ -31,7 +31,7 @@ static inline void vlbr(S390Vector *v1, void *va, const uint8_t m3) { asm volatile("vlbr %[v1], 0(%[va]), %[m3]\n" : [v1] "+v" (v1->v) - : [va] "d" (va) + : [va] "a" (va) , [m3] "i" (m3) : "memory"); } @@ -39,7 +39,7 @@ static inline void vlbr(S390Vector *v1, void *va, const uint8_t m3) static inline void vstbr(S390Vector *v1, void *va, const uint8_t m3) { asm volatile("vstbr %[v1], 0(%[va]), %[m3]\n" - : [va] "+d" (va) + : [va] "+a" (va) : [v1] "v" (v1->v) , [m3] "i" (m3) : "memory"); @@ -50,7 +50,7 @@ static inline void vlebrh(S390Vector *v1, void *va, const uint8_t m3) { asm volatile("vlebrh %[v1], 0(%[va]), %[m3]\n" : [v1] "+v" (v1->v) - : [va] "d" (va) + : [va] "a" (va) , [m3] "i" (m3) : "memory"); } @@ -58,7 +58,7 @@ static inline void vlebrh(S390Vector *v1, void *va, const uint8_t m3) static inline void vstebrh(S390Vector *v1, void *va, const uint8_t m3) { asm volatile("vstebrh %[v1], 0(%[va]), %[m3]\n" - : [va] "+d" (va) + : [va] "+a" (va) : [v1] "v" (v1->v) , [m3] "i" (m3) : "memory"); @@ -68,7 +68,7 @@ static inline void vllebrz(S390Vector *v1, void *va, const uint8_t m3) { asm volatile("vllebrz %[v1], 0(%[va]), %[m3]\n" : [v1] "+v" (v1->v) - : [va] "d" (va) + : [va] "a" (va) , [m3] "i" (m3) : "memory"); } @@ -77,7 +77,7 @@ static inline void vlbrrep(S390Vector *v1, void *va, const uint8_t m3) { asm volatile("vlbrrep %[v1], 0(%[va]), %[m3]\n" : [v1] "+v" (v1->v) - : [va] "d" (va) + : [va] "a" (va) , [m3] "i" (m3) : "memory"); } I'll fix it up in my queue, so no need to resend. Thomas