From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9D373C433F5 for ; Mon, 23 May 2022 09:17:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232787AbiEWJRV (ORCPT ); Mon, 23 May 2022 05:17:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37264 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232795AbiEWJRS (ORCPT ); Mon, 23 May 2022 05:17:18 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 06092457B5; Mon, 23 May 2022 02:17:17 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AEA55ED1; Mon, 23 May 2022 02:17:16 -0700 (PDT) Received: from [10.57.34.201] (unknown [10.57.34.201]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D8AA83F73D; Mon, 23 May 2022 02:17:13 -0700 (PDT) Message-ID: <7fd884ed-1255-5976-6fcc-7a19ad0eb04e@arm.com> Date: Mon, 23 May 2022 10:17:12 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:91.0) Gecko/20100101 Thunderbird/91.9.0 Subject: Re: [PATCH v7 05/10] coresight-tpdm: Add integration test support To: Mao Jinlong , Mathieu Poirier , Alexander Shishkin , Konrad Dybcio , Mike Leach Cc: Leo Yan , Greg Kroah-Hartman , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Tingwei Zhang , Yuanfang Zhang , Tao Zhang , Trilok Soni , Hao Zhang , linux-arm-msm@vger.kernel.org, Bjorn Andersson References: <20220509133947.20987-1-quic_jinlmao@quicinc.com> <20220509133947.20987-6-quic_jinlmao@quicinc.com> From: Suzuki K Poulose In-Reply-To: <20220509133947.20987-6-quic_jinlmao@quicinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 09/05/2022 14:39, Mao Jinlong wrote: > Integration test for tpdm can help to generate the data for > verification of the topology during TPDM software bring up. > > Sample: > echo 1 > /sys/bus/coresight/devices/tmc_etf0/enable_sink > echo 1 > /sys/bus/coresight/devices/tpdm0/enable_source > echo 1 > /sys/bus/coresight/devices/tpdm0/integration_test > echo 2 > /sys/bus/coresight/devices/tpdm0/integration_test > cat /dev/tmc_etf0 > /data/etf-tpdm0.bin > > Signed-off-by: Tao Zhang > Signed-off-by: Mao Jinlong Please could we stick this under a sub-Kconfig entry, like we did for the CTI ? CONFIG_CORESIGHT_TPMD_INTEGRATION_TEST > --- > drivers/hwtracing/coresight/coresight-tpdm.c | 54 ++++++++++++++++++++ > drivers/hwtracing/coresight/coresight-tpdm.h | 14 +++++ > 2 files changed, 68 insertions(+) > > diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c b/drivers/hwtracing/coresight/coresight-tpdm.c > index 70df888ac565..57e38aa7d2bd 100644 > --- a/drivers/hwtracing/coresight/coresight-tpdm.c > +++ b/drivers/hwtracing/coresight/coresight-tpdm.c > @@ -123,6 +123,59 @@ static void tpdm_init_default_data(struct tpdm_drvdata *drvdata) > CS_LOCK(drvdata->base); > } > > +/* > + * value 1: 64 bits test data > + * value 2: 32 bits test data > + */ > +static ssize_t integration_test_store(struct device *dev, > + struct device_attribute *attr, > + const char *buf, > + size_t size) > +{ > + int i, ret = 0; > + unsigned long val; > + struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent); > + > + ret = kstrtoul(buf, 10, &val); > + if (ret) > + return ret; > + > + if (val != 1 && val != 2) > + return -EINVAL; > + > + if (!drvdata->enable) > + return -EINVAL; > + > + if (val == 1) > + val = ATBCNTRL_VAL_64; > + else > + val = ATBCNTRL_VAL_32; > + CS_UNLOCK(drvdata->base); > + writel_relaxed(0x1, drvdata->base + TPDM_ITCNTRL); > + > + for (i = 1; i < INTEGRATION_TEST_CYCLE; i++) super minor nit : It is a bit un-natural, not to have i = 0; Rest looks fine to me . Suzuki > + writel_relaxed(val, drvdata->base + TPDM_ITATBCNTRL); > + > + writel_relaxed(0, drvdata->base + TPDM_ITCNTRL); > + CS_LOCK(drvdata->base); > + return size; > +} > +static DEVICE_ATTR_WO(integration_test); > + > +static struct attribute *tpdm_attrs[] = { > + &dev_attr_integration_test.attr, > + NULL, > +}; > + > +static struct attribute_group tpdm_attr_grp = { > + .attrs = tpdm_attrs, > +}; > + > +static const struct attribute_group *tpdm_attr_grps[] = { > + &tpdm_attr_grp, > + NULL, > +}; > + > static int tpdm_probe(struct amba_device *adev, const struct amba_id *id) > { > struct device *dev = &adev->dev; > @@ -157,6 +210,7 @@ static int tpdm_probe(struct amba_device *adev, const struct amba_id *id) > desc.ops = &tpdm_cs_ops; > desc.pdata = adev->dev.platform_data; > desc.dev = &adev->dev; > + desc.groups = tpdm_attr_grps; > drvdata->csdev = coresight_register(&desc); > if (IS_ERR(drvdata->csdev)) > return PTR_ERR(drvdata->csdev); > diff --git a/drivers/hwtracing/coresight/coresight-tpdm.h b/drivers/hwtracing/coresight/coresight-tpdm.h > index f95aaad9c653..4aa880794383 100644 > --- a/drivers/hwtracing/coresight/coresight-tpdm.h > +++ b/drivers/hwtracing/coresight/coresight-tpdm.h > @@ -14,6 +14,20 @@ > /* Enable bit for DSB subunit */ > #define TPDM_DSB_CR_ENA BIT(0) > > +/* TPDM integration test registers */ > +#define TPDM_ITATBCNTRL (0xEF0) > +#define TPDM_ITCNTRL (0xF00) > + > +/* Register value for integration test */ > +#define ATBCNTRL_VAL_32 0xC00F1409 > +#define ATBCNTRL_VAL_64 0xC01F1409 > + > +/* > + * Number of cycles to write value when > + * integration test. > + */ > +#define INTEGRATION_TEST_CYCLE 10 > + > /** > * This enum is for PERIPHIDR0 register of TPDM. > * The fields [6:0] of PERIPHIDR0 are used to determine what From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DDD0AC433F5 for ; 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Mon, 23 May 2022 10:29:45 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nt4Bh-002lyT-Kx for linux-arm-kernel@lists.infradead.org; Mon, 23 May 2022 09:17:20 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AEA55ED1; Mon, 23 May 2022 02:17:16 -0700 (PDT) Received: from [10.57.34.201] (unknown [10.57.34.201]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D8AA83F73D; Mon, 23 May 2022 02:17:13 -0700 (PDT) Message-ID: <7fd884ed-1255-5976-6fcc-7a19ad0eb04e@arm.com> Date: Mon, 23 May 2022 10:17:12 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:91.0) Gecko/20100101 Thunderbird/91.9.0 Subject: Re: [PATCH v7 05/10] coresight-tpdm: Add integration test support To: Mao Jinlong , Mathieu Poirier , Alexander Shishkin , Konrad Dybcio , Mike Leach Cc: Leo Yan , Greg Kroah-Hartman , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Tingwei Zhang , Yuanfang Zhang , Tao Zhang , Trilok Soni , Hao Zhang , linux-arm-msm@vger.kernel.org, Bjorn Andersson References: <20220509133947.20987-1-quic_jinlmao@quicinc.com> <20220509133947.20987-6-quic_jinlmao@quicinc.com> From: Suzuki K Poulose In-Reply-To: <20220509133947.20987-6-quic_jinlmao@quicinc.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220523_021717_846186_EA673EE9 X-CRM114-Status: GOOD ( 24.42 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 09/05/2022 14:39, Mao Jinlong wrote: > Integration test for tpdm can help to generate the data for > verification of the topology during TPDM software bring up. > > Sample: > echo 1 > /sys/bus/coresight/devices/tmc_etf0/enable_sink > echo 1 > /sys/bus/coresight/devices/tpdm0/enable_source > echo 1 > /sys/bus/coresight/devices/tpdm0/integration_test > echo 2 > /sys/bus/coresight/devices/tpdm0/integration_test > cat /dev/tmc_etf0 > /data/etf-tpdm0.bin > > Signed-off-by: Tao Zhang > Signed-off-by: Mao Jinlong Please could we stick this under a sub-Kconfig entry, like we did for the CTI ? CONFIG_CORESIGHT_TPMD_INTEGRATION_TEST > --- > drivers/hwtracing/coresight/coresight-tpdm.c | 54 ++++++++++++++++++++ > drivers/hwtracing/coresight/coresight-tpdm.h | 14 +++++ > 2 files changed, 68 insertions(+) > > diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c b/drivers/hwtracing/coresight/coresight-tpdm.c > index 70df888ac565..57e38aa7d2bd 100644 > --- a/drivers/hwtracing/coresight/coresight-tpdm.c > +++ b/drivers/hwtracing/coresight/coresight-tpdm.c > @@ -123,6 +123,59 @@ static void tpdm_init_default_data(struct tpdm_drvdata *drvdata) > CS_LOCK(drvdata->base); > } > > +/* > + * value 1: 64 bits test data > + * value 2: 32 bits test data > + */ > +static ssize_t integration_test_store(struct device *dev, > + struct device_attribute *attr, > + const char *buf, > + size_t size) > +{ > + int i, ret = 0; > + unsigned long val; > + struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent); > + > + ret = kstrtoul(buf, 10, &val); > + if (ret) > + return ret; > + > + if (val != 1 && val != 2) > + return -EINVAL; > + > + if (!drvdata->enable) > + return -EINVAL; > + > + if (val == 1) > + val = ATBCNTRL_VAL_64; > + else > + val = ATBCNTRL_VAL_32; > + CS_UNLOCK(drvdata->base); > + writel_relaxed(0x1, drvdata->base + TPDM_ITCNTRL); > + > + for (i = 1; i < INTEGRATION_TEST_CYCLE; i++) super minor nit : It is a bit un-natural, not to have i = 0; Rest looks fine to me . Suzuki > + writel_relaxed(val, drvdata->base + TPDM_ITATBCNTRL); > + > + writel_relaxed(0, drvdata->base + TPDM_ITCNTRL); > + CS_LOCK(drvdata->base); > + return size; > +} > +static DEVICE_ATTR_WO(integration_test); > + > +static struct attribute *tpdm_attrs[] = { > + &dev_attr_integration_test.attr, > + NULL, > +}; > + > +static struct attribute_group tpdm_attr_grp = { > + .attrs = tpdm_attrs, > +}; > + > +static const struct attribute_group *tpdm_attr_grps[] = { > + &tpdm_attr_grp, > + NULL, > +}; > + > static int tpdm_probe(struct amba_device *adev, const struct amba_id *id) > { > struct device *dev = &adev->dev; > @@ -157,6 +210,7 @@ static int tpdm_probe(struct amba_device *adev, const struct amba_id *id) > desc.ops = &tpdm_cs_ops; > desc.pdata = adev->dev.platform_data; > desc.dev = &adev->dev; > + desc.groups = tpdm_attr_grps; > drvdata->csdev = coresight_register(&desc); > if (IS_ERR(drvdata->csdev)) > return PTR_ERR(drvdata->csdev); > diff --git a/drivers/hwtracing/coresight/coresight-tpdm.h b/drivers/hwtracing/coresight/coresight-tpdm.h > index f95aaad9c653..4aa880794383 100644 > --- a/drivers/hwtracing/coresight/coresight-tpdm.h > +++ b/drivers/hwtracing/coresight/coresight-tpdm.h > @@ -14,6 +14,20 @@ > /* Enable bit for DSB subunit */ > #define TPDM_DSB_CR_ENA BIT(0) > > +/* TPDM integration test registers */ > +#define TPDM_ITATBCNTRL (0xEF0) > +#define TPDM_ITCNTRL (0xF00) > + > +/* Register value for integration test */ > +#define ATBCNTRL_VAL_32 0xC00F1409 > +#define ATBCNTRL_VAL_64 0xC01F1409 > + > +/* > + * Number of cycles to write value when > + * integration test. > + */ > +#define INTEGRATION_TEST_CYCLE 10 > + > /** > * This enum is for PERIPHIDR0 register of TPDM. > * The fields [6:0] of PERIPHIDR0 are used to determine what _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel