From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752832AbbCKROb (ORCPT ); Wed, 11 Mar 2015 13:14:31 -0400 Received: from mail-pd0-f179.google.com ([209.85.192.179]:37875 "EHLO mail-pd0-f179.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752038AbbCKRO1 convert rfc822-to-8bit (ORCPT ); Wed, 11 Mar 2015 13:14:27 -0400 From: Kevin Hilman To: Sascha Hauer Cc: James Liao , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Matthias Brugger , linux-mediatek@lists.infradead.org, kernel@pengutronix.de Subject: Re: [PATCH 2/4] soc: Mediatek: Add SCPSYS power domain driver References: <1425888603-25800-1-git-send-email-s.hauer@pengutronix.de> <1425888603-25800-3-git-send-email-s.hauer@pengutronix.de> <7h61a94zy0.fsf@deeprootsystems.com> <20150310094142.GD24885@pengutronix.de> <1426043791.24243.9.camel@mtksdaap41> <20150311090345.GR24885@pengutronix.de> Date: Wed, 11 Mar 2015 10:14:23 -0700 In-Reply-To: <20150311090345.GR24885@pengutronix.de> (Sascha Hauer's message of "Wed, 11 Mar 2015 10:03:45 +0100") Message-ID: <7hbnjzxxqo.fsf@deeprootsystems.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Sascha Hauer writes: > On Wed, Mar 11, 2015 at 11:16:31AM +0800, James Liao wrote: >> Hi, >> >> On Tue, 2015-03-10 at 10:41 +0100, Sascha Hauer wrote: >> > On Mon, Mar 09, 2015 at 02:35:03PM -0700, Kevin Hilman wrote: >> > > Sascha Hauer writes: >> > > >> > > > Signed-off-by: Sascha Hauer >> > > >> > > A bit of a changelog here would be useful describing this driver, that >> > > it's only covering part of the device (e.g. power controller) with more >> > > to come, dependency on the syscon driver, etc. >> > > >> > > > +/* >> > > > + * The Infracfg unit has bus protection bits. We enable the bus protection >> > > > + * for disabled power domains so that the system does not hang when some unit >> > > > + * accesses the bus while in power down. >> > > > + */ >> > > >> > > Hmm, why don't you want to know if some device is accessing another >> > > device which is in a domain that is powered down? Seems like this is a >> > > good way to hide real bugs. >> > >> > How I understand it the system just hangs on erroneous accesses without >> > these protection bits enabled, so enabling them at least makes sure we >> > can output something. >> > I must admit though that my understanding of these bits is quite limited >> > and the only user of this driver I have available here (audio) doesn't >> > make use of these protection bits, so I can't test here. >> > >> > James, could you shed some light on this issue? >> >> I asked our designer about the bus protection feature, here is his >> response: >> >> " >> It's for unexpected signal glitch in Power switch process. >> >> During Power switch process, we have clock switch, reset, isolation >> enable/disable and power switch involved where the transition of >> asynchronous reset and isolation is the most critical one, which have >> risk to introduce a unexpected short period signal transition from >> MTCMOS’s interface to other alive HW . >> " >> >> That means it protects unexpected bus accessing from HW, not from SW. So >> it will not hide bugs from wrong SW access. > > Ok, thanks for clarifying. This means we should enable this feature > sooner or later. Since the audio driver which is likely the first user > of this driver doesn't need the protection bits I think we have some > time and can add the protection bits once the clock patches have been > merged. Sounds OK to me. But I still think it belongs in the infracfg layer, and not in the PM domain layer. Kevin From mboxrd@z Thu Jan 1 00:00:00 1970 From: khilman@kernel.org (Kevin Hilman) Date: Wed, 11 Mar 2015 10:14:23 -0700 Subject: [PATCH 2/4] soc: Mediatek: Add SCPSYS power domain driver In-Reply-To: <20150311090345.GR24885@pengutronix.de> (Sascha Hauer's message of "Wed, 11 Mar 2015 10:03:45 +0100") References: <1425888603-25800-1-git-send-email-s.hauer@pengutronix.de> <1425888603-25800-3-git-send-email-s.hauer@pengutronix.de> <7h61a94zy0.fsf@deeprootsystems.com> <20150310094142.GD24885@pengutronix.de> <1426043791.24243.9.camel@mtksdaap41> <20150311090345.GR24885@pengutronix.de> Message-ID: <7hbnjzxxqo.fsf@deeprootsystems.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Sascha Hauer writes: > On Wed, Mar 11, 2015 at 11:16:31AM +0800, James Liao wrote: >> Hi, >> >> On Tue, 2015-03-10 at 10:41 +0100, Sascha Hauer wrote: >> > On Mon, Mar 09, 2015 at 02:35:03PM -0700, Kevin Hilman wrote: >> > > Sascha Hauer writes: >> > > >> > > > Signed-off-by: Sascha Hauer >> > > >> > > A bit of a changelog here would be useful describing this driver, that >> > > it's only covering part of the device (e.g. power controller) with more >> > > to come, dependency on the syscon driver, etc. >> > > >> > > > +/* >> > > > + * The Infracfg unit has bus protection bits. We enable the bus protection >> > > > + * for disabled power domains so that the system does not hang when some unit >> > > > + * accesses the bus while in power down. >> > > > + */ >> > > >> > > Hmm, why don't you want to know if some device is accessing another >> > > device which is in a domain that is powered down? Seems like this is a >> > > good way to hide real bugs. >> > >> > How I understand it the system just hangs on erroneous accesses without >> > these protection bits enabled, so enabling them at least makes sure we >> > can output something. >> > I must admit though that my understanding of these bits is quite limited >> > and the only user of this driver I have available here (audio) doesn't >> > make use of these protection bits, so I can't test here. >> > >> > James, could you shed some light on this issue? >> >> I asked our designer about the bus protection feature, here is his >> response: >> >> " >> It's for unexpected signal glitch in Power switch process. >> >> During Power switch process, we have clock switch, reset, isolation >> enable/disable and power switch involved where the transition of >> asynchronous reset and isolation is the most critical one, which have >> risk to introduce a unexpected short period signal transition from >> MTCMOS?s interface to other alive HW . >> " >> >> That means it protects unexpected bus accessing from HW, not from SW. So >> it will not hide bugs from wrong SW access. > > Ok, thanks for clarifying. This means we should enable this feature > sooner or later. Since the audio driver which is likely the first user > of this driver doesn't need the protection bits I think we have some > time and can add the protection bits once the clock patches have been > merged. Sounds OK to me. But I still think it belongs in the infracfg layer, and not in the PM domain layer. Kevin